hk32f0xx_adc.h 19 KB

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  1. /**
  2. ******************************************************************************
  3. * @file hk32f0xx_adc.h
  4. * @version V1.0.1
  5. * @date 2019-08-15
  6. ******************************************************************************
  7. */
  8. /* Define to prevent recursive inclusion -------------------------------------*/
  9. #ifndef __HK32F0XX_ADC_H
  10. #define __HK32F0XX_ADC_H
  11. #ifdef __cplusplus
  12. extern "C" {
  13. #endif
  14. /* Includes ------------------------------------------------------------------*/
  15. #include "hk32f0xx.h"
  16. /** @addtogroup HK32F0xx_StdPeriph_Driver
  17. * @{
  18. */
  19. /** @addtogroup ADC
  20. * @{
  21. */
  22. /* Exported types ------------------------------------------------------------*/
  23. /**
  24. * @brief ADC Init structure definition
  25. */
  26. typedef struct
  27. {
  28. uint32_t ADC_Resolution; /*!< Selects the resolution of the conversion.
  29. This parameter can be a value of @ref ADC_Resolution */
  30. FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
  31. Continuous or Single mode.
  32. This parameter can be set to ENABLE or DISABLE. */
  33. uint32_t ADC_ExternalTrigConvEdge; /*!< Selects the external trigger Edge and enables the
  34. trigger of a regular group. This parameter can be a value
  35. of @ref ADC_external_trigger_edge_conversion */
  36. uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
  37. to digital conversion of regular channels. This parameter
  38. can be a value of @ref ADC_external_trigger_sources_for_channels_conversion */
  39. uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
  40. This parameter can be a value of @ref ADC_data_align */
  41. uint32_t ADC_ScanDirection; /*!< Specifies in which direction the channels will be scanned
  42. in the sequence.
  43. This parameter can be a value of @ref ADC_Scan_Direction */
  44. }ADC_InitTypeDef;
  45. /* Exported constants --------------------------------------------------------*/
  46. /** @defgroup ADC_Exported_Constants
  47. * @{
  48. */
  49. #define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1)
  50. /** @defgroup ADC_JitterOff
  51. * @{
  52. */
  53. /* These defines are obsolete and maintained for legacy purpose only. They are replaced by the ADC_ClockMode */
  54. #define ADC_JitterOff_PCLKDiv2 ADC_CFGR2_JITOFFDIV2
  55. #define ADC_JitterOff_PCLKDiv4 ADC_CFGR2_JITOFFDIV4
  56. #define IS_ADC_JITTEROFF(JITTEROFF) (((JITTEROFF) & 0x3FFFFFFF) == (uint32_t)RESET)
  57. /**
  58. * @}
  59. */
  60. /** @defgroup ADC_ClockMode
  61. * @{
  62. */
  63. #define ADC_ClockMode_AsynClk ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode */
  64. #define ADC_ClockMode_SynClkDiv2 ADC_CFGR2_CKMODE_0 /*!< Synchronous clock mode divided by 2 */
  65. #define ADC_ClockMode_SynClkDiv4 ADC_CFGR2_CKMODE_1 /*!< Synchronous clock mode divided by 4 */
  66. #define IS_ADC_CLOCKMODE(CLOCK) (((CLOCK) == ADC_ClockMode_AsynClk) ||\
  67. ((CLOCK) == ADC_ClockMode_SynClkDiv2) ||\
  68. ((CLOCK) == ADC_ClockMode_SynClkDiv4))
  69. /**
  70. * @}
  71. */
  72. /** @defgroup ADC_Resolution
  73. * @{
  74. */
  75. #define ADC_Resolution_12b ((uint32_t)0x00000000)
  76. #define ADC_Resolution_10b ADC_CFGR1_RES_0
  77. #define ADC_Resolution_8b ADC_CFGR1_RES_1
  78. #define ADC_Resolution_6b ADC_CFGR1_RES
  79. #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
  80. ((RESOLUTION) == ADC_Resolution_10b) || \
  81. ((RESOLUTION) == ADC_Resolution_8b) || \
  82. ((RESOLUTION) == ADC_Resolution_6b))
  83. /**
  84. * @}
  85. */
  86. /** @defgroup ADC_external_trigger_edge_conversion
  87. * @{
  88. */
  89. #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
  90. #define ADC_ExternalTrigConvEdge_Rising ADC_CFGR1_EXTEN_0
  91. #define ADC_ExternalTrigConvEdge_Falling ADC_CFGR1_EXTEN_1
  92. #define ADC_ExternalTrigConvEdge_RisingFalling ADC_CFGR1_EXTEN
  93. #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
  94. ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
  95. ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
  96. ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
  97. /**
  98. * @}
  99. */
  100. /** @defgroup ADC_external_trigger_sources_for_channels_conversion
  101. * @{
  102. */
  103. /* TIM1 */
  104. #define ADC_ExternalTrigConv_T1_TRGO ((uint32_t)0x00000000)
  105. #define ADC_ExternalTrigConv_T1_CC4 ADC_CFGR1_EXTSEL_0
  106. /* TIM2 */
  107. #define ADC_ExternalTrigConv_T2_TRGO ADC_CFGR1_EXTSEL_1
  108. /* TIM3 */
  109. #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_0 | ADC_CFGR1_EXTSEL_1))
  110. /* TIM15 */
  111. #define ADC_ExternalTrigConv_T15_TRGO ADC_CFGR1_EXTSEL_2
  112. #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_ExternalTrigConv_T1_TRGO) || \
  113. ((CONV) == ADC_ExternalTrigConv_T1_CC4) || \
  114. ((CONV) == ADC_ExternalTrigConv_T2_TRGO) || \
  115. ((CONV) == ADC_ExternalTrigConv_T3_TRGO) || \
  116. ((CONV) == ADC_ExternalTrigConv_T15_TRGO))
  117. /**
  118. * @}
  119. */
  120. /** @defgroup ADC_data_align
  121. * @{
  122. */
  123. #define ADC_DataAlign_Right ((uint32_t)0x00000000)
  124. #define ADC_DataAlign_Left ADC_CFGR1_ALIGN
  125. #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
  126. ((ALIGN) == ADC_DataAlign_Left))
  127. /**
  128. * @}
  129. */
  130. /** @defgroup ADC_Scan_Direction
  131. * @{
  132. */
  133. #define ADC_ScanDirection_Upward ((uint32_t)0x00000000)
  134. #define ADC_ScanDirection_Backward ADC_CFGR1_SCANDIR
  135. #define IS_ADC_SCAN_DIRECTION(DIRECTION) (((DIRECTION) == ADC_ScanDirection_Upward) || \
  136. ((DIRECTION) == ADC_ScanDirection_Backward))
  137. /**
  138. * @}
  139. */
  140. /** @defgroup ADC_DMA_Mode
  141. * @{
  142. */
  143. #define ADC_DMAMode_OneShot ((uint32_t)0x00000000)
  144. #define ADC_DMAMode_Circular ADC_CFGR1_DMACFG
  145. #define IS_ADC_DMA_MODE(MODE) (((MODE) == ADC_DMAMode_OneShot) || \
  146. ((MODE) == ADC_DMAMode_Circular))
  147. /**
  148. * @}
  149. */
  150. /** @defgroup ADC_analog_watchdog_selection
  151. * @{
  152. */
  153. #define ADC_AnalogWatchdog_Channel_0 ((uint32_t)0x00000000)
  154. #define ADC_AnalogWatchdog_Channel_1 ((uint32_t)0x04000000)
  155. #define ADC_AnalogWatchdog_Channel_2 ((uint32_t)0x08000000)
  156. #define ADC_AnalogWatchdog_Channel_3 ((uint32_t)0x0C000000)
  157. #define ADC_AnalogWatchdog_Channel_4 ((uint32_t)0x10000000)
  158. #define ADC_AnalogWatchdog_Channel_5 ((uint32_t)0x14000000)
  159. #define ADC_AnalogWatchdog_Channel_6 ((uint32_t)0x18000000)
  160. #define ADC_AnalogWatchdog_Channel_7 ((uint32_t)0x1C000000)
  161. #define ADC_AnalogWatchdog_Channel_8 ((uint32_t)0x20000000)
  162. #define ADC_AnalogWatchdog_Channel_9 ((uint32_t)0x24000000)
  163. #define ADC_AnalogWatchdog_Channel_10 ((uint32_t)0x28000000) /*!< Not available for HK32F031 devices */
  164. #define ADC_AnalogWatchdog_Channel_11 ((uint32_t)0x2C000000) /*!< Not available for HK32F031 devices */
  165. #define ADC_AnalogWatchdog_Channel_12 ((uint32_t)0x30000000) /*!< Not available for HK32F031 devices */
  166. #define ADC_AnalogWatchdog_Channel_13 ((uint32_t)0x34000000) /*!< Not available for HK32F031 devices */
  167. #define ADC_AnalogWatchdog_Channel_14 ((uint32_t)0x38000000) /*!< Not available for HK32F031 devices */
  168. #define ADC_AnalogWatchdog_Channel_15 ((uint32_t)0x3C000000) /*!< Not available for HK32F031 devices */
  169. #define ADC_AnalogWatchdog_Channel_16 ((uint32_t)0x40000000)
  170. #define ADC_AnalogWatchdog_Channel_17 ((uint32_t)0x44000000)
  171. #define ADC_AnalogWatchdog_Channel_18 ((uint32_t)0x48000000)
  172. #define IS_ADC_ANALOG_WATCHDOG_CHANNEL(CHANNEL) (((CHANNEL) == ADC_AnalogWatchdog_Channel_0) || \
  173. ((CHANNEL) == ADC_AnalogWatchdog_Channel_1) || \
  174. ((CHANNEL) == ADC_AnalogWatchdog_Channel_2) || \
  175. ((CHANNEL) == ADC_AnalogWatchdog_Channel_3) || \
  176. ((CHANNEL) == ADC_AnalogWatchdog_Channel_4) || \
  177. ((CHANNEL) == ADC_AnalogWatchdog_Channel_5) || \
  178. ((CHANNEL) == ADC_AnalogWatchdog_Channel_6) || \
  179. ((CHANNEL) == ADC_AnalogWatchdog_Channel_7) || \
  180. ((CHANNEL) == ADC_AnalogWatchdog_Channel_8) || \
  181. ((CHANNEL) == ADC_AnalogWatchdog_Channel_9) || \
  182. ((CHANNEL) == ADC_AnalogWatchdog_Channel_10) || \
  183. ((CHANNEL) == ADC_AnalogWatchdog_Channel_11) || \
  184. ((CHANNEL) == ADC_AnalogWatchdog_Channel_12) || \
  185. ((CHANNEL) == ADC_AnalogWatchdog_Channel_13) || \
  186. ((CHANNEL) == ADC_AnalogWatchdog_Channel_14) || \
  187. ((CHANNEL) == ADC_AnalogWatchdog_Channel_15) || \
  188. ((CHANNEL) == ADC_AnalogWatchdog_Channel_16) || \
  189. ((CHANNEL) == ADC_AnalogWatchdog_Channel_17) || \
  190. ((CHANNEL) == ADC_AnalogWatchdog_Channel_18))
  191. /**
  192. * @}
  193. */
  194. /** @defgroup ADC_sampling_times
  195. * @{
  196. */
  197. #define ADC_SampleTime_1_5Cycles ((uint32_t)0x00000000)
  198. #define ADC_SampleTime_7_5Cycles ((uint32_t)0x00000001)
  199. #define ADC_SampleTime_13_5Cycles ((uint32_t)0x00000002)
  200. #define ADC_SampleTime_28_5Cycles ((uint32_t)0x00000003)
  201. #define ADC_SampleTime_41_5Cycles ((uint32_t)0x00000004)
  202. #define ADC_SampleTime_55_5Cycles ((uint32_t)0x00000005)
  203. #define ADC_SampleTime_71_5Cycles ((uint32_t)0x00000006)
  204. #define ADC_SampleTime_239_5Cycles ((uint32_t)0x00000007)
  205. #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles) || \
  206. ((TIME) == ADC_SampleTime_7_5Cycles) || \
  207. ((TIME) == ADC_SampleTime_13_5Cycles) || \
  208. ((TIME) == ADC_SampleTime_28_5Cycles) || \
  209. ((TIME) == ADC_SampleTime_41_5Cycles) || \
  210. ((TIME) == ADC_SampleTime_55_5Cycles) || \
  211. ((TIME) == ADC_SampleTime_71_5Cycles) || \
  212. ((TIME) == ADC_SampleTime_239_5Cycles))
  213. /**
  214. * @}
  215. */
  216. /** @defgroup ADC_thresholds
  217. * @{
  218. */
  219. #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
  220. /**
  221. * @}
  222. */
  223. /** @defgroup ADC_channels
  224. * @{
  225. */
  226. #define ADC_Channel_0 ADC_CHSELR_CHSEL0
  227. #define ADC_Channel_1 ADC_CHSELR_CHSEL1
  228. #define ADC_Channel_2 ADC_CHSELR_CHSEL2
  229. #define ADC_Channel_3 ADC_CHSELR_CHSEL3
  230. #define ADC_Channel_4 ADC_CHSELR_CHSEL4
  231. #define ADC_Channel_5 ADC_CHSELR_CHSEL5
  232. #define ADC_Channel_6 ADC_CHSELR_CHSEL6
  233. #define ADC_Channel_7 ADC_CHSELR_CHSEL7
  234. #define ADC_Channel_8 ADC_CHSELR_CHSEL8
  235. #define ADC_Channel_9 ADC_CHSELR_CHSEL9
  236. #define ADC_Channel_10 ADC_CHSELR_CHSEL10 /*!< Not available for HK32F031 devices */
  237. #define ADC_Channel_11 ADC_CHSELR_CHSEL11 /*!< Not available for HK32F031 devices */
  238. #define ADC_Channel_12 ADC_CHSELR_CHSEL12 /*!< Not available for HK32F031 devices */
  239. #define ADC_Channel_13 ADC_CHSELR_CHSEL13 /*!< Not available for HK32F031 devices */
  240. #define ADC_Channel_14 ADC_CHSELR_CHSEL14 /*!< Not available for HK32F031 devices */
  241. #define ADC_Channel_15 ADC_CHSELR_CHSEL15 /*!< Not available for HK32F031 devices */
  242. #define ADC_Channel_16 ADC_CHSELR_CHSEL16
  243. #define ADC_Channel_17 ADC_CHSELR_CHSEL17
  244. #define ADC_Channel_18 ADC_CHSELR_CHSEL18 /*!< Not available for HK32F030 devices */
  245. #define ADC_Channel_TempSensor ((uint32_t)ADC_Channel_16)
  246. #define ADC_Channel_Vrefint ((uint32_t)ADC_Channel_17)
  247. #define ADC_Channel_Vbat ((uint32_t)ADC_Channel_18) /*!< Not available for HK32F030 devices */
  248. #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) != (uint32_t)RESET) && (((CHANNEL) & 0xFFF80000) == (uint32_t)RESET))
  249. /**
  250. * @}
  251. */
  252. /** @defgroup ADC_interrupts_definition
  253. * @{
  254. */
  255. #define ADC_IT_ADRDY ADC_IER_ADRDYIE
  256. #define ADC_IT_EOSMP ADC_IER_EOSMPIE
  257. #define ADC_IT_EOC ADC_IER_EOCIE
  258. #define ADC_IT_EOSEQ ADC_IER_EOSEQIE
  259. #define ADC_IT_OVR ADC_IER_OVRIE
  260. #define ADC_IT_AWD ADC_IER_AWDIE
  261. #define IS_ADC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFF60) == (uint32_t)RESET))
  262. #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_ADRDY) || ((IT) == ADC_IT_EOSMP) || \
  263. ((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_EOSEQ) || \
  264. ((IT) == ADC_IT_OVR) || ((IT) == ADC_IT_AWD))
  265. #define IS_ADC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFF60) == (uint32_t)RESET))
  266. /**
  267. * @}
  268. */
  269. /** @defgroup ADC_flags_definition
  270. * @{
  271. */
  272. #define ADC_FLAG_ADRDY ADC_ISR_ADRDY
  273. #define ADC_FLAG_EOSMP ADC_ISR_EOSMP
  274. #define ADC_FLAG_EOC ADC_ISR_EOC
  275. #define ADC_FLAG_EOSEQ ADC_ISR_EOSEQ
  276. #define ADC_FLAG_OVR ADC_ISR_OVR
  277. #define ADC_FLAG_AWD ADC_ISR_AWD
  278. #define ADC_FLAG_ADEN ((uint32_t)0x01000001)
  279. #define ADC_FLAG_ADDIS ((uint32_t)0x01000002)
  280. #define ADC_FLAG_ADSTART ((uint32_t)0x01000004)
  281. #define ADC_FLAG_ADSTP ((uint32_t)0x01000010)
  282. #define ADC_FLAG_ADCAL ((uint32_t)0x81000000)
  283. #define IS_ADC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFFFF60) == (uint32_t)RESET))
  284. #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_ADRDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
  285. ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOSEQ) || \
  286. ((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_OVR) || \
  287. ((FLAG) == ADC_FLAG_ADEN) || ((FLAG) == ADC_FLAG_ADDIS) || \
  288. ((FLAG) == ADC_FLAG_ADSTART) || ((FLAG) == ADC_FLAG_ADSTP) || \
  289. ((FLAG) == ADC_FLAG_ADCAL))
  290. /**
  291. * @}
  292. */
  293. /**
  294. * @}
  295. */
  296. /* Exported macro ------------------------------------------------------------*/
  297. /* Exported functions ------------------------------------------------------- */
  298. /* Function used to set the ADC configuration to the default reset state *****/
  299. void ADC_DeInit(ADC_TypeDef* ADCx);
  300. /* Initialization and Configuration functions *********************************/
  301. void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
  302. void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
  303. void ADC_ClockModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ClockMode);
  304. void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  305. /* This Function is obsolete and maintained for legacy purpose only.
  306. ADC_ClockModeConfig() function should be used instead */
  307. void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState);
  308. /* Power saving functions *****************************************************/
  309. void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  310. void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  311. /* Analog Watchdog configuration functions ************************************/
  312. void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  313. void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold);
  314. void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog_Channel);
  315. void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  316. /* Temperature Sensor , Vrefint and Vbat management function ******************/
  317. void ADC_TempSensorCmd(FunctionalState NewState);
  318. void ADC_VrefintCmd(FunctionalState NewState);
  319. void ADC_VbatCmd(FunctionalState NewState); /*!< Not applicable for HK32F030 devices */
  320. /* Channels Configuration functions *******************************************/
  321. void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime);
  322. void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  323. void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  324. void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  325. uint32_t ADC_GetCalibrationFactor(ADC_TypeDef* ADCx);
  326. void ADC_StopOfConversion(ADC_TypeDef* ADCx);
  327. void ADC_StartOfConversion(ADC_TypeDef* ADCx);
  328. uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
  329. /* Regular Channels DMA Configuration functions *******************************/
  330. void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  331. void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode);
  332. /* Interrupts and flags management functions **********************************/
  333. void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState);
  334. FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
  335. void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
  336. ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT);
  337. void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT);
  338. #ifdef __cplusplus
  339. }
  340. #endif
  341. #endif /*__HK32F0XX_ADC_H */
  342. /**
  343. * @}
  344. */
  345. /**
  346. * @}
  347. */