board.c 2.8 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. * 2021-07-31 GuEe-GUI config the memory/io address map
  10. * 2021-09-11 GuEe-GUI remove do-while in rt_hw_timer_isr
  11. */
  12. #include <rthw.h>
  13. #include <rtthread.h>
  14. #include "board.h"
  15. #include <mmu.h>
  16. #include "drv_uart.h"
  17. void rt_hw_vector_init(void);
  18. static uint64_t timer_val;
  19. static uint64_t timer_step;
  20. void rt_hw_timer_isr(int vector, void *parameter)
  21. {
  22. timer_val += timer_step;
  23. __asm__ volatile ("msr CNTV_CVAL_EL0, %0"::"r"(timer_val));
  24. __asm__ volatile ("isb":::"memory");
  25. rt_tick_increase();
  26. }
  27. int rt_hw_timer_init(void)
  28. {
  29. rt_hw_interrupt_install(27, rt_hw_timer_isr, RT_NULL, "tick");
  30. rt_hw_interrupt_umask(27);
  31. __asm__ volatile ("msr CNTV_CTL_EL0, %0"::"r"(0));
  32. __asm__ volatile ("isb 0xf":::"memory");
  33. __asm__ volatile ("mrs %0, CNTFRQ_EL0" : "=r" (timer_step));
  34. timer_step /= RT_TICK_PER_SECOND;
  35. timer_val = timer_step;
  36. __asm__ volatile ("dsb 0xf":::"memory");
  37. __asm__ volatile ("msr CNTV_CVAL_EL0, %0"::"r"(timer_val));
  38. __asm__ volatile ("msr CNTV_CTL_EL0, %0"::"r"(1));
  39. return 0;
  40. }
  41. void idle_wfi(void)
  42. {
  43. asm volatile ("wfi");
  44. }
  45. /**
  46. * Initialize the Hardware related stuffs. Called from rtthread_startup()
  47. * after interrupt disabled.
  48. */
  49. void rt_hw_board_init(void)
  50. {
  51. uint64_t cont;
  52. mmu_init();
  53. cont = (uint64_t)RT_HW_HEAP_END + 0x1fffff;
  54. cont &= ~0x1fffff;
  55. cont -= 0x40000000;
  56. cont >>= 21;
  57. /* memory location */
  58. armv8_map_2M(0x40000000, 0x40000000, cont, MEM_ATTR_MEMORY);
  59. /* virtio blk0 */
  60. armv8_map_2M(VIRTIO_MMIO_BLK0_BASE, VIRTIO_MMIO_BLK0_BASE, 0x1, MEM_ATTR_IO);
  61. /* uart location*/
  62. armv8_map_2M(PL011_UART0_BASE, PL011_UART0_BASE, 0x1, MEM_ATTR_IO);
  63. /* gic location*/
  64. armv8_map_2M(GIC_PL390_DISTRIBUTOR_PPTR, GIC_PL390_DISTRIBUTOR_PPTR, 0x1, MEM_ATTR_IO);
  65. mmu_enable();
  66. /* initialize hardware interrupt */
  67. rt_hw_interrupt_init(); // in libcpu/interrupt.c. Set some data structures, no operation on device
  68. rt_hw_vector_init(); // in libcpu/interrupt.c. == rt_cpu_vector_set_base((rt_ubase_t)&system_vectors);
  69. /* initialize uart */
  70. rt_hw_uart_init(); // driver/drv_uart.c
  71. /* initialize timer for os tick */
  72. rt_hw_timer_init();
  73. rt_thread_idle_sethook(idle_wfi);
  74. #ifdef RT_USING_CONSOLE
  75. /* set console device */
  76. rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
  77. #endif /* RT_USING_CONSOLE */
  78. #ifdef RT_USING_HEAP
  79. /* initialize memory system */
  80. rt_kprintf("heap: [0x%08x - 0x%08x]\n", RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
  81. rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
  82. #endif
  83. #ifdef RT_USING_COMPONENTS_INIT
  84. rt_components_board_init();
  85. #endif
  86. }