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drv_hwtimer.c 15 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. * 2020-06-16 thread-liu Porting for stm32mp1
  10. * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem
  11. * 2020-10-14 Dozingfiretruck Porting for stm32wbxx
  12. */
  13. #include <board.h>
  14. #ifdef BSP_USING_TIM
  15. #include "drv_config.h"
  16. //#define DRV_DEBUG
  17. #define LOG_TAG "drv.hwtimer"
  18. #include <drv_log.h>
  19. #ifdef RT_USING_HWTIMER
  20. enum
  21. {
  22. #ifdef BSP_USING_TIM1
  23. TIM1_INDEX,
  24. #endif
  25. #ifdef BSP_USING_TIM2
  26. TIM2_INDEX,
  27. #endif
  28. #ifdef BSP_USING_TIM3
  29. TIM3_INDEX,
  30. #endif
  31. #ifdef BSP_USING_TIM4
  32. TIM4_INDEX,
  33. #endif
  34. #ifdef BSP_USING_TIM5
  35. TIM5_INDEX,
  36. #endif
  37. #ifdef BSP_USING_TIM6
  38. TIM6_INDEX,
  39. #endif
  40. #ifdef BSP_USING_TIM7
  41. TIM7_INDEX,
  42. #endif
  43. #ifdef BSP_USING_TIM8
  44. TIM8_INDEX,
  45. #endif
  46. #ifdef BSP_USING_TIM9
  47. TIM9_INDEX,
  48. #endif
  49. #ifdef BSP_USING_TIM10
  50. TIM10_INDEX,
  51. #endif
  52. #ifdef BSP_USING_TIM11
  53. TIM11_INDEX,
  54. #endif
  55. #ifdef BSP_USING_TIM12
  56. TIM12_INDEX,
  57. #endif
  58. #ifdef BSP_USING_TIM13
  59. TIM13_INDEX,
  60. #endif
  61. #ifdef BSP_USING_TIM14
  62. TIM14_INDEX,
  63. #endif
  64. #ifdef BSP_USING_TIM15
  65. TIM15_INDEX,
  66. #endif
  67. #ifdef BSP_USING_TIM16
  68. TIM16_INDEX,
  69. #endif
  70. #ifdef BSP_USING_TIM17
  71. TIM17_INDEX,
  72. #endif
  73. };
  74. struct stm32_hwtimer
  75. {
  76. rt_hwtimer_t time_device;
  77. TIM_HandleTypeDef tim_handle;
  78. IRQn_Type tim_irqn;
  79. char *name;
  80. };
  81. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  82. {
  83. #ifdef BSP_USING_TIM1
  84. TIM1_CONFIG,
  85. #endif
  86. #ifdef BSP_USING_TIM2
  87. TIM2_CONFIG,
  88. #endif
  89. #ifdef BSP_USING_TIM3
  90. TIM3_CONFIG,
  91. #endif
  92. #ifdef BSP_USING_TIM4
  93. TIM4_CONFIG,
  94. #endif
  95. #ifdef BSP_USING_TIM5
  96. TIM5_CONFIG,
  97. #endif
  98. #ifdef BSP_USING_TIM6
  99. TIM6_CONFIG,
  100. #endif
  101. #ifdef BSP_USING_TIM7
  102. TIM7_CONFIG,
  103. #endif
  104. #ifdef BSP_USING_TIM8
  105. TIM8_CONFIG,
  106. #endif
  107. #ifdef BSP_USING_TIM9
  108. TIM9_CONFIG,
  109. #endif
  110. #ifdef BSP_USING_TIM10
  111. TIM10_CONFIG,
  112. #endif
  113. #ifdef BSP_USING_TIM11
  114. TIM11_CONFIG,
  115. #endif
  116. #ifdef BSP_USING_TIM12
  117. TIM12_CONFIG,
  118. #endif
  119. #ifdef BSP_USING_TIM13
  120. TIM13_CONFIG,
  121. #endif
  122. #ifdef BSP_USING_TIM14
  123. TIM14_CONFIG,
  124. #endif
  125. #ifdef BSP_USING_TIM15
  126. TIM15_CONFIG,
  127. #endif
  128. #ifdef BSP_USING_TIM16
  129. TIM16_CONFIG,
  130. #endif
  131. #ifdef BSP_USING_TIM17
  132. TIM17_CONFIG,
  133. #endif
  134. };
  135. /* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
  136. static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
  137. {
  138. rt_uint32_t flatency = 0;
  139. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  140. RT_ASSERT(pclk1_doubler != RT_NULL);
  141. RT_ASSERT(pclk1_doubler != RT_NULL);
  142. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
  143. *pclk1_doubler = 1;
  144. *pclk2_doubler = 1;
  145. #if defined(SOC_SERIES_STM32MP1)
  146. if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
  147. {
  148. *pclk1_doubler = 2;
  149. }
  150. if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
  151. {
  152. *pclk2_doubler = 2;
  153. }
  154. #else
  155. if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  156. {
  157. *pclk1_doubler = 2;
  158. }
  159. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  160. if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  161. {
  162. *pclk2_doubler = 2;
  163. }
  164. #endif
  165. #endif
  166. }
  167. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  168. {
  169. uint32_t prescaler_value = 0;
  170. uint32_t pclk1_doubler, pclk2_doubler;
  171. TIM_HandleTypeDef *tim = RT_NULL;
  172. struct stm32_hwtimer *tim_device = RT_NULL;
  173. RT_ASSERT(timer != RT_NULL);
  174. if (state)
  175. {
  176. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  177. tim_device = (struct stm32_hwtimer *)timer;
  178. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  179. /* time init */
  180. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  181. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  182. #elif defined(SOC_SERIES_STM32L4)
  183. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  184. #elif defined(SOC_SERIES_STM32WB)
  185. if (tim->Instance == TIM16 || tim->Instance == TIM17)
  186. #elif defined(SOC_SERIES_STM32MP1)
  187. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  188. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  189. if (0)
  190. #endif
  191. {
  192. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  193. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
  194. #endif
  195. }
  196. else
  197. {
  198. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1;
  199. }
  200. tim->Init.Period = 10000 - 1;
  201. tim->Init.Prescaler = prescaler_value;
  202. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  203. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  204. {
  205. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  206. }
  207. else
  208. {
  209. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  210. }
  211. tim->Init.RepetitionCounter = 0;
  212. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB)
  213. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  214. #endif
  215. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  216. {
  217. LOG_E("%s init failed", tim_device->name);
  218. return;
  219. }
  220. else
  221. {
  222. /* set the TIMx priority */
  223. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  224. /* enable the TIMx global Interrupt */
  225. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  226. /* clear update flag */
  227. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  228. /* enable update request source */
  229. __HAL_TIM_URS_ENABLE(tim);
  230. LOG_D("%s init success", tim_device->name);
  231. }
  232. }
  233. }
  234. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  235. {
  236. rt_err_t result = RT_EOK;
  237. TIM_HandleTypeDef *tim = RT_NULL;
  238. RT_ASSERT(timer != RT_NULL);
  239. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  240. /* set tim cnt */
  241. __HAL_TIM_SET_COUNTER(tim, 0);
  242. /* set tim arr */
  243. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  244. if (opmode == HWTIMER_MODE_ONESHOT)
  245. {
  246. /* set timer to single mode */
  247. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  248. }
  249. else
  250. {
  251. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  252. }
  253. /* start timer */
  254. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  255. {
  256. LOG_E("TIM start failed");
  257. result = -RT_ERROR;
  258. }
  259. return result;
  260. }
  261. static void timer_stop(rt_hwtimer_t *timer)
  262. {
  263. TIM_HandleTypeDef *tim = RT_NULL;
  264. RT_ASSERT(timer != RT_NULL);
  265. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  266. /* stop timer */
  267. HAL_TIM_Base_Stop_IT(tim);
  268. /* set tim cnt */
  269. __HAL_TIM_SET_COUNTER(tim, 0);
  270. }
  271. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  272. {
  273. TIM_HandleTypeDef *tim = RT_NULL;
  274. rt_err_t result = -RT_ERROR;
  275. uint32_t pclk1_doubler, pclk2_doubler;
  276. RT_ASSERT(timer != RT_NULL);
  277. RT_ASSERT(arg != RT_NULL);
  278. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  279. switch (cmd)
  280. {
  281. case HWTIMER_CTRL_FREQ_SET:
  282. {
  283. rt_uint32_t freq;
  284. rt_uint16_t val;
  285. /* set timer frequence */
  286. freq = *((rt_uint32_t *)arg);
  287. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  288. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  289. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  290. #elif defined(SOC_SERIES_STM32L4)
  291. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  292. #elif defined(SOC_SERIES_STM32WB)
  293. if (tim->Instance == TIM16 || tim->Instance == TIM17)
  294. #elif defined(SOC_SERIES_STM32MP1)
  295. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  296. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  297. if (0)
  298. #endif
  299. {
  300. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  301. val = HAL_RCC_GetPCLK2Freq() * pclk2_doubler / freq;
  302. #endif
  303. }
  304. else
  305. {
  306. val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq;
  307. }
  308. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  309. /* Update frequency value */
  310. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  311. result = RT_EOK;
  312. }
  313. break;
  314. default:
  315. {
  316. result = -RT_EINVAL;
  317. }
  318. break;
  319. }
  320. return result;
  321. }
  322. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  323. {
  324. TIM_HandleTypeDef *tim = RT_NULL;
  325. RT_ASSERT(timer != RT_NULL);
  326. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  327. return tim->Instance->CNT;
  328. }
  329. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  330. static const struct rt_hwtimer_ops _ops =
  331. {
  332. .init = timer_init,
  333. .start = timer_start,
  334. .stop = timer_stop,
  335. .count_get = timer_counter_get,
  336. .control = timer_ctrl,
  337. };
  338. #ifdef BSP_USING_TIM2
  339. void TIM2_IRQHandler(void)
  340. {
  341. /* enter interrupt */
  342. rt_interrupt_enter();
  343. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  344. /* leave interrupt */
  345. rt_interrupt_leave();
  346. }
  347. #endif
  348. #ifdef BSP_USING_TIM3
  349. void TIM3_IRQHandler(void)
  350. {
  351. /* enter interrupt */
  352. rt_interrupt_enter();
  353. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  354. /* leave interrupt */
  355. rt_interrupt_leave();
  356. }
  357. #endif
  358. #ifdef BSP_USING_TIM4
  359. void TIM4_IRQHandler(void)
  360. {
  361. /* enter interrupt */
  362. rt_interrupt_enter();
  363. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  364. /* leave interrupt */
  365. rt_interrupt_leave();
  366. }
  367. #endif
  368. #ifdef BSP_USING_TIM5
  369. void TIM5_IRQHandler(void)
  370. {
  371. /* enter interrupt */
  372. rt_interrupt_enter();
  373. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  374. /* leave interrupt */
  375. rt_interrupt_leave();
  376. }
  377. #endif
  378. #ifdef BSP_USING_TIM7
  379. void TIM7_IRQHandler(void)
  380. {
  381. /* enter interrupt */
  382. rt_interrupt_enter();
  383. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM7_INDEX].tim_handle);
  384. /* leave interrupt */
  385. rt_interrupt_leave();
  386. }
  387. #endif
  388. #ifdef BSP_USING_TIM11
  389. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  390. {
  391. /* enter interrupt */
  392. rt_interrupt_enter();
  393. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  394. /* leave interrupt */
  395. rt_interrupt_leave();
  396. }
  397. #endif
  398. #ifdef BSP_USING_TIM13
  399. void TIM8_UP_TIM13_IRQHandler(void)
  400. {
  401. /* enter interrupt */
  402. rt_interrupt_enter();
  403. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  404. /* leave interrupt */
  405. rt_interrupt_leave();
  406. }
  407. #endif
  408. #ifdef BSP_USING_TIM14
  409. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  410. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  411. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  412. void TIM14_IRQHandler(void)
  413. #endif
  414. {
  415. /* enter interrupt */
  416. rt_interrupt_enter();
  417. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  418. /* leave interrupt */
  419. rt_interrupt_leave();
  420. }
  421. #endif
  422. #ifdef BSP_USING_TIM15
  423. void TIM1_BRK_TIM15_IRQHandler(void)
  424. {
  425. /* enter interrupt */
  426. rt_interrupt_enter();
  427. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  428. /* leave interrupt */
  429. rt_interrupt_leave();
  430. }
  431. #endif
  432. #ifdef BSP_USING_TIM16
  433. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB)
  434. void TIM1_UP_TIM16_IRQHandler(void)
  435. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  436. void TIM16_IRQHandler(void)
  437. #endif
  438. {
  439. /* enter interrupt */
  440. rt_interrupt_enter();
  441. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  442. /* leave interrupt */
  443. rt_interrupt_leave();
  444. }
  445. #endif
  446. #ifdef BSP_USING_TIM17
  447. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB)
  448. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  449. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  450. void TIM17_IRQHandler(void)
  451. #endif
  452. {
  453. /* enter interrupt */
  454. rt_interrupt_enter();
  455. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  456. /* leave interrupt */
  457. rt_interrupt_leave();
  458. }
  459. #endif
  460. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  461. {
  462. #ifdef BSP_USING_TIM2
  463. if (htim->Instance == TIM2)
  464. {
  465. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  466. }
  467. #endif
  468. #ifdef BSP_USING_TIM3
  469. if (htim->Instance == TIM3)
  470. {
  471. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  472. }
  473. #endif
  474. #ifdef BSP_USING_TIM4
  475. if (htim->Instance == TIM4)
  476. {
  477. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  478. }
  479. #endif
  480. #ifdef BSP_USING_TIM5
  481. if (htim->Instance == TIM5)
  482. {
  483. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  484. }
  485. #endif
  486. #ifdef BSP_USING_TIM7
  487. if (htim->Instance == TIM7)
  488. {
  489. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM7_INDEX].time_device);
  490. }
  491. #endif
  492. #ifdef BSP_USING_TIM11
  493. if (htim->Instance == TIM11)
  494. {
  495. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  496. }
  497. #endif
  498. #ifdef BSP_USING_TIM13
  499. if (htim->Instance == TIM13)
  500. {
  501. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  502. }
  503. #endif
  504. #ifdef BSP_USING_TIM14
  505. if (htim->Instance == TIM14)
  506. {
  507. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  508. }
  509. #endif
  510. #ifdef BSP_USING_TIM15
  511. if (htim->Instance == TIM15)
  512. {
  513. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  514. }
  515. #endif
  516. #ifdef BSP_USING_TIM16
  517. if (htim->Instance == TIM16)
  518. {
  519. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  520. }
  521. #endif
  522. #ifdef BSP_USING_TIM17
  523. if (htim->Instance == TIM17)
  524. {
  525. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  526. }
  527. #endif
  528. }
  529. static int stm32_hwtimer_init(void)
  530. {
  531. int i = 0;
  532. int result = RT_EOK;
  533. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  534. {
  535. stm32_hwtimer_obj[i].time_device.info = &_info;
  536. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  537. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device,
  538. stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  539. {
  540. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  541. }
  542. else
  543. {
  544. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  545. result = -RT_ERROR;
  546. }
  547. }
  548. return result;
  549. }
  550. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  551. #endif /* RT_USING_HWTIMER */
  552. #endif /* BSP_USING_TIM */