drv_gpio.h 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-04-16 bigmagic first version
  9. */
  10. #ifndef __DRV_GPIO_H__
  11. #define __DRV_GPIO_H__
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include "board.h"
  15. #include "interrupt.h"
  16. #define GPIO_REG_GPFSEL0(BASE) HWREG32(BASE + 0x00)
  17. #define GPIO_REG_GPFSEL1(BASE) HWREG32(BASE + 0x04)
  18. #define GPIO_REG_GPFSEL2(BASE) HWREG32(BASE + 0x08)
  19. #define GPIO_REG_GPFSEL3(BASE) HWREG32(BASE + 0x0C)
  20. #define GPIO_REG_GPFSEL4(BASE) HWREG32(BASE + 0x10)
  21. #define GPIO_REG_GPFSEL5(BASE) HWREG32(BASE + 0x14)
  22. #define GPIO_REG_REV0(BASE) HWREG32(BASE + 0x18)
  23. #define GPIO_REG_GPSET0(BASE) HWREG32(BASE + 0x1C)
  24. #define GPIO_REG_GPSET1(BASE) HWREG32(BASE + 0x20)
  25. #define GPIO_REG_REV1(BASE) HWREG32(BASE + 0x24)
  26. #define GPIO_REG_GPCLR0(BASE) HWREG32(BASE + 0x28)
  27. #define GPIO_REG_GPCLR1(BASE) HWREG32(BASE + 0x2C)
  28. #define GPIO_REG_REV2(BASE) HWREG32(BASE + 0x30)
  29. #define GPIO_REG_GPLEV0(BASE) HWREG32(BASE + 0x34)
  30. #define GPIO_REG_GPLEV1(BASE) HWREG32(BASE + 0x38)
  31. #define GPIO_REG_REV3(BASE) HWREG32(BASE + 0x3C)
  32. #define GPIO_REG_GPEDS0(BASE) HWREG32(BASE + 0x40)
  33. #define GPIO_REG_GPEDS1(BASE) HWREG32(BASE + 0x44)
  34. #define GPIO_REG_REV4(BASE) HWREG32(BASE + 0x48)
  35. #define GPIO_REG_GPREN0(BASE) HWREG32(BASE + 0x4C)
  36. #define GPIO_REG_GPREN1(BASE) HWREG32(BASE + 0x50)
  37. #define GPIO_REG_REV5(BASE) HWREG32(BASE + 0x54)
  38. #define GPIO_REG_GPFEN0(BASE) HWREG32(BASE + 0x58)
  39. #define GPIO_REG_GPFEN1(BASE) HWREG32(BASE + 0x5C)
  40. #define GPIO_REG_REV6(BASE) HWREG32(BASE + 0x60)
  41. #define GPIO_REG_GPHEN0(BASE) HWREG32(BASE + 0x64)
  42. #define GPIO_REG_GPHEN1(BASE) HWREG32(BASE + 0x68)
  43. #define GPIO_REG_REV7(BASE) HWREG32(BASE + 0x6C)
  44. #define GPIO_REG_GPLEN0(BASE) HWREG32(BASE + 0x70)
  45. #define GPIO_REG_GPLEN1(BASE) HWREG32(BASE + 0x74)
  46. #define GPIO_REG_REV8(BASE) HWREG32(BASE + 0x78)
  47. #define GPIO_REG_GPAREN0(BASE) HWREG32(BASE + 0x7C)
  48. #define GPIO_REG_GPAREN1(BASE) HWREG32(BASE + 0x80)
  49. #define GPIO_REG_REV11(BASE) HWREG32(BASE + 0x84)
  50. #define GPIO_REG_GPAFEN0(BASE) HWREG32(BASE + 0x88)
  51. #define GPIO_REG_GPAFEN1(BASE) HWREG32(BASE + 0x8C)
  52. #define GPIO_REG_REV10(BASE) HWREG32(BASE + 0x90)
  53. #define GPIO_REG_GPPUD(BASE) HWREG32(BASE + 0x94)
  54. #define GPIO_REG_GPPUDCLK0(BASE) HWREG32(BASE + 0x98)
  55. #define GPIO_REG_GPPUDCLK1(BASE) HWREG32(BASE + 0x9C)
  56. #define GPIO_REG_REV9(BASE) HWREG32(BASE + 0xA0)
  57. #define GPIO_REG_TEST(BASE) HWREG32(BASE + 0xA4)
  58. typedef enum {
  59. GPIO_PIN_0,
  60. GPIO_PIN_1,
  61. GPIO_PIN_2,
  62. GPIO_PIN_3,
  63. GPIO_PIN_4,
  64. GPIO_PIN_5,
  65. GPIO_PIN_6,
  66. GPIO_PIN_7,
  67. GPIO_PIN_8,
  68. GPIO_PIN_9,
  69. GPIO_PIN_10,
  70. GPIO_PIN_11,
  71. GPIO_PIN_12,
  72. GPIO_PIN_13,
  73. GPIO_PIN_14,
  74. GPIO_PIN_15,
  75. GPIO_PIN_16,
  76. GPIO_PIN_17,
  77. GPIO_PIN_18,
  78. GPIO_PIN_19,
  79. GPIO_PIN_20,
  80. GPIO_PIN_21,
  81. GPIO_PIN_22,
  82. GPIO_PIN_23,
  83. GPIO_PIN_24,
  84. GPIO_PIN_25,
  85. GPIO_PIN_26,
  86. GPIO_PIN_27,
  87. GPIO_PIN_28,
  88. GPIO_PIN_29,
  89. GPIO_PIN_30,
  90. GPIO_PIN_31,
  91. GPIO_PIN_32,
  92. GPIO_PIN_33,
  93. GPIO_PIN_34,
  94. GPIO_PIN_35,
  95. GPIO_PIN_36,
  96. GPIO_PIN_37,
  97. GPIO_PIN_38,
  98. GPIO_PIN_39,
  99. GPIO_PIN_40,
  100. } GPIO_PIN;
  101. typedef enum {
  102. INPUT = 0b000,
  103. OUTPUT = 0b001,
  104. ALT0 = 0b100,
  105. ALT1 = 0b101,
  106. ALT2 = 0b110,
  107. ALT3 = 0b111,
  108. ALT4 = 0b011,
  109. ALT5 = 0b010
  110. } GPIO_FUNC;
  111. void prev_raspi_pin_mode(GPIO_PIN pin, GPIO_FUNC mode);
  112. void prev_raspi_pin_write(GPIO_PIN pin, int pin_value);
  113. int rt_hw_gpio_init(void);
  114. #endif /* __DRV_GPIO_H__ */