mmcsd_core.c 18 KB

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  1. /*
  2. * File : mmcsd_core.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2011-07-25 weety first version
  23. */
  24. #include <rtthread.h>
  25. #include <drivers/mmcsd_core.h>
  26. #include <drivers/sd.h>
  27. #include <drivers/mmc.h>
  28. #include <drivers/sdio.h>
  29. #define DBG_ENABLE
  30. #define DBG_SECTION_NAME "[SDIO]"
  31. #ifdef RT_SDIO_DEBUG
  32. #define DBG_LEVEL DBG_LOG
  33. #else
  34. #define DBG_LEVEL DBG_INFO
  35. #endif /* RT_SDIO_DEBUG */
  36. #define DBG_COLOR
  37. #include <rtdbg.h>
  38. #ifndef RT_MMCSD_STACK_SIZE
  39. #define RT_MMCSD_STACK_SIZE 1024
  40. #endif
  41. #ifndef RT_MMCSD_THREAD_PREORITY
  42. #if (RT_THREAD_PRIORITY_MAX == 32)
  43. #define RT_MMCSD_THREAD_PREORITY 0x16
  44. #else
  45. #define RT_MMCSD_THREAD_PREORITY 0x40
  46. #endif
  47. #endif
  48. //static struct rt_semaphore mmcsd_sem;
  49. static struct rt_thread mmcsd_detect_thread;
  50. static rt_uint8_t mmcsd_stack[RT_MMCSD_STACK_SIZE];
  51. static struct rt_mailbox mmcsd_detect_mb;
  52. static rt_uint32_t mmcsd_detect_mb_pool[4];
  53. static struct rt_mailbox mmcsd_hotpluge_mb;
  54. static rt_uint32_t mmcsd_hotpluge_mb_pool[4];
  55. void mmcsd_host_lock(struct rt_mmcsd_host *host)
  56. {
  57. rt_mutex_take(&host->bus_lock, RT_WAITING_FOREVER);
  58. }
  59. void mmcsd_host_unlock(struct rt_mmcsd_host *host)
  60. {
  61. rt_mutex_release(&host->bus_lock);
  62. }
  63. void mmcsd_req_complete(struct rt_mmcsd_host *host)
  64. {
  65. rt_sem_release(&host->sem_ack);
  66. }
  67. void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  68. {
  69. do {
  70. req->cmd->retries--;
  71. req->cmd->err = 0;
  72. req->cmd->mrq = req;
  73. if (req->data)
  74. {
  75. req->cmd->data = req->data;
  76. req->data->err = 0;
  77. req->data->mrq = req;
  78. if (req->stop)
  79. {
  80. req->data->stop = req->stop;
  81. req->stop->err = 0;
  82. req->stop->mrq = req;
  83. }
  84. }
  85. host->ops->request(host, req);
  86. rt_sem_take(&host->sem_ack, RT_WAITING_FOREVER);
  87. } while(req->cmd->err && (req->cmd->retries > 0));
  88. }
  89. rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host,
  90. struct rt_mmcsd_cmd *cmd,
  91. int retries)
  92. {
  93. struct rt_mmcsd_req req;
  94. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  95. rt_memset(cmd->resp, 0, sizeof(cmd->resp));
  96. cmd->retries = retries;
  97. req.cmd = cmd;
  98. cmd->data = RT_NULL;
  99. mmcsd_send_request(host, &req);
  100. return cmd->err;
  101. }
  102. rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host)
  103. {
  104. rt_int32_t err;
  105. struct rt_mmcsd_cmd cmd;
  106. if (!controller_is_spi(host))
  107. {
  108. mmcsd_set_chip_select(host, MMCSD_CS_HIGH);
  109. mmcsd_delay_ms(1);
  110. }
  111. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  112. cmd.cmd_code = GO_IDLE_STATE;
  113. cmd.arg = 0;
  114. cmd.flags = RESP_SPI_R1 | RESP_NONE | CMD_BC;
  115. err = mmcsd_send_cmd(host, &cmd, 0);
  116. mmcsd_delay_ms(1);
  117. if (!controller_is_spi(host))
  118. {
  119. mmcsd_set_chip_select(host, MMCSD_CS_IGNORE);
  120. mmcsd_delay_ms(1);
  121. }
  122. return err;
  123. }
  124. rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host,
  125. rt_int32_t high_capacity,
  126. rt_uint32_t *ocr)
  127. {
  128. struct rt_mmcsd_cmd cmd;
  129. rt_int32_t err;
  130. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  131. cmd.cmd_code = SPI_READ_OCR;
  132. cmd.arg = high_capacity ? (1 << 30) : 0;
  133. cmd.flags = RESP_SPI_R3;
  134. err = mmcsd_send_cmd(host, &cmd, 0);
  135. *ocr = cmd.resp[1];
  136. return err;
  137. }
  138. rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  139. {
  140. rt_int32_t err;
  141. struct rt_mmcsd_cmd cmd;
  142. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  143. cmd.cmd_code = ALL_SEND_CID;
  144. cmd.arg = 0;
  145. cmd.flags = RESP_R2 | CMD_BCR;
  146. err = mmcsd_send_cmd(host, &cmd, 3);
  147. if (err)
  148. return err;
  149. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  150. return 0;
  151. }
  152. rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  153. {
  154. rt_int32_t err, i;
  155. struct rt_mmcsd_req req;
  156. struct rt_mmcsd_cmd cmd;
  157. struct rt_mmcsd_data data;
  158. rt_uint32_t *buf = RT_NULL;
  159. if (!controller_is_spi(host))
  160. {
  161. if (!host->card)
  162. return -RT_ERROR;
  163. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  164. cmd.cmd_code = SEND_CID;
  165. cmd.arg = host->card->rca << 16;
  166. cmd.flags = RESP_R2 | CMD_AC;
  167. err = mmcsd_send_cmd(host, &cmd, 3);
  168. if (err)
  169. return err;
  170. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  171. return 0;
  172. }
  173. buf = (rt_uint32_t *)rt_malloc(16);
  174. if (!buf)
  175. {
  176. LOG_E("allocate memory failed!");
  177. return -RT_ENOMEM;
  178. }
  179. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  180. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  181. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  182. req.cmd = &cmd;
  183. req.data = &data;
  184. cmd.cmd_code = SEND_CID;
  185. cmd.arg = 0;
  186. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  187. * rely on callers to never use this with "native" calls for reading
  188. * CSD or CID. Native versions of those commands use the R2 type,
  189. * not R1 plus a data block.
  190. */
  191. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  192. data.blksize = 16;
  193. data.blks = 1;
  194. data.flags = DATA_DIR_READ;
  195. data.buf = buf;
  196. /*
  197. * The spec states that CSR and CID accesses have a timeout
  198. * of 64 clock cycles.
  199. */
  200. data.timeout_ns = 0;
  201. data.timeout_clks = 64;
  202. mmcsd_send_request(host, &req);
  203. if (cmd.err || data.err)
  204. {
  205. rt_free(buf);
  206. return -RT_ERROR;
  207. }
  208. for (i = 0;i < 4;i++)
  209. cid[i] = buf[i];
  210. rt_free(buf);
  211. return 0;
  212. }
  213. rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd)
  214. {
  215. rt_int32_t err, i;
  216. struct rt_mmcsd_req req;
  217. struct rt_mmcsd_cmd cmd;
  218. struct rt_mmcsd_data data;
  219. rt_uint32_t *buf = RT_NULL;
  220. if (!controller_is_spi(card->host))
  221. {
  222. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  223. cmd.cmd_code = SEND_CSD;
  224. cmd.arg = card->rca << 16;
  225. cmd.flags = RESP_R2 | CMD_AC;
  226. err = mmcsd_send_cmd(card->host, &cmd, 3);
  227. if (err)
  228. return err;
  229. rt_memcpy(csd, cmd.resp, sizeof(rt_uint32_t) * 4);
  230. return 0;
  231. }
  232. buf = (rt_uint32_t*)rt_malloc(16);
  233. if (!buf)
  234. {
  235. LOG_E("allocate memory failed!");
  236. return -RT_ENOMEM;
  237. }
  238. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  239. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  240. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  241. req.cmd = &cmd;
  242. req.data = &data;
  243. cmd.cmd_code = SEND_CSD;
  244. cmd.arg = 0;
  245. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  246. * rely on callers to never use this with "native" calls for reading
  247. * CSD or CID. Native versions of those commands use the R2 type,
  248. * not R1 plus a data block.
  249. */
  250. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  251. data.blksize = 16;
  252. data.blks = 1;
  253. data.flags = DATA_DIR_READ;
  254. data.buf = buf;
  255. /*
  256. * The spec states that CSR and CID accesses have a timeout
  257. * of 64 clock cycles.
  258. */
  259. data.timeout_ns = 0;
  260. data.timeout_clks = 64;
  261. mmcsd_send_request(card->host, &req);
  262. if (cmd.err || data.err)
  263. {
  264. rt_free(buf);
  265. return -RT_ERROR;
  266. }
  267. for (i = 0;i < 4;i++)
  268. csd[i] = buf[i];
  269. rt_free(buf);
  270. return 0;
  271. }
  272. static rt_int32_t _mmcsd_select_card(struct rt_mmcsd_host *host,
  273. struct rt_mmcsd_card *card)
  274. {
  275. rt_int32_t err;
  276. struct rt_mmcsd_cmd cmd;
  277. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  278. cmd.cmd_code = SELECT_CARD;
  279. if (card)
  280. {
  281. cmd.arg = card->rca << 16;
  282. cmd.flags = RESP_R1 | CMD_AC;
  283. }
  284. else
  285. {
  286. cmd.arg = 0;
  287. cmd.flags = RESP_NONE | CMD_AC;
  288. }
  289. err = mmcsd_send_cmd(host, &cmd, 3);
  290. if (err)
  291. return err;
  292. return 0;
  293. }
  294. rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card)
  295. {
  296. return _mmcsd_select_card(card->host, card);
  297. }
  298. rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *card)
  299. {
  300. return _mmcsd_select_card(card->host, RT_NULL);
  301. }
  302. rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc)
  303. {
  304. struct rt_mmcsd_cmd cmd;
  305. rt_int32_t err;
  306. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  307. cmd.cmd_code = SPI_CRC_ON_OFF;
  308. cmd.flags = RESP_SPI_R1;
  309. cmd.arg = use_crc;
  310. err = mmcsd_send_cmd(host, &cmd, 0);
  311. if (!err)
  312. host->spi_use_crc = use_crc;
  313. return err;
  314. }
  315. rt_inline void mmcsd_set_iocfg(struct rt_mmcsd_host *host)
  316. {
  317. struct rt_mmcsd_io_cfg *io_cfg = &host->io_cfg;
  318. mmcsd_dbg("clock %uHz busmode %u powermode %u cs %u Vdd %u "
  319. "width %u \n",
  320. io_cfg->clock, io_cfg->bus_mode,
  321. io_cfg->power_mode, io_cfg->chip_select, io_cfg->vdd,
  322. io_cfg->bus_width);
  323. host->ops->set_iocfg(host, io_cfg);
  324. }
  325. /*
  326. * Control chip select pin on a host.
  327. */
  328. void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode)
  329. {
  330. host->io_cfg.chip_select = mode;
  331. mmcsd_set_iocfg(host);
  332. }
  333. /*
  334. * Sets the host clock to the highest possible frequency that
  335. * is below "hz".
  336. */
  337. void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk)
  338. {
  339. if (clk < host->freq_min)
  340. {
  341. LOG_W("clock too low!");
  342. }
  343. host->io_cfg.clock = clk;
  344. mmcsd_set_iocfg(host);
  345. }
  346. /*
  347. * Change the bus mode (open drain/push-pull) of a host.
  348. */
  349. void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode)
  350. {
  351. host->io_cfg.bus_mode = mode;
  352. mmcsd_set_iocfg(host);
  353. }
  354. /*
  355. * Change data bus width of a host.
  356. */
  357. void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width)
  358. {
  359. host->io_cfg.bus_width = width;
  360. mmcsd_set_iocfg(host);
  361. }
  362. void mmcsd_set_data_timeout(struct rt_mmcsd_data *data,
  363. const struct rt_mmcsd_card *card)
  364. {
  365. rt_uint32_t mult;
  366. if (card->card_type == CARD_TYPE_SDIO)
  367. {
  368. data->timeout_ns = 1000000000; /* SDIO card 1s */
  369. data->timeout_clks = 0;
  370. return;
  371. }
  372. /*
  373. * SD cards use a 100 multiplier rather than 10
  374. */
  375. mult = (card->card_type == CARD_TYPE_SD) ? 100 : 10;
  376. /*
  377. * Scale up the multiplier (and therefore the timeout) by
  378. * the r2w factor for writes.
  379. */
  380. if (data->flags & DATA_DIR_WRITE)
  381. mult <<= card->csd.r2w_factor;
  382. data->timeout_ns = card->tacc_ns * mult;
  383. data->timeout_clks = card->tacc_clks * mult;
  384. /*
  385. * SD cards also have an upper limit on the timeout.
  386. */
  387. if (card->card_type == CARD_TYPE_SD)
  388. {
  389. rt_uint32_t timeout_us, limit_us;
  390. timeout_us = data->timeout_ns / 1000;
  391. timeout_us += data->timeout_clks * 1000 /
  392. (card->host->io_cfg.clock / 1000);
  393. if (data->flags & DATA_DIR_WRITE)
  394. /*
  395. * The limit is really 250 ms, but that is
  396. * insufficient for some crappy cards.
  397. */
  398. limit_us = 300000;
  399. else
  400. limit_us = 100000;
  401. /*
  402. * SDHC cards always use these fixed values.
  403. */
  404. if (timeout_us > limit_us || card->flags & CARD_FLAG_SDHC)
  405. {
  406. data->timeout_ns = limit_us * 1000; /* SDHC card fixed 250ms */
  407. data->timeout_clks = 0;
  408. }
  409. }
  410. if (controller_is_spi(card->host))
  411. {
  412. if (data->flags & DATA_DIR_WRITE)
  413. {
  414. if (data->timeout_ns < 1000000000)
  415. data->timeout_ns = 1000000000; /* 1s */
  416. }
  417. else
  418. {
  419. if (data->timeout_ns < 100000000)
  420. data->timeout_ns = 100000000; /* 100ms */
  421. }
  422. }
  423. }
  424. /*
  425. * Mask off any voltages we don't support and select
  426. * the lowest voltage
  427. */
  428. rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr)
  429. {
  430. int bit;
  431. extern int __rt_ffs(int value);
  432. ocr &= host->valid_ocr;
  433. bit = __rt_ffs(ocr);
  434. if (bit)
  435. {
  436. bit -= 1;
  437. ocr &= 3 << bit;
  438. host->io_cfg.vdd = bit;
  439. mmcsd_set_iocfg(host);
  440. }
  441. else
  442. {
  443. LOG_W("host doesn't support card's voltages!");
  444. ocr = 0;
  445. }
  446. return ocr;
  447. }
  448. static void mmcsd_power_up(struct rt_mmcsd_host *host)
  449. {
  450. int bit = __rt_fls(host->valid_ocr) - 1;
  451. host->io_cfg.vdd = bit;
  452. if (controller_is_spi(host))
  453. {
  454. host->io_cfg.chip_select = MMCSD_CS_HIGH;
  455. host->io_cfg.bus_mode = MMCSD_BUSMODE_PUSHPULL;
  456. }
  457. else
  458. {
  459. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  460. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  461. }
  462. host->io_cfg.power_mode = MMCSD_POWER_UP;
  463. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  464. mmcsd_set_iocfg(host);
  465. /*
  466. * This delay should be sufficient to allow the power supply
  467. * to reach the minimum voltage.
  468. */
  469. mmcsd_delay_ms(10);
  470. host->io_cfg.clock = host->freq_min;
  471. host->io_cfg.power_mode = MMCSD_POWER_ON;
  472. mmcsd_set_iocfg(host);
  473. /*
  474. * This delay must be at least 74 clock sizes, or 1 ms, or the
  475. * time required to reach a stable voltage.
  476. */
  477. mmcsd_delay_ms(10);
  478. }
  479. static void mmcsd_power_off(struct rt_mmcsd_host *host)
  480. {
  481. host->io_cfg.clock = 0;
  482. host->io_cfg.vdd = 0;
  483. if (!controller_is_spi(host))
  484. {
  485. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  486. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  487. }
  488. host->io_cfg.power_mode = MMCSD_POWER_OFF;
  489. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  490. mmcsd_set_iocfg(host);
  491. }
  492. int mmcsd_wait_cd_changed(rt_int32_t timeout)
  493. {
  494. struct rt_mmcsd_host *host;
  495. if (rt_mb_recv(&mmcsd_hotpluge_mb, (rt_uint32_t*)&host, timeout) == RT_EOK)
  496. {
  497. if(host->card == RT_NULL)
  498. {
  499. return MMCSD_HOST_UNPLUGED;
  500. }
  501. else
  502. {
  503. return MMCSD_HOST_PLUGED;
  504. }
  505. }
  506. return -RT_ETIMEOUT;
  507. }
  508. RTM_EXPORT(mmcsd_wait_cd_changed);
  509. void mmcsd_change(struct rt_mmcsd_host *host)
  510. {
  511. rt_mb_send(&mmcsd_detect_mb, (rt_uint32_t)host);
  512. }
  513. void mmcsd_detect(void *param)
  514. {
  515. struct rt_mmcsd_host *host;
  516. rt_uint32_t ocr;
  517. rt_int32_t err;
  518. while (1)
  519. {
  520. if (rt_mb_recv(&mmcsd_detect_mb, (rt_uint32_t*)&host, RT_WAITING_FOREVER) == RT_EOK)
  521. {
  522. if (host->card == RT_NULL)
  523. {
  524. mmcsd_host_lock(host);
  525. mmcsd_power_up(host);
  526. mmcsd_go_idle(host);
  527. mmcsd_send_if_cond(host, host->valid_ocr);
  528. err = sdio_io_send_op_cond(host, 0, &ocr);
  529. if (!err)
  530. {
  531. if (init_sdio(host, ocr))
  532. mmcsd_power_off(host);
  533. mmcsd_host_unlock(host);
  534. continue;
  535. }
  536. /*
  537. * detect SD card
  538. */
  539. err = mmcsd_send_app_op_cond(host, 0, &ocr);
  540. if (!err)
  541. {
  542. if (init_sd(host, ocr))
  543. mmcsd_power_off(host);
  544. mmcsd_host_unlock(host);
  545. rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
  546. continue;
  547. }
  548. /*
  549. * detect mmc card
  550. */
  551. err = mmc_send_op_cond(host, 0, &ocr);
  552. if (!err)
  553. {
  554. if (init_mmc(host, ocr))
  555. mmcsd_power_off(host);
  556. mmcsd_host_unlock(host);
  557. rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
  558. continue;
  559. }
  560. mmcsd_host_unlock(host);
  561. }
  562. else
  563. {
  564. /* card removed */
  565. mmcsd_host_lock(host);
  566. if (host->card->sdio_function_num != 0)
  567. {
  568. LOG_W("unsupport sdio card plug out!");
  569. }
  570. else
  571. {
  572. rt_mmcsd_blk_remove(host->card);
  573. rt_free(host->card);
  574. host->card = RT_NULL;
  575. }
  576. mmcsd_host_unlock(host);
  577. rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
  578. }
  579. }
  580. }
  581. }
  582. struct rt_mmcsd_host *mmcsd_alloc_host(void)
  583. {
  584. struct rt_mmcsd_host *host;
  585. host = rt_malloc(sizeof(struct rt_mmcsd_host));
  586. if (!host)
  587. {
  588. LOG_E("alloc host failed");
  589. return RT_NULL;
  590. }
  591. rt_memset(host, 0, sizeof(struct rt_mmcsd_host));
  592. host->max_seg_size = 65535;
  593. host->max_dma_segs = 1;
  594. host->max_blk_size = 512;
  595. host->max_blk_count = 4096;
  596. rt_mutex_init(&host->bus_lock, "sd_bus_lock", RT_IPC_FLAG_FIFO);
  597. rt_sem_init(&host->sem_ack, "sd_ack", 0, RT_IPC_FLAG_FIFO);
  598. return host;
  599. }
  600. void mmcsd_free_host(struct rt_mmcsd_host *host)
  601. {
  602. rt_mutex_detach(&host->bus_lock);
  603. rt_sem_detach(&host->sem_ack);
  604. rt_free(host);
  605. }
  606. int rt_mmcsd_core_init(void)
  607. {
  608. rt_err_t ret;
  609. /* initialize detect SD cart thread */
  610. /* initialize mailbox and create detect SD card thread */
  611. ret = rt_mb_init(&mmcsd_detect_mb, "mmcsdmb",
  612. &mmcsd_detect_mb_pool[0], sizeof(mmcsd_detect_mb_pool) / sizeof(mmcsd_detect_mb_pool[0]),
  613. RT_IPC_FLAG_FIFO);
  614. RT_ASSERT(ret == RT_EOK);
  615. ret = rt_mb_init(&mmcsd_hotpluge_mb, "mmcsdhotplugmb",
  616. &mmcsd_hotpluge_mb_pool[0], sizeof(mmcsd_hotpluge_mb_pool) / sizeof(mmcsd_hotpluge_mb_pool[0]),
  617. RT_IPC_FLAG_FIFO);
  618. RT_ASSERT(ret == RT_EOK);
  619. ret = rt_thread_init(&mmcsd_detect_thread, "mmcsd_detect", mmcsd_detect, RT_NULL,
  620. &mmcsd_stack[0], RT_MMCSD_STACK_SIZE, RT_MMCSD_THREAD_PREORITY, 20);
  621. if (ret == RT_EOK)
  622. {
  623. rt_thread_startup(&mmcsd_detect_thread);
  624. }
  625. rt_sdio_init();
  626. return 0;
  627. }
  628. INIT_PREV_EXPORT(rt_mmcsd_core_init);