drv_spi.h 1.1 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-10-28 0xcccccccccccc Initial Version
  9. */
  10. /**
  11. * @addtogroup ls2k
  12. */
  13. /*@{*/
  14. #ifndef LS2K_DRV_SPI_H
  15. #define LS2K_DRV_SPI_H
  16. #include <rtthread.h>
  17. #include <rthw.h>
  18. // kseg1 byte operation
  19. #define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
  20. #define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)
  21. // clock configurations
  22. #define APB_MAX_SPEED 125000000U
  23. #define APB_FREQSCALE (((KSEG1_LOAD8(0xffffffffbfe104d2)>>4)&0x7)+1)
  24. // base addrs
  25. #define SPI_BASE 0x1fff0220
  26. #define PMON_ADDR 0xa1000000
  27. #define FLASH_ADDR 0x000000
  28. // bit bias
  29. #define SPCR 0x0
  30. #define SPSR 0x1
  31. #define FIFO 0x2
  32. #define TXFIFO 0x2
  33. #define RXFIFO 0x2
  34. #define SPER 0x3
  35. #define PARAM 0x4
  36. #define SOFTCS 0x5
  37. #define PARAM2 0x6
  38. #define RFEMPTY 1
  39. // SPI controller operaion macros
  40. #define SET_SPI(addr,val) KSEG1_STORE8(SPI_BASE+addr,val)
  41. #define GET_SPI(addr) KSEG1_LOAD8(SPI_BASE+addr)
  42. #endif
  43. /*@}*/