context_rvds.S 4.4 KB

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  1. ;/*
  2. ; * File : context_rvds.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2009 - 2011, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2011-02-23 Bernard first version
  13. ; */
  14. NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
  15. NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
  16. NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
  17. NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
  18. AREA |.text|, CODE, READONLY, ALIGN=2
  19. THUMB
  20. REQUIRE8
  21. PRESERVE8
  22. IMPORT rt_thread_switch_interrput_flag
  23. IMPORT rt_interrupt_from_thread
  24. IMPORT rt_interrupt_to_thread
  25. ;/*
  26. ; * rt_base_t rt_hw_interrupt_disable();
  27. ; */
  28. rt_hw_interrupt_disable PROC
  29. EXPORT rt_hw_interrupt_disable
  30. MRS r0, PRIMASK
  31. CPSID I
  32. BX LR
  33. ENDP
  34. ;/*
  35. ; * void rt_hw_interrupt_enable(rt_base_t level);
  36. ; */
  37. rt_hw_interrupt_enable PROC
  38. EXPORT rt_hw_interrupt_enable
  39. MSR PRIMASK, r0
  40. BX LR
  41. ENDP
  42. ;/*
  43. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  44. ; * r0 --> from
  45. ; * r1 --> to
  46. ; */
  47. rt_hw_context_switch_interrupt
  48. EXPORT rt_hw_context_switch_interrupt
  49. rt_hw_context_switch PROC
  50. EXPORT rt_hw_context_switch
  51. ; set rt_thread_switch_interrput_flag to 1
  52. LDR r2, =rt_thread_switch_interrput_flag
  53. LDR r3, [r2]
  54. CMP r3, #1
  55. BEQ _reswitch
  56. MOV r3, #1
  57. STR r3, [r2]
  58. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  59. STR r0, [r2]
  60. _reswitch
  61. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  62. STR r1, [r2]
  63. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  64. LDR r1, =NVIC_PENDSVSET
  65. STR r1, [r0]
  66. BX LR
  67. ENDP
  68. ; r0 --> swith from thread stack
  69. ; r1 --> swith to thread stack
  70. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  71. rt_hw_pend_sv PROC
  72. EXPORT rt_hw_pend_sv
  73. ; disable interrupt to protect context switch
  74. MRS r2, PRIMASK
  75. CPSID I
  76. ; get rt_thread_switch_interrupt_flag
  77. LDR r0, =rt_thread_switch_interrput_flag
  78. LDR r1, [r0]
  79. CBZ r1, pendsv_exit ; pendsv already handled
  80. ; clear rt_thread_switch_interrput_flag to 0
  81. MOV r1, #0x00
  82. STR r1, [r0]
  83. LDR r0, =rt_interrupt_from_thread
  84. LDR r1, [r0]
  85. CBZ r1, swtich_to_thread ; skip register save at the first time
  86. MRS r1, psp ; get from thread stack pointer
  87. STMFD r1!, {r4 - r11} ; push r4 - r11 register
  88. LDR r0, [r0]
  89. STR r1, [r0] ; update from thread stack pointer
  90. swtich_to_thread
  91. LDR r1, =rt_interrupt_to_thread
  92. LDR r1, [r1]
  93. LDR r1, [r1] ; load thread stack pointer
  94. LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
  95. MSR psp, r1 ; update stack pointer
  96. pendsv_exit
  97. ; restore interrupt
  98. MSR PRIMASK, r2
  99. ORR lr, lr, #0x04
  100. BX lr
  101. ENDP
  102. ;/*
  103. ; * void rt_hw_context_switch_to(rt_uint32 to);
  104. ; * r0 --> to
  105. ; * this fucntion is used to perform the first thread switch
  106. ; */
  107. rt_hw_context_switch_to PROC
  108. EXPORT rt_hw_context_switch_to
  109. ; set to thread
  110. LDR r1, =rt_interrupt_to_thread
  111. STR r0, [r1]
  112. ; set from thread to 0
  113. LDR r1, =rt_interrupt_from_thread
  114. MOV r0, #0x0
  115. STR r0, [r1]
  116. ; set interrupt flag to 1
  117. LDR r1, =rt_thread_switch_interrput_flag
  118. MOV r0, #1
  119. STR r0, [r1]
  120. ; set the PendSV exception priority
  121. LDR r0, =NVIC_SYSPRI2
  122. LDR r1, =NVIC_PENDSV_PRI
  123. LDR.W r2, [r0,#0x00] ; read
  124. ORR r1,r1,r2 ; modify
  125. STR r1, [r0] ; write-back
  126. ; trigger the PendSV exception (causes context switch)
  127. LDR r0, =NVIC_INT_CTRL
  128. LDR r1, =NVIC_PENDSVSET
  129. STR r1, [r0]
  130. ; enable interrupts at processor level
  131. CPSIE I
  132. ; never reach here!
  133. ENDP
  134. END