usb_glue_kendryte.c 4.6 KB

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  1. /* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
  2. *
  3. * Redistribution and use in source and binary forms, with or without
  4. * modification, are permitted provided that the following conditions are met:
  5. * 1. Redistributions of source code must retain the above copyright
  6. * notice, this list of conditions and the following disclaimer.
  7. * 2. Redistributions in binary form must reproduce the above copyright
  8. * notice, this list of conditions and the following disclaimer in the
  9. * documentation and/or other materials provided with the distribution.
  10. *
  11. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  12. * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  13. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  14. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  15. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  16. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  17. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  18. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  19. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  20. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  21. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  22. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  23. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. */
  25. #include <rtthread.h>
  26. #include <rthw.h>
  27. #include "usbd_core.h"
  28. #include "usbh_core.h"
  29. #define DEFAULT_USB_HCLK_FREQ_MHZ 200
  30. uint32_t SystemCoreClock = (DEFAULT_USB_HCLK_FREQ_MHZ * 1000 * 1000);
  31. uintptr_t g_usb_otg0_base = (uintptr_t)0x91500000UL;
  32. uintptr_t g_usb_otg1_base = (uintptr_t)0x91540000UL;
  33. static void sysctl_reset_hw_done(volatile uint32_t *reset_reg, uint8_t reset_bit, uint8_t done_bit)
  34. {
  35. *reset_reg |= (1 << done_bit); /* clear done bit */
  36. rt_thread_mdelay(1);
  37. *reset_reg |= (1 << reset_bit); /* set reset bit */
  38. rt_thread_mdelay(1);
  39. /* check done bit */
  40. while (*reset_reg & (1 << done_bit) == 0)
  41. ;
  42. }
  43. #define USB_IDPULLUP0 (1 << 4)
  44. #define USB_DMPULLDOWN0 (1 << 8)
  45. #define USB_DPPULLDOWN0 (1 << 9)
  46. #ifdef PKG_CHERRYUSB_HOST
  47. static void usb_hc_interrupt_cb(int irq, void *arg_pv)
  48. {
  49. extern void USBH_IRQHandler(uint8_t busid);
  50. USBH_IRQHandler((uint8_t)(uintptr_t)arg_pv);
  51. }
  52. void usb_hc_low_level_init(struct usbh_bus *bus)
  53. {
  54. uint32_t *hs_reg;
  55. uint32_t usb_ctl3;
  56. if (bus->hcd.hcd_id == 0) {
  57. sysctl_reset_hw_done((volatile uint32_t *)0x9110103c, 0, 28);
  58. hs_reg = (uint32_t *)rt_ioremap((void *)(0x91585000 + 0x7C), 0x1000);
  59. usb_ctl3 = *hs_reg | USB_IDPULLUP0;
  60. *hs_reg = usb_ctl3 | (USB_DMPULLDOWN0 | USB_DPPULLDOWN0);
  61. rt_iounmap(hs_reg);
  62. rt_hw_interrupt_install(173, usb_hc_interrupt_cb, NULL, "usbh0");
  63. rt_hw_interrupt_umask(173);
  64. } else {
  65. sysctl_reset_hw_done((volatile uint32_t *)0x9110103c, 1, 29);
  66. hs_reg = (uint32_t *)rt_ioremap((void *)(0x91585000 + 0x9C), 0x1000);
  67. usb_ctl3 = *hs_reg | USB_IDPULLUP0;
  68. *hs_reg = usb_ctl3 | (USB_DMPULLDOWN0 | USB_DPPULLDOWN0);
  69. rt_iounmap(hs_reg);
  70. rt_hw_interrupt_install(174, usb_hc_interrupt_cb, 1, "usbh1");
  71. rt_hw_interrupt_umask(174);
  72. }
  73. }
  74. void usb_hc_low_level_deinit(struct usbh_bus *bus)
  75. {
  76. if (bus->hcd.hcd_id == 0) {
  77. rt_hw_interrupt_mask(173);
  78. } else {
  79. rt_hw_interrupt_mask(174);
  80. }
  81. }
  82. uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base)
  83. {
  84. return 0;
  85. }
  86. #endif
  87. #ifdef PKG_CHERRYUSB_DEVICE
  88. static void usb_dc_interrupt_cb(int irq, void *arg_pv)
  89. {
  90. extern void USBD_IRQHandler(uint8_t busid);
  91. USBD_IRQHandler(0);
  92. }
  93. #ifdef CHERRYUSB_DEVICE_USING_USB0
  94. void usb_dc_low_level_init(uint8_t busid)
  95. {
  96. sysctl_reset_hw_done((volatile uint32_t *)0x9110103c, 0, 28);
  97. uint32_t *hs_reg = (uint32_t *)rt_ioremap((void *)(0x91585000 + 0x7C), 0x1000);
  98. *hs_reg = 0x37;
  99. rt_iounmap(hs_reg);
  100. rt_hw_interrupt_install(173, usb_dc_interrupt_cb, NULL, "usbd");
  101. rt_hw_interrupt_umask(173);
  102. }
  103. void usb_dc_low_level_deinit(uint8_t busid)
  104. {
  105. rt_hw_interrupt_mask(173);
  106. }
  107. #else
  108. void usb_dc_low_level_init(uint8_t busid)
  109. {
  110. sysctl_reset_hw_done((volatile uint32_t *)0x9110103c, 1, 29);
  111. uint32_t *hs_reg = (uint32_t *)rt_ioremap((void *)(0x91585000 + 0x9C), 0x1000);
  112. *hs_reg = 0x37;
  113. rt_iounmap(hs_reg);
  114. rt_hw_interrupt_install(174, usb_dc_interrupt_cb, NULL, "usbd");
  115. rt_hw_interrupt_umask(174);
  116. }
  117. void usb_dc_low_level_deinit(uint8_t busid)
  118. {
  119. rt_hw_interrupt_mask(174);
  120. }
  121. #endif
  122. uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
  123. {
  124. return 0;
  125. }
  126. void usbd_dwc2_delay_ms(uint8_t ms)
  127. {
  128. /* implement later */
  129. }
  130. #endif