drv_usart.c 17 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift change to new framework
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5)
  18. #error "Please define at least one BSP_USING_UARTx"
  19. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  20. #endif
  21. #ifdef BSP_UART_USING_DMA_RX
  22. static void stm32_dma_config(struct rt_serial_device *serial);
  23. #endif
  24. enum
  25. {
  26. #ifdef BSP_USING_UART1
  27. UART1_INDEX,
  28. #endif
  29. #ifdef BSP_USING_UART2
  30. UART2_INDEX,
  31. #endif
  32. #ifdef BSP_USING_UART3
  33. UART3_INDEX,
  34. #endif
  35. #ifdef BSP_USING_UART4
  36. UART4_INDEX,
  37. #endif
  38. #ifdef BSP_USING_UART5
  39. UART5_INDEX,
  40. #endif
  41. };
  42. static const struct stm32_uart_config uart_config[] =
  43. {
  44. #ifdef BSP_USING_UART1
  45. UART1_CONFIG,
  46. #endif
  47. #ifdef BSP_USING_UART2
  48. UART2_CONFIG,
  49. #endif
  50. #ifdef BSP_USING_UART3
  51. UART3_CONFIG,
  52. #endif
  53. #ifdef BSP_USING_UART4
  54. UART4_CONFIG,
  55. #endif
  56. #ifdef BSP_USING_UART5
  57. UART5_CONFIG,
  58. #endif
  59. };
  60. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])];
  61. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  62. {
  63. struct stm32_uart *uart;
  64. RT_ASSERT(serial != RT_NULL);
  65. RT_ASSERT(cfg != RT_NULL);
  66. uart = (struct stm32_uart *)serial->parent.user_data;
  67. RT_ASSERT(uart != RT_NULL);
  68. uart->handle.Instance = uart->config->Instance;
  69. uart->handle.Init.BaudRate = cfg->baud_rate;
  70. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  71. uart->handle.Init.Mode = UART_MODE_TX_RX;
  72. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  73. switch (cfg->data_bits)
  74. {
  75. case DATA_BITS_8:
  76. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  77. break;
  78. case DATA_BITS_9:
  79. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  80. break;
  81. default:
  82. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  83. break;
  84. }
  85. switch (cfg->stop_bits)
  86. {
  87. case STOP_BITS_1:
  88. uart->handle.Init.StopBits = UART_STOPBITS_1;
  89. break;
  90. case STOP_BITS_2:
  91. uart->handle.Init.StopBits = UART_STOPBITS_2;
  92. break;
  93. default:
  94. uart->handle.Init.StopBits = UART_STOPBITS_1;
  95. break;
  96. }
  97. switch (cfg->parity)
  98. {
  99. case PARITY_NONE:
  100. uart->handle.Init.Parity = UART_PARITY_NONE;
  101. break;
  102. case PARITY_ODD:
  103. uart->handle.Init.Parity = UART_PARITY_ODD;
  104. break;
  105. case PARITY_EVEN:
  106. uart->handle.Init.Parity = UART_PARITY_EVEN;
  107. break;
  108. default:
  109. uart->handle.Init.Parity = UART_PARITY_NONE;
  110. break;
  111. }
  112. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  113. {
  114. return -RT_ERROR;
  115. }
  116. return RT_EOK;
  117. }
  118. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  119. {
  120. struct stm32_uart *uart;
  121. #ifdef BSP_UART_USING_DMA_RX
  122. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  123. #endif
  124. RT_ASSERT(serial != RT_NULL);
  125. uart = (struct stm32_uart *)serial->parent.user_data;
  126. RT_ASSERT(uart != RT_NULL);
  127. switch (cmd)
  128. {
  129. /* disable interrupt */
  130. case RT_DEVICE_CTRL_CLR_INT:
  131. /* disable rx irq */
  132. NVIC_DisableIRQ(uart->config->irq_type);
  133. /* disable interrupt */
  134. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  135. break;
  136. /* enable interrupt */
  137. case RT_DEVICE_CTRL_SET_INT:
  138. /* enable rx irq */
  139. NVIC_EnableIRQ(uart->config->irq_type);
  140. /* enable interrupt */
  141. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  142. break;
  143. #ifdef BSP_UART_USING_DMA_RX
  144. case RT_DEVICE_CTRL_CONFIG:
  145. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  146. {
  147. stm32_dma_config(serial);
  148. }
  149. break;
  150. #endif
  151. }
  152. return RT_EOK;
  153. }
  154. static int stm32_putc(struct rt_serial_device *serial, char c)
  155. {
  156. struct stm32_uart *uart;
  157. RT_ASSERT(serial != RT_NULL);
  158. uart = (struct stm32_uart *)serial->parent.user_data;
  159. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_TC);
  160. #if defined(SOC_SERIES_STM32L4)
  161. uart->handle.Instance->TDR = c;
  162. #else
  163. uart->handle.Instance->DR = c;
  164. #endif
  165. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  166. return 1;
  167. }
  168. static int stm32_getc(struct rt_serial_device *serial)
  169. {
  170. int ch;
  171. struct stm32_uart *uart;
  172. RT_ASSERT(serial != RT_NULL);
  173. uart = (struct stm32_uart *)serial->parent.user_data;
  174. RT_ASSERT(uart != RT_NULL);
  175. ch = -1;
  176. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  177. {
  178. #if defined(SOC_SERIES_STM32L4)
  179. ch = uart->handle.Instance->RDR & 0xff;
  180. #else
  181. ch = uart->handle.Instance->DR & 0xff;
  182. #endif
  183. }
  184. return ch;
  185. }
  186. static const struct rt_uart_ops stm32_uart_ops =
  187. {
  188. .configure = stm32_configure,
  189. .control = stm32_control,
  190. .putc = stm32_putc,
  191. .getc = stm32_getc,
  192. };
  193. /**
  194. * Uart common interrupt process. This need add to uart ISR.
  195. *
  196. * @param serial serial device
  197. */
  198. static void uart_isr(struct rt_serial_device *serial)
  199. {
  200. struct stm32_uart *uart;
  201. #ifdef BSP_UART_USING_DMA_RX
  202. rt_size_t recv_total_index, recv_len;
  203. rt_base_t level;
  204. #endif
  205. RT_ASSERT(serial != RT_NULL);
  206. uart = (struct stm32_uart *) serial->parent.user_data;
  207. RT_ASSERT(uart != RT_NULL);
  208. /* UART in mode Receiver -------------------------------------------------*/
  209. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  210. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  211. {
  212. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  213. /* Clear RXNE interrupt flag */
  214. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_RXNE);
  215. }
  216. #ifdef BSP_UART_USING_DMA_RX
  217. else if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&
  218. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  219. {
  220. level = rt_hw_interrupt_disable();
  221. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
  222. recv_len = recv_total_index - uart->dma.last_index;
  223. uart->dma.last_index = recv_total_index;
  224. rt_hw_interrupt_enable(level);
  225. if (recv_len)
  226. {
  227. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  228. }
  229. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_IDLE);
  230. rt_uint32_t ch;
  231. #if defined(SOC_SERIES_STM32L4)
  232. ch = uart->handle.Instance->RDR;
  233. #else
  234. ch = uart->handle.Instance->DR;
  235. #endif
  236. ch = ch;
  237. }
  238. #endif
  239. else
  240. {
  241. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  242. {
  243. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_ORE);
  244. }
  245. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  246. {
  247. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_NE);
  248. }
  249. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  250. {
  251. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_FE);
  252. }
  253. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  254. {
  255. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_PE);
  256. }
  257. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  258. {
  259. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_CTS);
  260. }
  261. #if !defined(SOC_SERIES_STM32L4)
  262. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  263. {
  264. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_LBD);
  265. }
  266. #endif
  267. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  268. {
  269. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_TXE);
  270. }
  271. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  272. {
  273. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_TC);
  274. }
  275. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  276. {
  277. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_RXNE);
  278. }
  279. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  280. {
  281. __HAL_UART_CLEAR_FLAG(&(uart->handle), UART_FLAG_IDLE);
  282. }
  283. }
  284. }
  285. #if defined(BSP_USING_UART1)
  286. void USART1_IRQHandler(void)
  287. {
  288. /* enter interrupt */
  289. rt_interrupt_enter();
  290. uart_isr(&(uart_obj[UART1_INDEX].serial));
  291. /* leave interrupt */
  292. rt_interrupt_leave();
  293. }
  294. #if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR)
  295. void USART1_RX_DMA_ISR(void)
  296. {
  297. /* enter interrupt */
  298. rt_interrupt_enter();
  299. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
  300. /* leave interrupt */
  301. rt_interrupt_leave();
  302. }
  303. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR) */
  304. #endif /* BSP_USING_UART1 */
  305. #if defined(BSP_USING_UART2)
  306. void USART2_IRQHandler(void)
  307. {
  308. /* enter interrupt */
  309. rt_interrupt_enter();
  310. uart_isr(&(uart_obj[UART2_INDEX].serial));
  311. /* leave interrupt */
  312. rt_interrupt_leave();
  313. }
  314. #if defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR)
  315. void USART2_RX_DMA_ISR(void)
  316. {
  317. /* enter interrupt */
  318. rt_interrupt_enter();
  319. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
  320. /* leave interrupt */
  321. rt_interrupt_leave();
  322. }
  323. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR) */
  324. #endif /* BSP_USING_UART2 */
  325. #if defined(BSP_USING_UART3)
  326. void USART3_IRQHandler(void)
  327. {
  328. /* enter interrupt */
  329. rt_interrupt_enter();
  330. uart_isr(&(uart_obj[UART3_INDEX].serial));
  331. /* leave interrupt */
  332. rt_interrupt_leave();
  333. }
  334. #if defined(BSP_UART_USING_DMA_RX) && defined(USART3_RX_DMA_ISR)
  335. void USART3_RX_DMA_ISR(void)
  336. {
  337. /* enter interrupt */
  338. rt_interrupt_enter();
  339. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
  340. /* leave interrupt */
  341. rt_interrupt_leave();
  342. }
  343. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART3_RX_DMA_ISR) */
  344. #endif /* BSP_USING_UART3*/
  345. #if defined(BSP_USING_UART4)
  346. void UART4_IRQHandler(void)
  347. {
  348. /* enter interrupt */
  349. rt_interrupt_enter();
  350. uart_isr(&(uart_obj[UART4_INDEX].serial));
  351. /* leave interrupt */
  352. rt_interrupt_leave();
  353. }
  354. #if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR)
  355. void USART4_RX_DMA_ISR(void)
  356. {
  357. /* enter interrupt */
  358. rt_interrupt_enter();
  359. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);
  360. /* leave interrupt */
  361. rt_interrupt_leave();
  362. }
  363. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART4_RX_DMA_ISR) */
  364. #endif /* BSP_USING_UART4*/
  365. #if defined(BSP_USING_UART5)
  366. void UART5_IRQHandler(void)
  367. {
  368. /* enter interrupt */
  369. rt_interrupt_enter();
  370. uart_isr(&(uart_obj[UART5_INDEX].serial));
  371. /* leave interrupt */
  372. rt_interrupt_leave();
  373. }
  374. #if defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR)
  375. void USART5_RX_DMA_ISR(void)
  376. {
  377. /* enter interrupt */
  378. rt_interrupt_enter();
  379. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
  380. /* leave interrupt */
  381. rt_interrupt_leave();
  382. }
  383. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR) */
  384. #endif /* BSP_USING_UART5*/
  385. #ifdef BSP_UART_USING_DMA_RX
  386. static void stm32_dma_config(struct rt_serial_device *serial)
  387. {
  388. RT_ASSERT(serial != RT_NULL);
  389. struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
  390. RT_ASSERT(uart != RT_NULL);
  391. struct rt_serial_rx_fifo *rx_fifo;
  392. LOG_D("%s dma config start", uart->config->name);
  393. {
  394. rt_uint32_t tmpreg= 0x00U;
  395. #if defined(SOC_SERIES_STM32F1)
  396. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  397. SET_BIT(RCC->AHBENR, uart->config->dma_rcc);
  398. tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rcc);
  399. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L4)
  400. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  401. SET_BIT(RCC->AHB1ENR, uart->config->dma_rcc);
  402. tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rcc);
  403. #endif
  404. UNUSED(tmpreg); /* To avoid compiler warnings */
  405. }
  406. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
  407. #if defined(SOC_SERIES_STM32F1)
  408. uart->dma.handle.Instance = uart->config->dma.Instance;
  409. #elif defined(SOC_SERIES_STM32F4)
  410. uart->dma.handle.Instance = uart->config->dma.Instance;
  411. uart->dma.handle.Init.Channel = uart->config->dma.stream_channel.channel;
  412. #elif defined(SOC_SERIES_STM32L4)
  413. uart->dma.handle.Instance = uart->config->dma.Instance;
  414. uart->dma.handle.Init.Request = uart->config->dma.channel_request.request;
  415. #endif
  416. uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
  417. uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE;
  418. uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE;
  419. uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  420. uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  421. uart->dma.handle.Init.Mode = DMA_CIRCULAR;
  422. uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM;
  423. #if defined(SOC_SERIES_STM32F4)
  424. uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  425. #endif
  426. if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
  427. {
  428. RT_ASSERT(0);
  429. }
  430. if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK)
  431. {
  432. RT_ASSERT(0);
  433. }
  434. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  435. /* Start DMA transfer */
  436. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  437. {
  438. /* Transfer error in reception process */
  439. RT_ASSERT(0);
  440. }
  441. /* enable interrupt */
  442. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  443. /* enable rx irq */
  444. HAL_NVIC_SetPriority(uart->config->dma_irq, 1, 0);
  445. HAL_NVIC_EnableIRQ(uart->config->dma_irq);
  446. HAL_NVIC_SetPriority(uart->config->irq_type, 0, 0);
  447. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  448. LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
  449. LOG_D("%s dma config done", uart->config->name);
  450. }
  451. /**
  452. * @brief UART error callbacks
  453. * @param huart: UART handle
  454. * @note This example shows a simple way to report transfer error, and you can
  455. * add your own implementation.
  456. * @retval None
  457. */
  458. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  459. {
  460. RT_ASSERT(huart != NULL);
  461. struct stm32_uart *uart = (struct stm32_uart *)huart;
  462. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  463. UNUSED(uart);
  464. }
  465. /**
  466. * @brief Rx Transfer completed callback
  467. * @param huart: UART handle
  468. * @note This example shows a simple way to report end of DMA Rx transfer, and
  469. * you can add your own implementation.
  470. * @retval None
  471. */
  472. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  473. {
  474. struct rt_serial_device *serial;
  475. struct stm32_uart *uart;
  476. rt_size_t recv_len;
  477. rt_base_t level;
  478. RT_ASSERT(huart != NULL);
  479. uart = (struct stm32_uart *)huart;
  480. serial = &uart->serial;
  481. level = rt_hw_interrupt_disable();
  482. recv_len = serial->config.bufsz - uart->dma.last_index;
  483. uart->dma.last_index = 0;
  484. rt_hw_interrupt_enable(level);
  485. if (recv_len)
  486. {
  487. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  488. }
  489. }
  490. #endif /* BSP_UART_USING_DMA_RX */
  491. int rt_hw_usart_init(void)
  492. {
  493. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  494. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  495. rt_err_t result = 0;
  496. for (int i = 0; i < obj_num; i++)
  497. {
  498. uart_obj[i].config = &uart_config[i];
  499. uart_obj[i].serial.ops = &stm32_uart_ops;
  500. uart_obj[i].serial.config = config;
  501. /* Determines whether a serial instance supports DMA */
  502. if(uart_obj[i].config->dma.Instance != DMA_NOT_AVAILABLE)
  503. {
  504. /* register UART device */
  505. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  506. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  507. #if defined(BSP_UART_USING_DMA_RX)
  508. | RT_DEVICE_FLAG_DMA_RX
  509. #endif
  510. ,&uart_obj[i]);
  511. }
  512. else
  513. {
  514. /* register UART device */
  515. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  516. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  517. ,&uart_obj[i]);
  518. }
  519. RT_ASSERT(result == RT_EOK);
  520. }
  521. return result;
  522. }
  523. #endif /* RT_USING_SERIAL */