fsl_usart_cmsis.c 79 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713
  1. /*
  2. * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
  3. * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
  4. * Copyright 2016-2017 NXP. Not a Contribution.
  5. *
  6. * SPDX-License-Identifier: Apache-2.0
  7. *
  8. * Licensed under the Apache License, Version 2.0 (the License); you may
  9. * not use this file except in compliance with the License.
  10. * You may obtain a copy of the License at
  11. *
  12. * http://www.apache.org/licenses/LICENSE-2.0
  13. *
  14. * Unless required by applicable law or agreed to in writing, software
  15. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  16. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. */
  20. #include "fsl_usart_cmsis.h"
  21. /* Component ID definition, used by tools. */
  22. #ifndef FSL_COMPONENT_ID
  23. #define FSL_COMPONENT_ID "platform.drivers.flexcomm_usart_cmsis"
  24. #endif
  25. #if (RTE_USART0 || RTE_USART1 || RTE_USART2 || RTE_USART3 || RTE_USART4 || RTE_USART5 || RTE_USART6 || RTE_USART7 || \
  26. RTE_USART8 || RTE_USART9)
  27. #define ARM_USART_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0)
  28. /*
  29. * ARMCC does not support split the data section automatically, so the driver
  30. * needs to split the data to separate sections explicitly, to reduce codesize.
  31. */
  32. #if defined(__CC_ARM)
  33. #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
  34. #endif
  35. typedef const struct _cmsis_usart_resource
  36. {
  37. USART_Type *base; /*!< usart peripheral base address. */
  38. uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
  39. } cmsis_usart_resource_t;
  40. typedef struct _cmsis_usart_non_blocking_driver_state
  41. {
  42. cmsis_usart_resource_t *resource; /*!< Basic usart resource. */
  43. usart_handle_t *handle; /*!< Interupt transfer handle. */
  44. ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
  45. uint8_t flags; /*!< Control and state flags. */
  46. } cmsis_usart_non_blocking_driver_state_t;
  47. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  48. typedef const struct _cmsis_usart_dma_resource
  49. {
  50. DMA_Type *txDmaBase; /*!< DMA peripheral base address for TX. */
  51. uint32_t txDmaChannel; /*!< DMA channel for usart TX. */
  52. DMA_Type *rxDmaBase; /*!< DMA peripheral base address for RX. */
  53. uint32_t rxDmaChannel; /*!< DMA channel for usart RX. */
  54. } cmsis_usart_dma_resource_t;
  55. typedef struct _cmsis_usart_dma_driver_state
  56. {
  57. cmsis_usart_resource_t *resource; /*!< usart basic resource. */
  58. cmsis_usart_dma_resource_t *dmaResource; /*!< usart DMA resource. */
  59. usart_dma_handle_t *handle; /*!< usart DMA transfer handle. */
  60. dma_handle_t *rxHandle; /*!< DMA RX handle. */
  61. dma_handle_t *txHandle; /*!< DMA TX handle. */
  62. ARM_USART_SignalEvent_t cb_event; /*!< Callback function. */
  63. uint8_t flags; /*!< Control and state flags. */
  64. } cmsis_usart_dma_driver_state_t;
  65. #endif
  66. enum _usart_transfer_states
  67. {
  68. kUSART_TxIdle, /*!< TX idle. */
  69. kUSART_TxBusy, /*!< TX busy. */
  70. kUSART_RxIdle, /*!< RX idle. */
  71. kUSART_RxBusy /*!< RX busy. */
  72. };
  73. /* Driver Version */
  74. static const ARM_DRIVER_VERSION s_usartDriverVersion = {ARM_USART_API_VERSION, ARM_USART_DRV_VERSION};
  75. static const ARM_USART_CAPABILITIES s_usartDriverCapabilities = {
  76. 1, /* supports usart (Asynchronous) mode */
  77. 0, /* supports Synchronous Master mode */
  78. 0, /* supports Synchronous Slave mode */
  79. 0, /* supports usart Single-wire mode */
  80. 0, /* supports usart IrDA mode */
  81. 0, /* supports usart Smart Card mode */
  82. 0, /* Smart Card Clock generator */
  83. 0, /* RTS Flow Control available */
  84. 0, /* CTS Flow Control available */
  85. 0, /* Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE */
  86. 0, /* Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT */
  87. 0, /* RTS Line: 0=not available, 1=available */
  88. 0, /* CTS Line: 0=not available, 1=available */
  89. 0, /* DTR Line: 0=not available, 1=available */
  90. 0, /* DSR Line: 0=not available, 1=available */
  91. 0, /* DCD Line: 0=not available, 1=available */
  92. 0, /* RI Line: 0=not available, 1=available */
  93. 0, /* Signal CTS change event: \ref ARM_USART_EVENT_CTS */
  94. 0, /* Signal DSR change event: \ref ARM_USART_EVENT_DSR */
  95. 0, /* Signal DCD change event: \ref ARM_USART_EVENT_DCD */
  96. 0, /* Signal RI change event: \ref ARM_USART_EVENT_RI */
  97. };
  98. /*
  99. * Common control function used by usart_NonBlockingControl/usart_DmaControl/usart_EdmaControl
  100. */
  101. static int32_t USART_CommonControl(uint32_t control,
  102. uint32_t arg,
  103. cmsis_usart_resource_t *resource,
  104. uint8_t *isConfigured)
  105. {
  106. usart_config_t config;
  107. USART_GetDefaultConfig(&config);
  108. switch (control & ARM_USART_CONTROL_Msk)
  109. {
  110. case ARM_USART_MODE_ASYNCHRONOUS:
  111. /* USART Baudrate */
  112. config.baudRate_Bps = arg;
  113. break;
  114. /* TX/RX IO is controlled in application layer. */
  115. case ARM_USART_CONTROL_TX:
  116. if (arg)
  117. {
  118. config.enableTx = true;
  119. }
  120. else
  121. {
  122. config.enableTx = false;
  123. }
  124. return ARM_DRIVER_OK;
  125. case ARM_USART_CONTROL_RX:
  126. if (arg)
  127. {
  128. config.enableRx = true;
  129. }
  130. else
  131. {
  132. config.enableRx = false;
  133. }
  134. return ARM_DRIVER_OK;
  135. default:
  136. return ARM_DRIVER_ERROR_UNSUPPORTED;
  137. }
  138. switch (control & ARM_USART_PARITY_Msk)
  139. {
  140. case ARM_USART_PARITY_NONE:
  141. config.parityMode = kUSART_ParityDisabled;
  142. break;
  143. case ARM_USART_PARITY_EVEN:
  144. config.parityMode = kUSART_ParityEven;
  145. break;
  146. case ARM_USART_PARITY_ODD:
  147. config.parityMode = kUSART_ParityOdd;
  148. break;
  149. default:
  150. return ARM_USART_ERROR_PARITY;
  151. }
  152. switch (control & ARM_USART_STOP_BITS_Msk)
  153. {
  154. case ARM_USART_STOP_BITS_1:
  155. /* The GetDefaultConfig has already set for this case. */
  156. break;
  157. case ARM_USART_STOP_BITS_2:
  158. config.stopBitCount = kUSART_TwoStopBit;
  159. break;
  160. default:
  161. return ARM_USART_ERROR_STOP_BITS;
  162. }
  163. /* If usart is already configured, deinit it first. */
  164. if ((*isConfigured) & USART_FLAG_CONFIGURED)
  165. {
  166. USART_Deinit(resource->base);
  167. *isConfigured &= ~USART_FLAG_CONFIGURED;
  168. }
  169. config.enableTx = true;
  170. config.enableRx = true;
  171. if (kStatus_USART_BaudrateNotSupport == USART_Init(resource->base, &config, resource->GetFreq()))
  172. {
  173. return ARM_USART_ERROR_BAUDRATE;
  174. }
  175. *isConfigured |= USART_FLAG_CONFIGURED;
  176. return ARM_DRIVER_OK;
  177. }
  178. static ARM_DRIVER_VERSION USARTx_GetVersion(void)
  179. {
  180. return s_usartDriverVersion;
  181. }
  182. static ARM_USART_CAPABILITIES USARTx_GetCapabilities(void)
  183. {
  184. return s_usartDriverCapabilities;
  185. }
  186. static int32_t USARTx_SetModemControl(ARM_USART_MODEM_CONTROL control)
  187. {
  188. return ARM_DRIVER_ERROR_UNSUPPORTED;
  189. }
  190. static ARM_USART_MODEM_STATUS USARTx_GetModemStatus(void)
  191. {
  192. ARM_USART_MODEM_STATUS modem_status;
  193. modem_status.cts = 0U;
  194. modem_status.dsr = 0U;
  195. modem_status.ri = 0U;
  196. modem_status.dcd = 0U;
  197. modem_status.reserved = 0U;
  198. return modem_status;
  199. }
  200. #endif
  201. #if (RTE_USART0_DMA_EN || RTE_USART1_DMA_EN || RTE_USART2_DMA_EN || RTE_USART3_DMA_EN || RTE_USART4_DMA_EN || \
  202. RTE_USART5_DMA_EN || RTE_USART6_DMA_EN || RTE_USART7_DMA_EN || RTE_USART8_DMA_EN || RTE_USART9_DMA_EN)
  203. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  204. void KSDK_USART_DmaCallback(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData)
  205. {
  206. uint32_t event = 0U;
  207. if (kStatus_USART_TxIdle == status)
  208. {
  209. event = ARM_USART_EVENT_SEND_COMPLETE;
  210. }
  211. if (kStatus_USART_RxIdle == status)
  212. {
  213. event = ARM_USART_EVENT_RECEIVE_COMPLETE;
  214. }
  215. /* User data is actually CMSIS driver callback. */
  216. if (userData)
  217. {
  218. ((ARM_USART_SignalEvent_t)userData)(event);
  219. }
  220. }
  221. static int32_t USART_DmaInitialize(ARM_USART_SignalEvent_t cb_event, cmsis_usart_dma_driver_state_t *usart)
  222. {
  223. if (!(usart->flags & USART_FLAG_INIT))
  224. {
  225. usart->cb_event = cb_event;
  226. usart->flags = USART_FLAG_INIT;
  227. }
  228. return ARM_DRIVER_OK;
  229. }
  230. static int32_t USART_DmaUninitialize(cmsis_usart_dma_driver_state_t *usart)
  231. {
  232. usart->flags = USART_FLAG_UNINIT;
  233. return ARM_DRIVER_OK;
  234. }
  235. static int32_t USART_DmaPowerControl(ARM_POWER_STATE state, cmsis_usart_dma_driver_state_t *usart)
  236. {
  237. usart_config_t config;
  238. switch (state)
  239. {
  240. case ARM_POWER_OFF:
  241. if (usart->flags & USART_FLAG_POWER)
  242. {
  243. USART_Deinit(usart->resource->base);
  244. DMA_DisableChannel(usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
  245. DMA_DisableChannel(usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
  246. usart->flags = USART_FLAG_INIT;
  247. }
  248. break;
  249. case ARM_POWER_LOW:
  250. return ARM_DRIVER_ERROR_UNSUPPORTED;
  251. case ARM_POWER_FULL:
  252. /* Must be initialized first. */
  253. if (usart->flags == USART_FLAG_UNINIT)
  254. {
  255. return ARM_DRIVER_ERROR;
  256. }
  257. if (usart->flags & USART_FLAG_POWER)
  258. {
  259. /* Driver already powered */
  260. break;
  261. }
  262. USART_GetDefaultConfig(&config);
  263. config.enableTx = true;
  264. config.enableRx = true;
  265. /* Set up DMA setting. */
  266. DMA_EnableChannel(usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
  267. DMA_EnableChannel(usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
  268. DMA_CreateHandle(usart->rxHandle, usart->dmaResource->rxDmaBase, usart->dmaResource->rxDmaChannel);
  269. DMA_CreateHandle(usart->txHandle, usart->dmaResource->txDmaBase, usart->dmaResource->txDmaChannel);
  270. /* Setup the usart. */
  271. USART_Init(usart->resource->base, &config, usart->resource->GetFreq());
  272. USART_TransferCreateHandleDMA(usart->resource->base, usart->handle, KSDK_USART_DmaCallback,
  273. (void *)usart->cb_event, usart->txHandle, usart->rxHandle);
  274. usart->flags |= (USART_FLAG_POWER | USART_FLAG_CONFIGURED);
  275. break;
  276. default:
  277. return ARM_DRIVER_ERROR_UNSUPPORTED;
  278. }
  279. return ARM_DRIVER_OK;
  280. }
  281. static int32_t USART_DmaSend(const void *data, uint32_t num, cmsis_usart_dma_driver_state_t *usart)
  282. {
  283. int32_t ret;
  284. status_t status;
  285. usart_transfer_t xfer;
  286. xfer.data = (uint8_t *)data;
  287. xfer.dataSize = num;
  288. status = USART_TransferSendDMA(usart->resource->base, usart->handle, &xfer);
  289. switch (status)
  290. {
  291. case kStatus_Success:
  292. ret = ARM_DRIVER_OK;
  293. break;
  294. case kStatus_InvalidArgument:
  295. ret = ARM_DRIVER_ERROR_PARAMETER;
  296. break;
  297. case kStatus_USART_TxBusy:
  298. ret = ARM_DRIVER_ERROR_BUSY;
  299. break;
  300. default:
  301. ret = ARM_DRIVER_ERROR;
  302. break;
  303. }
  304. return ret;
  305. }
  306. static int32_t USART_DmaReceive(void *data, uint32_t num, cmsis_usart_dma_driver_state_t *usart)
  307. {
  308. int32_t ret;
  309. status_t status;
  310. usart_transfer_t xfer;
  311. xfer.data = data;
  312. xfer.dataSize = num;
  313. status = USART_TransferReceiveDMA(usart->resource->base, usart->handle, &xfer);
  314. switch (status)
  315. {
  316. case kStatus_Success:
  317. ret = ARM_DRIVER_OK;
  318. break;
  319. case kStatus_InvalidArgument:
  320. ret = ARM_DRIVER_ERROR_PARAMETER;
  321. break;
  322. case kStatus_USART_RxBusy:
  323. ret = ARM_DRIVER_ERROR_BUSY;
  324. break;
  325. default:
  326. ret = ARM_DRIVER_ERROR;
  327. break;
  328. }
  329. return ret;
  330. }
  331. static int32_t USART_DmaTransfer(const void *data_out,
  332. void *data_in,
  333. uint32_t num,
  334. cmsis_usart_dma_driver_state_t *usart)
  335. {
  336. /* Only in synchronous mode */
  337. return ARM_DRIVER_ERROR;
  338. }
  339. static int32_t USART_DmaGetTxCount(cmsis_usart_dma_driver_state_t *usart)
  340. {
  341. /* Does not support */
  342. return ARM_DRIVER_ERROR;
  343. }
  344. static int32_t USART_DmaGetRxCount(cmsis_usart_dma_driver_state_t *usart)
  345. {
  346. /* Does not support */
  347. return ARM_DRIVER_ERROR;
  348. }
  349. static int32_t USART_DmaControl(uint32_t control, uint32_t arg, cmsis_usart_dma_driver_state_t *usart)
  350. {
  351. /* Must be power on. */
  352. if (!(usart->flags & USART_FLAG_POWER))
  353. {
  354. return ARM_DRIVER_ERROR;
  355. }
  356. /* Does not support these features. */
  357. if (control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk))
  358. {
  359. return ARM_DRIVER_ERROR_UNSUPPORTED;
  360. }
  361. switch (control & ARM_USART_CONTROL_Msk)
  362. {
  363. /* Abort Send */
  364. case ARM_USART_ABORT_SEND:
  365. USART_EnableTxDMA(usart->resource->base, false);
  366. DMA_AbortTransfer(usart->handle->txDmaHandle);
  367. usart->handle->txState = kUSART_TxIdle;
  368. return ARM_DRIVER_OK;
  369. /* Abort receive */
  370. case ARM_USART_ABORT_RECEIVE:
  371. USART_EnableRxDMA(usart->resource->base, false);
  372. DMA_AbortTransfer(usart->handle->rxDmaHandle);
  373. usart->handle->rxState = kUSART_RxIdle;
  374. return ARM_DRIVER_OK;
  375. default:
  376. break;
  377. }
  378. return USART_CommonControl(control, arg, usart->resource, &usart->flags);
  379. }
  380. static ARM_USART_STATUS USART_DmaGetStatus(cmsis_usart_dma_driver_state_t *usart)
  381. {
  382. ARM_USART_STATUS stat;
  383. uint32_t ksdk_usart_status = usart->resource->base->STAT;
  384. stat.tx_busy = ((kUSART_TxBusy == usart->handle->txState) ? (1U) : (0U));
  385. stat.rx_busy = ((kUSART_RxBusy == usart->handle->rxState) ? (1U) : (0U));
  386. stat.tx_underflow = 0U;
  387. stat.rx_overflow = 0U;
  388. stat.rx_break = (!(!(ksdk_usart_status & USART_STAT_RXBRK_MASK)));
  389. stat.rx_framing_error = (!(!(ksdk_usart_status & USART_STAT_FRAMERRINT_MASK)));
  390. stat.rx_parity_error = (!(!(ksdk_usart_status & USART_STAT_PARITYERRINT_MASK)));
  391. stat.reserved = 0U;
  392. return stat;
  393. }
  394. #endif
  395. #endif
  396. #if ((RTE_USART0 && !RTE_USART0_DMA_EN) || (RTE_USART1 && !RTE_USART1_DMA_EN) || (RTE_USART2 && !RTE_USART2_DMA_EN) || \
  397. (RTE_USART3 && !RTE_USART3_DMA_EN) || (RTE_USART4 && !RTE_USART4_DMA_EN) || (RTE_USART5 && !RTE_USART5_DMA_EN) || \
  398. (RTE_USART6 && !RTE_USART6_DMA_EN) || (RTE_USART7 && !RTE_USART7_DMA_EN) || (RTE_USART8 && !RTE_USART8_DMA_EN) || \
  399. (RTE_USART9 && !RTE_USART9_DMA_EN))
  400. void KSDK_USART_NonBlockingCallback(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)
  401. {
  402. uint32_t event = 0U;
  403. if (kStatus_USART_TxIdle == status)
  404. {
  405. event = ARM_USART_EVENT_SEND_COMPLETE;
  406. }
  407. if (kStatus_USART_RxIdle == status)
  408. {
  409. event = ARM_USART_EVENT_RECEIVE_COMPLETE;
  410. }
  411. /* User data is actually CMSIS driver callback. */
  412. if (userData)
  413. {
  414. ((ARM_USART_SignalEvent_t)userData)(event);
  415. }
  416. }
  417. static int32_t USART_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event,
  418. cmsis_usart_non_blocking_driver_state_t *usart)
  419. {
  420. if (!(usart->flags & USART_FLAG_INIT))
  421. {
  422. usart->cb_event = cb_event;
  423. usart->flags = USART_FLAG_INIT;
  424. }
  425. return ARM_DRIVER_OK;
  426. }
  427. static int32_t USART_NonBlockingUninitialize(cmsis_usart_non_blocking_driver_state_t *usart)
  428. {
  429. usart->flags = USART_FLAG_UNINIT;
  430. return ARM_DRIVER_OK;
  431. }
  432. static int32_t USART_NonBlockingPowerControl(ARM_POWER_STATE state, cmsis_usart_non_blocking_driver_state_t *usart)
  433. {
  434. usart_config_t config;
  435. switch (state)
  436. {
  437. case ARM_POWER_OFF:
  438. if (usart->flags & USART_FLAG_POWER)
  439. {
  440. USART_Deinit(usart->resource->base);
  441. usart->flags = USART_FLAG_INIT;
  442. }
  443. break;
  444. case ARM_POWER_LOW:
  445. return ARM_DRIVER_ERROR_UNSUPPORTED;
  446. case ARM_POWER_FULL:
  447. /* Must be initialized first. */
  448. if (usart->flags == USART_FLAG_UNINIT)
  449. {
  450. return ARM_DRIVER_ERROR;
  451. }
  452. if (usart->flags & USART_FLAG_POWER)
  453. {
  454. /* Driver already powered */
  455. break;
  456. }
  457. USART_GetDefaultConfig(&config);
  458. config.enableTx = true;
  459. config.enableRx = true;
  460. USART_Init(usart->resource->base, &config, usart->resource->GetFreq());
  461. USART_TransferCreateHandle(usart->resource->base, usart->handle, KSDK_USART_NonBlockingCallback,
  462. (void *)usart->cb_event);
  463. usart->flags |= (USART_FLAG_POWER | USART_FLAG_CONFIGURED);
  464. break;
  465. default:
  466. return ARM_DRIVER_ERROR_UNSUPPORTED;
  467. }
  468. return ARM_DRIVER_OK;
  469. }
  470. static int32_t USART_NonBlockingSend(const void *data, uint32_t num, cmsis_usart_non_blocking_driver_state_t *usart)
  471. {
  472. int32_t ret;
  473. status_t status;
  474. usart_transfer_t xfer;
  475. xfer.data = (uint8_t *)data;
  476. xfer.dataSize = num;
  477. status = USART_TransferSendNonBlocking(usart->resource->base, usart->handle, &xfer);
  478. switch (status)
  479. {
  480. case kStatus_Success:
  481. ret = ARM_DRIVER_OK;
  482. break;
  483. case kStatus_InvalidArgument:
  484. ret = ARM_DRIVER_ERROR_PARAMETER;
  485. break;
  486. case kStatus_USART_TxBusy:
  487. ret = ARM_DRIVER_ERROR_BUSY;
  488. break;
  489. default:
  490. ret = ARM_DRIVER_ERROR;
  491. break;
  492. }
  493. return ret;
  494. }
  495. static int32_t USART_NonBlockingReceive(void *data, uint32_t num, cmsis_usart_non_blocking_driver_state_t *usart)
  496. {
  497. int32_t ret;
  498. status_t status;
  499. usart_transfer_t xfer;
  500. xfer.data = data;
  501. xfer.dataSize = num;
  502. status = USART_TransferReceiveNonBlocking(usart->resource->base, usart->handle, &xfer, NULL);
  503. switch (status)
  504. {
  505. case kStatus_Success:
  506. ret = ARM_DRIVER_OK;
  507. break;
  508. case kStatus_InvalidArgument:
  509. ret = ARM_DRIVER_ERROR_PARAMETER;
  510. break;
  511. case kStatus_USART_RxBusy:
  512. ret = ARM_DRIVER_ERROR_BUSY;
  513. break;
  514. default:
  515. ret = ARM_DRIVER_ERROR;
  516. break;
  517. }
  518. return ret;
  519. }
  520. static int32_t USART_NonBlockingTransfer(const void *data_out,
  521. void *data_in,
  522. uint32_t num,
  523. cmsis_usart_non_blocking_driver_state_t *usart)
  524. {
  525. /* Only in synchronous mode */
  526. return ARM_DRIVER_ERROR;
  527. }
  528. static uint32_t USART_NonBlockingGetTxCount(cmsis_usart_non_blocking_driver_state_t *usart)
  529. {
  530. uint32_t cnt;
  531. /* If TX not in progress, then the TX count is txDataSizeAll saved in handle. */
  532. if (kUSART_TxIdle == usart->handle->txState)
  533. {
  534. cnt = usart->handle->txDataSizeAll;
  535. }
  536. else
  537. {
  538. cnt = usart->handle->txDataSizeAll - usart->handle->txDataSize;
  539. }
  540. return cnt;
  541. }
  542. static uint32_t USART_NonBlockingGetRxCount(cmsis_usart_non_blocking_driver_state_t *usart)
  543. {
  544. uint32_t cnt;
  545. if (kUSART_RxIdle == usart->handle->rxState)
  546. {
  547. cnt = usart->handle->rxDataSizeAll;
  548. }
  549. else
  550. {
  551. cnt = usart->handle->rxDataSizeAll - usart->handle->rxDataSize;
  552. }
  553. return cnt;
  554. }
  555. static int32_t USART_NonBlockingControl(uint32_t control, uint32_t arg, cmsis_usart_non_blocking_driver_state_t *usart)
  556. {
  557. /* Must be power on. */
  558. if (!(usart->flags & USART_FLAG_POWER))
  559. {
  560. return ARM_DRIVER_ERROR;
  561. }
  562. /* Does not support these features. */
  563. if (control & (ARM_USART_FLOW_CONTROL_Msk | ARM_USART_CPOL_Msk | ARM_USART_CPHA_Msk))
  564. {
  565. return ARM_DRIVER_ERROR_UNSUPPORTED;
  566. }
  567. switch (control & ARM_USART_CONTROL_Msk)
  568. {
  569. /* Abort Send */
  570. case ARM_USART_ABORT_SEND:
  571. usart->resource->base->FIFOINTENSET &= ~USART_FIFOINTENSET_TXLVL_MASK;
  572. usart->handle->txDataSize = 0;
  573. usart->handle->txState = kUSART_TxIdle;
  574. return ARM_DRIVER_OK;
  575. /* Abort receive */
  576. case ARM_USART_ABORT_RECEIVE:
  577. usart->resource->base->FIFOINTENSET &= ~USART_FIFOINTENSET_RXLVL_MASK;
  578. usart->handle->rxDataSize = 0U;
  579. usart->handle->rxState = kUSART_RxIdle;
  580. return ARM_DRIVER_OK;
  581. default:
  582. break;
  583. }
  584. return USART_CommonControl(control, arg, usart->resource, &usart->flags);
  585. }
  586. static ARM_USART_STATUS USART_NonBlockingGetStatus(cmsis_usart_non_blocking_driver_state_t *usart)
  587. {
  588. ARM_USART_STATUS stat;
  589. uint32_t ksdk_usart_status = usart->resource->base->STAT;
  590. stat.tx_busy = ((kUSART_TxBusy == usart->handle->txState) ? (1U) : (0U));
  591. stat.rx_busy = ((kUSART_RxBusy == usart->handle->rxState) ? (1U) : (0U));
  592. stat.tx_underflow = 0U;
  593. stat.rx_overflow = 0U;
  594. stat.rx_break = (!(!(ksdk_usart_status & USART_STAT_RXBRK_MASK)));
  595. stat.rx_framing_error = (!(!(ksdk_usart_status & USART_STAT_FRAMERRINT_MASK)));
  596. stat.rx_parity_error = (!(!(ksdk_usart_status & USART_STAT_PARITYERRINT_MASK)));
  597. stat.reserved = 0U;
  598. return stat;
  599. }
  600. #endif
  601. #if defined(USART0) && RTE_USART0
  602. /* User needs to provide the implementation for USART0_GetFreq/InitPins/DeinitPins
  603. in the application for enabling according instance. */
  604. extern uint32_t USART0_GetFreq(void);
  605. extern void USART0_InitPins(void);
  606. extern void USART0_DeinitPins(void);
  607. cmsis_usart_resource_t usart0_Resource = {USART0, USART0_GetFreq};
  608. /* usart0 Driver Control Block */
  609. #if RTE_USART0_DMA_EN
  610. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  611. cmsis_usart_dma_resource_t usart0_DmaResource = {
  612. RTE_USART0_DMA_TX_DMA_BASE, RTE_USART0_DMA_TX_CH, RTE_USART0_DMA_RX_DMA_BASE, RTE_USART0_DMA_RX_CH,
  613. };
  614. usart_dma_handle_t USART0_DmaHandle;
  615. dma_handle_t USART0_DmaRxHandle;
  616. dma_handle_t USART0_DmaTxHandle;
  617. #if defined(__CC_ARM)
  618. ARMCC_SECTION("usart0_dma_driver_state")
  619. cmsis_usart_dma_driver_state_t usart0_DmaDriverState = {
  620. #else
  621. cmsis_usart_dma_driver_state_t usart0_DmaDriverState = {
  622. #endif
  623. &usart0_Resource, &usart0_DmaResource, &USART0_DmaHandle, &USART0_DmaRxHandle, &USART0_DmaTxHandle,
  624. };
  625. static int32_t USART0_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  626. {
  627. USART0_InitPins();
  628. return USART_DmaInitialize(cb_event, &usart0_DmaDriverState);
  629. }
  630. static int32_t USART0_DmaUninitialize(void)
  631. {
  632. USART0_DeinitPins();
  633. return USART_DmaUninitialize(&usart0_DmaDriverState);
  634. }
  635. static int32_t USART0_DmaPowerControl(ARM_POWER_STATE state)
  636. {
  637. return USART_DmaPowerControl(state, &usart0_DmaDriverState);
  638. }
  639. static int32_t USART0_DmaSend(const void *data, uint32_t num)
  640. {
  641. return USART_DmaSend(data, num, &usart0_DmaDriverState);
  642. }
  643. static int32_t USART0_DmaReceive(void *data, uint32_t num)
  644. {
  645. return USART_DmaReceive(data, num, &usart0_DmaDriverState);
  646. }
  647. static int32_t USART0_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  648. {
  649. return USART_DmaTransfer(data_out, data_in, num, &usart0_DmaDriverState);
  650. }
  651. static uint32_t USART0_DmaGetTxCount(void)
  652. {
  653. return USART_DmaGetTxCount(&usart0_DmaDriverState);
  654. }
  655. static uint32_t USART0_DmaGetRxCount(void)
  656. {
  657. return USART_DmaGetRxCount(&usart0_DmaDriverState);
  658. }
  659. static int32_t USART0_DmaControl(uint32_t control, uint32_t arg)
  660. {
  661. return USART_DmaControl(control, arg, &usart0_DmaDriverState);
  662. }
  663. static ARM_USART_STATUS USART0_DmaGetStatus(void)
  664. {
  665. return USART_DmaGetStatus(&usart0_DmaDriverState);
  666. }
  667. #endif
  668. #else
  669. usart_handle_t USART0_Handle;
  670. #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
  671. static uint8_t usart0_rxRingBuffer[USART_RX_BUFFER_LEN];
  672. #endif
  673. #if defined(__CC_ARM)
  674. ARMCC_SECTION("usart0_non_blocking_driver_state")
  675. cmsis_usart_non_blocking_driver_state_t usart0_NonBlockingDriverState = {
  676. #else
  677. cmsis_usart_non_blocking_driver_state_t usart0_NonBlockingDriverState = {
  678. #endif
  679. &usart0_Resource, &USART0_Handle,
  680. };
  681. static int32_t USART0_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  682. {
  683. USART0_InitPins();
  684. return USART_NonBlockingInitialize(cb_event, &usart0_NonBlockingDriverState);
  685. }
  686. static int32_t USART0_NonBlockingUninitialize(void)
  687. {
  688. USART0_DeinitPins();
  689. return USART_NonBlockingUninitialize(&usart0_NonBlockingDriverState);
  690. }
  691. static int32_t USART0_NonBlockingPowerControl(ARM_POWER_STATE state)
  692. {
  693. uint32_t result;
  694. result = USART_NonBlockingPowerControl(state, &usart0_NonBlockingDriverState);
  695. #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
  696. if ((state == ARM_POWER_FULL) && (usart0_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  697. {
  698. USART_TransferStartRingBuffer(usart0_NonBlockingDriverState.resource->base,
  699. usart0_NonBlockingDriverState.handle, usart0_rxRingBuffer, USART_RX_BUFFER_LEN);
  700. }
  701. #endif
  702. return result;
  703. }
  704. static int32_t USART0_NonBlockingSend(const void *data, uint32_t num)
  705. {
  706. return USART_NonBlockingSend(data, num, &usart0_NonBlockingDriverState);
  707. }
  708. static int32_t USART0_NonBlockingReceive(void *data, uint32_t num)
  709. {
  710. return USART_NonBlockingReceive(data, num, &usart0_NonBlockingDriverState);
  711. }
  712. static int32_t USART0_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  713. {
  714. return USART_NonBlockingTransfer(data_out, data_in, num, &usart0_NonBlockingDriverState);
  715. }
  716. static uint32_t USART0_NonBlockingGetTxCount(void)
  717. {
  718. return USART_NonBlockingGetTxCount(&usart0_NonBlockingDriverState);
  719. }
  720. static uint32_t USART0_NonBlockingGetRxCount(void)
  721. {
  722. return USART_NonBlockingGetRxCount(&usart0_NonBlockingDriverState);
  723. }
  724. static int32_t USART0_NonBlockingControl(uint32_t control, uint32_t arg)
  725. {
  726. int32_t result;
  727. result = USART_NonBlockingControl(control, arg, &usart0_NonBlockingDriverState);
  728. if (ARM_DRIVER_OK != result)
  729. {
  730. return result;
  731. }
  732. #if defined(USART0_RX_BUFFER_ENABLE) && (USART0_RX_BUFFER_ENABLE == 1)
  733. /* Start receiving interrupts */
  734. usart0_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  735. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  736. #endif
  737. return ARM_DRIVER_OK;
  738. }
  739. static ARM_USART_STATUS USART0_NonBlockingGetStatus(void)
  740. {
  741. return USART_NonBlockingGetStatus(&usart0_NonBlockingDriverState);
  742. }
  743. #endif
  744. ARM_DRIVER_USART Driver_USART0 = {
  745. USARTx_GetVersion, USARTx_GetCapabilities,
  746. #if RTE_USART0_DMA_EN
  747. USART0_DmaInitialize, USART0_DmaUninitialize, USART0_DmaPowerControl, USART0_DmaSend, USART0_DmaReceive,
  748. USART0_DmaTransfer, USART0_DmaGetTxCount, USART0_DmaGetRxCount, USART0_DmaControl, USART0_DmaGetStatus,
  749. #else
  750. USART0_NonBlockingInitialize,
  751. USART0_NonBlockingUninitialize,
  752. USART0_NonBlockingPowerControl,
  753. USART0_NonBlockingSend,
  754. USART0_NonBlockingReceive,
  755. USART0_NonBlockingTransfer,
  756. USART0_NonBlockingGetTxCount,
  757. USART0_NonBlockingGetRxCount,
  758. USART0_NonBlockingControl,
  759. USART0_NonBlockingGetStatus,
  760. #endif
  761. USARTx_SetModemControl, USARTx_GetModemStatus};
  762. #endif /* usart0 */
  763. #if defined(USART1) && RTE_USART1
  764. /* User needs to provide the implementation for USART1_GetFreq/InitPins/DeinitPins
  765. in the application for enabling according instance. */
  766. extern uint32_t USART1_GetFreq(void);
  767. extern void USART1_InitPins(void);
  768. extern void USART1_DeinitPins(void);
  769. cmsis_usart_resource_t usart1_Resource = {USART1, USART1_GetFreq};
  770. #if RTE_USART1_DMA_EN
  771. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  772. cmsis_usart_dma_resource_t usart1_DmaResource = {
  773. RTE_USART1_DMA_TX_DMA_BASE, RTE_USART1_DMA_TX_CH, RTE_USART1_DMA_RX_DMA_BASE, RTE_USART1_DMA_RX_CH,
  774. };
  775. usart_dma_handle_t USART1_DmaHandle;
  776. dma_handle_t USART1_DmaRxHandle;
  777. dma_handle_t USART1_DmaTxHandle;
  778. #if defined(__CC_ARM)
  779. ARMCC_SECTION("usart1_dma_driver_state")
  780. cmsis_usart_dma_driver_state_t usart1_DmaDriverState = {
  781. #else
  782. cmsis_usart_dma_driver_state_t usart1_DmaDriverState = {
  783. #endif
  784. &usart1_Resource, &usart1_DmaResource, &USART1_DmaHandle, &USART1_DmaRxHandle, &USART1_DmaTxHandle,
  785. };
  786. static int32_t USART1_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  787. {
  788. USART1_InitPins();
  789. return USART_DmaInitialize(cb_event, &usart1_DmaDriverState);
  790. }
  791. static int32_t USART1_DmaUninitialize(void)
  792. {
  793. USART1_DeinitPins();
  794. return USART_DmaUninitialize(&usart1_DmaDriverState);
  795. }
  796. static int32_t USART1_DmaPowerControl(ARM_POWER_STATE state)
  797. {
  798. return USART_DmaPowerControl(state, &usart1_DmaDriverState);
  799. }
  800. static int32_t USART1_DmaSend(const void *data, uint32_t num)
  801. {
  802. return USART_DmaSend(data, num, &usart1_DmaDriverState);
  803. }
  804. static int32_t USART1_DmaReceive(void *data, uint32_t num)
  805. {
  806. return USART_DmaReceive(data, num, &usart1_DmaDriverState);
  807. }
  808. static int32_t USART1_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  809. {
  810. return USART_DmaTransfer(data_out, data_in, num, &usart1_DmaDriverState);
  811. }
  812. static uint32_t USART1_DmaGetTxCount(void)
  813. {
  814. return USART_DmaGetTxCount(&usart1_DmaDriverState);
  815. }
  816. static uint32_t USART1_DmaGetRxCount(void)
  817. {
  818. return USART_DmaGetRxCount(&usart1_DmaDriverState);
  819. }
  820. static int32_t USART1_DmaControl(uint32_t control, uint32_t arg)
  821. {
  822. return USART_DmaControl(control, arg, &usart1_DmaDriverState);
  823. }
  824. static ARM_USART_STATUS USART1_DmaGetStatus(void)
  825. {
  826. return USART_DmaGetStatus(&usart1_DmaDriverState);
  827. }
  828. #endif
  829. #else
  830. usart_handle_t USART1_Handle;
  831. #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
  832. static uint8_t usart1_rxRingBuffer[USART_RX_BUFFER_LEN];
  833. #endif
  834. #if defined(__CC_ARM)
  835. ARMCC_SECTION("usart1_non_blocking_driver_state")
  836. cmsis_usart_non_blocking_driver_state_t usart1_NonBlockingDriverState = {
  837. #else
  838. cmsis_usart_non_blocking_driver_state_t usart1_NonBlockingDriverState = {
  839. #endif
  840. &usart1_Resource, &USART1_Handle,
  841. };
  842. static int32_t USART1_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  843. {
  844. USART1_InitPins();
  845. return USART_NonBlockingInitialize(cb_event, &usart1_NonBlockingDriverState);
  846. }
  847. static int32_t USART1_NonBlockingUninitialize(void)
  848. {
  849. USART1_DeinitPins();
  850. return USART_NonBlockingUninitialize(&usart1_NonBlockingDriverState);
  851. }
  852. static int32_t USART1_NonBlockingPowerControl(ARM_POWER_STATE state)
  853. {
  854. uint32_t result;
  855. result = USART_NonBlockingPowerControl(state, &usart1_NonBlockingDriverState);
  856. #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
  857. if ((state == ARM_POWER_FULL) && (usart1_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  858. {
  859. USART_TransferStartRingBuffer(usart1_NonBlockingDriverState.resource->base,
  860. usart1_NonBlockingDriverState.handle, usart1_rxRingBuffer, USART_RX_BUFFER_LEN);
  861. }
  862. #endif
  863. return result;
  864. }
  865. static int32_t USART1_NonBlockingSend(const void *data, uint32_t num)
  866. {
  867. return USART_NonBlockingSend(data, num, &usart1_NonBlockingDriverState);
  868. }
  869. static int32_t USART1_NonBlockingReceive(void *data, uint32_t num)
  870. {
  871. return USART_NonBlockingReceive(data, num, &usart1_NonBlockingDriverState);
  872. }
  873. static int32_t USART1_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  874. {
  875. return USART_NonBlockingTransfer(data_out, data_in, num, &usart1_NonBlockingDriverState);
  876. }
  877. static uint32_t USART1_NonBlockingGetTxCount(void)
  878. {
  879. return USART_NonBlockingGetTxCount(&usart1_NonBlockingDriverState);
  880. }
  881. static uint32_t USART1_NonBlockingGetRxCount(void)
  882. {
  883. return USART_NonBlockingGetRxCount(&usart1_NonBlockingDriverState);
  884. }
  885. static int32_t USART1_NonBlockingControl(uint32_t control, uint32_t arg)
  886. {
  887. int32_t result;
  888. result = USART_NonBlockingControl(control, arg, &usart1_NonBlockingDriverState);
  889. if (ARM_DRIVER_OK != result)
  890. {
  891. return result;
  892. }
  893. #if defined(USART1_RX_BUFFER_ENABLE) && (USART1_RX_BUFFER_ENABLE == 1)
  894. /* Start receiving interrupts */
  895. usart1_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  896. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  897. #endif
  898. return ARM_DRIVER_OK;
  899. }
  900. static ARM_USART_STATUS USART1_NonBlockingGetStatus(void)
  901. {
  902. return USART_NonBlockingGetStatus(&usart1_NonBlockingDriverState);
  903. }
  904. #endif
  905. ARM_DRIVER_USART Driver_USART1 = {
  906. USARTx_GetVersion, USARTx_GetCapabilities,
  907. #if RTE_USART1_DMA_EN
  908. USART1_DmaInitialize, USART1_DmaUninitialize, USART1_DmaPowerControl, USART1_DmaSend, USART1_DmaReceive,
  909. USART1_DmaTransfer, USART1_DmaGetTxCount, USART1_DmaGetRxCount, USART1_DmaControl, USART1_DmaGetStatus,
  910. #else
  911. USART1_NonBlockingInitialize,
  912. USART1_NonBlockingUninitialize,
  913. USART1_NonBlockingPowerControl,
  914. USART1_NonBlockingSend,
  915. USART1_NonBlockingReceive,
  916. USART1_NonBlockingTransfer,
  917. USART1_NonBlockingGetTxCount,
  918. USART1_NonBlockingGetRxCount,
  919. USART1_NonBlockingControl,
  920. USART1_NonBlockingGetStatus,
  921. #endif
  922. USARTx_SetModemControl, USARTx_GetModemStatus};
  923. #endif /* usart1 */
  924. #if defined(USART2) && RTE_USART2
  925. /* User needs to provide the implementation for USART2_GetFreq/InitPins/DeinitPins
  926. in the application for enabling according instance. */
  927. extern uint32_t USART2_GetFreq(void);
  928. extern void USART2_InitPins(void);
  929. extern void USART2_DeinitPins(void);
  930. cmsis_usart_resource_t usart2_Resource = {USART2, USART2_GetFreq};
  931. /* usart2 Driver Control Block */
  932. #if RTE_USART2_DMA_EN
  933. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  934. cmsis_usart_dma_resource_t usart2_DmaResource = {
  935. RTE_USART2_DMA_TX_DMA_BASE, RTE_USART2_DMA_TX_CH, RTE_USART2_DMA_RX_DMA_BASE, RTE_USART2_DMA_RX_CH,
  936. };
  937. usart_dma_handle_t USART2_DmaHandle;
  938. dma_handle_t USART2_DmaRxHandle;
  939. dma_handle_t USART2_DmaTxHandle;
  940. #if defined(__CC_ARM)
  941. ARMCC_SECTION("usart2_dma_driver_state")
  942. cmsis_usart_dma_driver_state_t usart2_DmaDriverState = {
  943. #else
  944. cmsis_usart_dma_driver_state_t usart2_DmaDriverState = {
  945. #endif
  946. &usart2_Resource, &usart2_DmaResource, &USART2_DmaHandle, &USART2_DmaRxHandle, &USART2_DmaTxHandle,
  947. };
  948. static int32_t USART2_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  949. {
  950. USART2_InitPins();
  951. return USART_DmaInitialize(cb_event, &usart2_DmaDriverState);
  952. }
  953. static int32_t USART2_DmaUninitialize(void)
  954. {
  955. USART2_DeinitPins();
  956. return USART_DmaUninitialize(&usart2_DmaDriverState);
  957. }
  958. static int32_t USART2_DmaPowerControl(ARM_POWER_STATE state)
  959. {
  960. return USART_DmaPowerControl(state, &usart2_DmaDriverState);
  961. }
  962. static int32_t USART2_DmaSend(const void *data, uint32_t num)
  963. {
  964. return USART_DmaSend(data, num, &usart2_DmaDriverState);
  965. }
  966. static int32_t USART2_DmaReceive(void *data, uint32_t num)
  967. {
  968. return USART_DmaReceive(data, num, &usart2_DmaDriverState);
  969. }
  970. static int32_t USART2_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  971. {
  972. return USART_DmaTransfer(data_out, data_in, num, &usart2_DmaDriverState);
  973. }
  974. static uint32_t USART2_DmaGetTxCount(void)
  975. {
  976. return USART_DmaGetTxCount(&usart2_DmaDriverState);
  977. }
  978. static uint32_t USART2_DmaGetRxCount(void)
  979. {
  980. return USART_DmaGetRxCount(&usart2_DmaDriverState);
  981. }
  982. static int32_t USART2_DmaControl(uint32_t control, uint32_t arg)
  983. {
  984. return USART_DmaControl(control, arg, &usart2_DmaDriverState);
  985. }
  986. static ARM_USART_STATUS USART2_DmaGetStatus(void)
  987. {
  988. return USART_DmaGetStatus(&usart2_DmaDriverState);
  989. }
  990. #endif
  991. #else
  992. usart_handle_t USART2_Handle;
  993. #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
  994. static uint8_t usart2_rxRingBuffer[USART_RX_BUFFER_LEN];
  995. #endif
  996. #if defined(__CC_ARM)
  997. ARMCC_SECTION("usart2_non_blocking_driver_state")
  998. cmsis_usart_non_blocking_driver_state_t usart2_NonBlockingDriverState = {
  999. #else
  1000. cmsis_usart_non_blocking_driver_state_t usart2_NonBlockingDriverState = {
  1001. #endif
  1002. &usart2_Resource, &USART2_Handle,
  1003. };
  1004. static int32_t USART2_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1005. {
  1006. USART2_InitPins();
  1007. return USART_NonBlockingInitialize(cb_event, &usart2_NonBlockingDriverState);
  1008. }
  1009. static int32_t USART2_NonBlockingUninitialize(void)
  1010. {
  1011. USART2_DeinitPins();
  1012. return USART_NonBlockingUninitialize(&usart2_NonBlockingDriverState);
  1013. }
  1014. static int32_t USART2_NonBlockingPowerControl(ARM_POWER_STATE state)
  1015. {
  1016. uint32_t result;
  1017. result = USART_NonBlockingPowerControl(state, &usart2_NonBlockingDriverState);
  1018. #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
  1019. if ((state == ARM_POWER_FULL) && (usart2_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1020. {
  1021. USART_TransferStartRingBuffer(usart2_NonBlockingDriverState.resource->base,
  1022. usart2_NonBlockingDriverState.handle, usart2_rxRingBuffer, USART_RX_BUFFER_LEN);
  1023. }
  1024. #endif
  1025. return result;
  1026. }
  1027. static int32_t USART2_NonBlockingSend(const void *data, uint32_t num)
  1028. {
  1029. return USART_NonBlockingSend(data, num, &usart2_NonBlockingDriverState);
  1030. }
  1031. static int32_t USART2_NonBlockingReceive(void *data, uint32_t num)
  1032. {
  1033. return USART_NonBlockingReceive(data, num, &usart2_NonBlockingDriverState);
  1034. }
  1035. static int32_t USART2_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1036. {
  1037. return USART_NonBlockingTransfer(data_out, data_in, num, &usart2_NonBlockingDriverState);
  1038. }
  1039. static uint32_t USART2_NonBlockingGetTxCount(void)
  1040. {
  1041. return USART_NonBlockingGetTxCount(&usart2_NonBlockingDriverState);
  1042. }
  1043. static uint32_t USART2_NonBlockingGetRxCount(void)
  1044. {
  1045. return USART_NonBlockingGetRxCount(&usart2_NonBlockingDriverState);
  1046. }
  1047. static int32_t USART2_NonBlockingControl(uint32_t control, uint32_t arg)
  1048. {
  1049. int32_t result;
  1050. result = USART_NonBlockingControl(control, arg, &usart2_NonBlockingDriverState);
  1051. if (ARM_DRIVER_OK != result)
  1052. {
  1053. return result;
  1054. }
  1055. #if defined(USART2_RX_BUFFER_ENABLE) && (USART2_RX_BUFFER_ENABLE == 1)
  1056. /* Start receiving interrupts */
  1057. usart2_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1058. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1059. #endif
  1060. return ARM_DRIVER_OK;
  1061. }
  1062. static ARM_USART_STATUS USART2_NonBlockingGetStatus(void)
  1063. {
  1064. return USART_NonBlockingGetStatus(&usart2_NonBlockingDriverState);
  1065. }
  1066. #endif
  1067. ARM_DRIVER_USART Driver_USART2 = {
  1068. USARTx_GetVersion, USARTx_GetCapabilities,
  1069. #if RTE_USART2_DMA_EN
  1070. USART2_DmaInitialize, USART2_DmaUninitialize, USART2_DmaPowerControl, USART2_DmaSend, USART2_DmaReceive,
  1071. USART2_DmaTransfer, USART2_DmaGetTxCount, USART2_DmaGetRxCount, USART2_DmaControl, USART2_DmaGetStatus,
  1072. #else
  1073. USART2_NonBlockingInitialize,
  1074. USART2_NonBlockingUninitialize,
  1075. USART2_NonBlockingPowerControl,
  1076. USART2_NonBlockingSend,
  1077. USART2_NonBlockingReceive,
  1078. USART2_NonBlockingTransfer,
  1079. USART2_NonBlockingGetTxCount,
  1080. USART2_NonBlockingGetRxCount,
  1081. USART2_NonBlockingControl,
  1082. USART2_NonBlockingGetStatus,
  1083. #endif
  1084. USARTx_SetModemControl, USARTx_GetModemStatus};
  1085. #endif /* usart2 */
  1086. #if defined(USART3) && RTE_USART3
  1087. /* User needs to provide the implementation for USART3_GetFreq/InitPins/DeinitPins
  1088. in the application for enabling according instance. */
  1089. extern uint32_t USART3_GetFreq(void);
  1090. extern void USART3_InitPins(void);
  1091. extern void USART3_DeinitPins(void);
  1092. cmsis_usart_resource_t usart3_Resource = {USART3, USART3_GetFreq};
  1093. /* usart3 Driver Control Block */
  1094. #if RTE_USART3_DMA_EN
  1095. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1096. cmsis_usart_dma_resource_t usart3_DmaResource = {
  1097. RTE_USART3_DMA_TX_DMA_BASE, RTE_USART3_DMA_TX_CH, RTE_USART3_DMA_RX_DMA_BASE, RTE_USART3_DMA_RX_CH,
  1098. };
  1099. usart_dma_handle_t USART3_DmaHandle;
  1100. dma_handle_t USART3_DmaRxHandle;
  1101. dma_handle_t USART3_DmaTxHandle;
  1102. #if defined(__CC_ARM)
  1103. ARMCC_SECTION("usart3_dma_driver_state")
  1104. cmsis_usart_dma_driver_state_t usart3_DmaDriverState = {
  1105. #else
  1106. cmsis_usart_dma_driver_state_t usart3_DmaDriverState = {
  1107. #endif
  1108. &usart3_Resource, &usart3_DmaResource, &USART3_DmaHandle, &USART3_DmaRxHandle, &USART3_DmaTxHandle,
  1109. };
  1110. static int32_t USART3_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1111. {
  1112. USART3_InitPins();
  1113. return USART_DmaInitialize(cb_event, &usart3_DmaDriverState);
  1114. }
  1115. static int32_t USART3_DmaUninitialize(void)
  1116. {
  1117. USART3_DeinitPins();
  1118. return USART_DmaUninitialize(&usart3_DmaDriverState);
  1119. }
  1120. static int32_t USART3_DmaPowerControl(ARM_POWER_STATE state)
  1121. {
  1122. return USART_DmaPowerControl(state, &usart3_DmaDriverState);
  1123. }
  1124. static int32_t USART3_DmaSend(const void *data, uint32_t num)
  1125. {
  1126. return USART_DmaSend(data, num, &usart3_DmaDriverState);
  1127. }
  1128. static int32_t USART3_DmaReceive(void *data, uint32_t num)
  1129. {
  1130. return USART_DmaReceive(data, num, &usart3_DmaDriverState);
  1131. }
  1132. static int32_t USART3_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1133. {
  1134. return USART_DmaTransfer(data_out, data_in, num, &usart3_DmaDriverState);
  1135. }
  1136. static uint32_t USART3_DmaGetTxCount(void)
  1137. {
  1138. return USART_DmaGetTxCount(&usart3_DmaDriverState);
  1139. }
  1140. static uint32_t USART3_DmaGetRxCount(void)
  1141. {
  1142. return USART_DmaGetRxCount(&usart3_DmaDriverState);
  1143. }
  1144. static int32_t USART3_DmaControl(uint32_t control, uint32_t arg)
  1145. {
  1146. return USART_DmaControl(control, arg, &usart3_DmaDriverState);
  1147. }
  1148. static ARM_USART_STATUS USART3_DmaGetStatus(void)
  1149. {
  1150. return USART_DmaGetStatus(&usart3_DmaDriverState);
  1151. }
  1152. #endif
  1153. #else
  1154. usart_handle_t USART3_Handle;
  1155. #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
  1156. static uint8_t usart3_rxRingBuffer[USART_RX_BUFFER_LEN];
  1157. #endif
  1158. #if defined(__CC_ARM)
  1159. ARMCC_SECTION("usart3_non_blocking_driver_state")
  1160. cmsis_usart_non_blocking_driver_state_t usart3_NonBlockingDriverState = {
  1161. #else
  1162. cmsis_usart_non_blocking_driver_state_t usart3_NonBlockingDriverState = {
  1163. #endif
  1164. &usart3_Resource, &USART3_Handle,
  1165. };
  1166. static int32_t USART3_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1167. {
  1168. USART3_InitPins();
  1169. return USART_NonBlockingInitialize(cb_event, &usart3_NonBlockingDriverState);
  1170. }
  1171. static int32_t USART3_NonBlockingUninitialize(void)
  1172. {
  1173. USART3_DeinitPins();
  1174. return USART_NonBlockingUninitialize(&usart3_NonBlockingDriverState);
  1175. }
  1176. static int32_t USART3_NonBlockingPowerControl(ARM_POWER_STATE state)
  1177. {
  1178. uint32_t result;
  1179. result = USART_NonBlockingPowerControl(state, &usart3_NonBlockingDriverState);
  1180. #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
  1181. if ((state == ARM_POWER_FULL) && (usart3_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1182. {
  1183. USART_TransferStartRingBuffer(usart3_NonBlockingDriverState.resource->base,
  1184. usart3_NonBlockingDriverState.handle, usart3_rxRingBuffer, USART_RX_BUFFER_LEN);
  1185. }
  1186. #endif
  1187. return result;
  1188. }
  1189. static int32_t USART3_NonBlockingSend(const void *data, uint32_t num)
  1190. {
  1191. return USART_NonBlockingSend(data, num, &usart3_NonBlockingDriverState);
  1192. }
  1193. static int32_t USART3_NonBlockingReceive(void *data, uint32_t num)
  1194. {
  1195. return USART_NonBlockingReceive(data, num, &usart3_NonBlockingDriverState);
  1196. }
  1197. static int32_t USART3_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1198. {
  1199. return USART_NonBlockingTransfer(data_out, data_in, num, &usart3_NonBlockingDriverState);
  1200. }
  1201. static uint32_t USART3_NonBlockingGetTxCount(void)
  1202. {
  1203. return USART_NonBlockingGetTxCount(&usart3_NonBlockingDriverState);
  1204. }
  1205. static uint32_t USART3_NonBlockingGetRxCount(void)
  1206. {
  1207. return USART_NonBlockingGetRxCount(&usart3_NonBlockingDriverState);
  1208. }
  1209. static int32_t USART3_NonBlockingControl(uint32_t control, uint32_t arg)
  1210. {
  1211. int32_t result;
  1212. result = USART_NonBlockingControl(control, arg, &usart3_NonBlockingDriverState);
  1213. if (ARM_DRIVER_OK != result)
  1214. {
  1215. return result;
  1216. }
  1217. #if defined(USART3_RX_BUFFER_ENABLE) && (USART3_RX_BUFFER_ENABLE == 1)
  1218. /* Start receiving interrupts */
  1219. usart3_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1220. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1221. #endif
  1222. return ARM_DRIVER_OK;
  1223. }
  1224. static ARM_USART_STATUS USART3_NonBlockingGetStatus(void)
  1225. {
  1226. return USART_NonBlockingGetStatus(&usart3_NonBlockingDriverState);
  1227. }
  1228. #endif
  1229. ARM_DRIVER_USART Driver_USART3 = {
  1230. USARTx_GetVersion, USARTx_GetCapabilities,
  1231. #if RTE_USART3_DMA_EN
  1232. USART3_DmaInitialize, USART3_DmaUninitialize, USART3_DmaPowerControl, USART3_DmaSend, USART3_DmaReceive,
  1233. USART3_DmaTransfer, USART3_DmaGetTxCount, USART3_DmaGetRxCount, USART3_DmaControl, USART3_DmaGetStatus,
  1234. #else
  1235. USART3_NonBlockingInitialize,
  1236. USART3_NonBlockingUninitialize,
  1237. USART3_NonBlockingPowerControl,
  1238. USART3_NonBlockingSend,
  1239. USART3_NonBlockingReceive,
  1240. USART3_NonBlockingTransfer,
  1241. USART3_NonBlockingGetTxCount,
  1242. USART3_NonBlockingGetRxCount,
  1243. USART3_NonBlockingControl,
  1244. USART3_NonBlockingGetStatus,
  1245. #endif
  1246. USARTx_SetModemControl, USARTx_GetModemStatus};
  1247. #endif /* usart3 */
  1248. #if defined(USART4) && RTE_USART4
  1249. /* User needs to provide the implementation for USART4_GetFreq/InitPins/DeinitPins
  1250. in the application for enabling according instance. */
  1251. extern uint32_t USART4_GetFreq(void);
  1252. extern void USART4_InitPins(void);
  1253. extern void USART4_DeinitPins(void);
  1254. cmsis_usart_resource_t usart4_Resource = {USART4, USART4_GetFreq};
  1255. #if RTE_USART4_DMA_EN
  1256. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1257. cmsis_usart_dma_resource_t usart4_DmaResource = {
  1258. RTE_USART4_DMA_TX_DMA_BASE, RTE_USART4_DMA_TX_CH, RTE_USART4_DMA_RX_DMA_BASE, RTE_USART4_DMA_RX_CH,
  1259. };
  1260. usart_dma_handle_t USART4_DmaHandle;
  1261. dma_handle_t USART4_DmaRxHandle;
  1262. dma_handle_t USART4_DmaTxHandle;
  1263. #if defined(__CC_ARM)
  1264. ARMCC_SECTION("usart4_dma_driver_state")
  1265. cmsis_usart_dma_driver_state_t usart4_DmaDriverState = {
  1266. #else
  1267. cmsis_usart_dma_driver_state_t usart4_DmaDriverState = {
  1268. #endif
  1269. &usart4_Resource, &usart4_DmaResource, &USART4_DmaHandle, &USART4_DmaRxHandle, &USART4_DmaTxHandle,
  1270. };
  1271. static int32_t USART4_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1272. {
  1273. USART4_InitPins();
  1274. return USART_DmaInitialize(cb_event, &usart4_DmaDriverState);
  1275. }
  1276. static int32_t USART4_DmaUninitialize(void)
  1277. {
  1278. USART4_DeinitPins();
  1279. return USART_DmaUninitialize(&usart4_DmaDriverState);
  1280. }
  1281. static int32_t USART4_DmaPowerControl(ARM_POWER_STATE state)
  1282. {
  1283. return USART_DmaPowerControl(state, &usart4_DmaDriverState);
  1284. }
  1285. static int32_t USART4_DmaSend(const void *data, uint32_t num)
  1286. {
  1287. return USART_DmaSend(data, num, &usart4_DmaDriverState);
  1288. }
  1289. static int32_t USART4_DmaReceive(void *data, uint32_t num)
  1290. {
  1291. return USART_DmaReceive(data, num, &usart4_DmaDriverState);
  1292. }
  1293. static int32_t USART4_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1294. {
  1295. return USART_DmaTransfer(data_out, data_in, num, &usart4_DmaDriverState);
  1296. }
  1297. static uint32_t USART4_DmaGetTxCount(void)
  1298. {
  1299. return USART_DmaGetTxCount(&usart4_DmaDriverState);
  1300. }
  1301. static uint32_t USART4_DmaGetRxCount(void)
  1302. {
  1303. return USART_DmaGetRxCount(&usart4_DmaDriverState);
  1304. }
  1305. static int32_t USART4_DmaControl(uint32_t control, uint32_t arg)
  1306. {
  1307. return USART_DmaControl(control, arg, &usart4_DmaDriverState);
  1308. }
  1309. static ARM_USART_STATUS USART4_DmaGetStatus(void)
  1310. {
  1311. return USART_DmaGetStatus(&usart4_DmaDriverState);
  1312. }
  1313. #endif
  1314. #else
  1315. usart_handle_t USART4_Handle;
  1316. #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
  1317. static uint8_t usart4_rxRingBuffer[USART_RX_BUFFER_LEN];
  1318. #endif
  1319. #if defined(__CC_ARM)
  1320. ARMCC_SECTION("usart4_non_blocking_driver_state")
  1321. cmsis_usart_non_blocking_driver_state_t usart4_NonBlockingDriverState = {
  1322. #else
  1323. cmsis_usart_non_blocking_driver_state_t usart4_NonBlockingDriverState = {
  1324. #endif
  1325. &usart4_Resource, &USART4_Handle,
  1326. };
  1327. static int32_t USART4_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1328. {
  1329. USART4_InitPins();
  1330. return USART_NonBlockingInitialize(cb_event, &usart4_NonBlockingDriverState);
  1331. }
  1332. static int32_t USART4_NonBlockingUninitialize(void)
  1333. {
  1334. USART4_DeinitPins();
  1335. return USART_NonBlockingUninitialize(&usart4_NonBlockingDriverState);
  1336. }
  1337. static int32_t USART4_NonBlockingPowerControl(ARM_POWER_STATE state)
  1338. {
  1339. uint32_t result;
  1340. result = USART_NonBlockingPowerControl(state, &usart4_NonBlockingDriverState);
  1341. #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
  1342. if ((state == ARM_POWER_FULL) && (usart4_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1343. {
  1344. USART_TransferStartRingBuffer(usart4_NonBlockingDriverState.resource->base,
  1345. usart4_NonBlockingDriverState.handle, usart4_rxRingBuffer, USART_RX_BUFFER_LEN);
  1346. }
  1347. #endif
  1348. return result;
  1349. }
  1350. static int32_t USART4_NonBlockingSend(const void *data, uint32_t num)
  1351. {
  1352. return USART_NonBlockingSend(data, num, &usart4_NonBlockingDriverState);
  1353. }
  1354. static int32_t USART4_NonBlockingReceive(void *data, uint32_t num)
  1355. {
  1356. return USART_NonBlockingReceive(data, num, &usart4_NonBlockingDriverState);
  1357. }
  1358. static int32_t USART4_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1359. {
  1360. return USART_NonBlockingTransfer(data_out, data_in, num, &usart4_NonBlockingDriverState);
  1361. }
  1362. static uint32_t USART4_NonBlockingGetTxCount(void)
  1363. {
  1364. return USART_NonBlockingGetTxCount(&usart4_NonBlockingDriverState);
  1365. }
  1366. static uint32_t USART4_NonBlockingGetRxCount(void)
  1367. {
  1368. return USART_NonBlockingGetRxCount(&usart4_NonBlockingDriverState);
  1369. }
  1370. static int32_t USART4_NonBlockingControl(uint32_t control, uint32_t arg)
  1371. {
  1372. int32_t result;
  1373. result = USART_NonBlockingControl(control, arg, &usart4_NonBlockingDriverState);
  1374. if (ARM_DRIVER_OK != result)
  1375. {
  1376. return result;
  1377. }
  1378. #if defined(USART4_RX_BUFFER_ENABLE) && (USART4_RX_BUFFER_ENABLE == 1)
  1379. /* Start receiving interrupts */
  1380. usart4_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1381. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1382. #endif
  1383. return ARM_DRIVER_OK;
  1384. }
  1385. static ARM_USART_STATUS USART4_NonBlockingGetStatus(void)
  1386. {
  1387. return USART_NonBlockingGetStatus(&usart4_NonBlockingDriverState);
  1388. }
  1389. #endif
  1390. ARM_DRIVER_USART Driver_USART4 = {
  1391. USARTx_GetVersion, USARTx_GetCapabilities,
  1392. #if RTE_USART4_DMA_EN
  1393. USART4_DmaInitialize, USART4_DmaUninitialize, USART4_DmaPowerControl, USART4_DmaSend, USART4_DmaReceive,
  1394. USART4_DmaTransfer, USART4_DmaGetTxCount, USART4_DmaGetRxCount, USART4_DmaControl, USART4_DmaGetStatus,
  1395. #else
  1396. USART4_NonBlockingInitialize,
  1397. USART4_NonBlockingUninitialize,
  1398. USART4_NonBlockingPowerControl,
  1399. USART4_NonBlockingSend,
  1400. USART4_NonBlockingReceive,
  1401. USART4_NonBlockingTransfer,
  1402. USART4_NonBlockingGetTxCount,
  1403. USART4_NonBlockingGetRxCount,
  1404. USART4_NonBlockingControl,
  1405. USART4_NonBlockingGetStatus,
  1406. #endif
  1407. USARTx_SetModemControl, USARTx_GetModemStatus};
  1408. #endif /* usart4 */
  1409. #if defined(USART5) && RTE_USART5
  1410. /* User needs to provide the implementation for USART5_GetFreq/InitPins/DeinitPins
  1411. in the application for enabling according instance. */
  1412. extern uint32_t USART5_GetFreq(void);
  1413. extern void USART5_InitPins(void);
  1414. extern void USART5_DeinitPins(void);
  1415. cmsis_usart_resource_t usart5_Resource = {USART5, USART5_GetFreq};
  1416. #if RTE_USART5_DMA_EN
  1417. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1418. cmsis_usart_dma_resource_t usart5_DmaResource = {
  1419. RTE_USART5_DMA_TX_DMA_BASE, RTE_USART5_DMA_TX_CH, RTE_USART5_DMA_RX_DMA_BASE, RTE_USART5_DMA_RX_CH,
  1420. };
  1421. usart_dma_handle_t USART5_DmaHandle;
  1422. dma_handle_t USART5_DmaRxHandle;
  1423. dma_handle_t USART5_DmaTxHandle;
  1424. #if defined(__CC_ARM)
  1425. ARMCC_SECTION("usart5_dma_driver_state")
  1426. cmsis_usart_dma_driver_state_t usart5_DmaDriverState = {
  1427. #else
  1428. cmsis_usart_dma_driver_state_t usart5_DmaDriverState = {
  1429. #endif
  1430. &usart5_Resource, &usart5_DmaResource, &USART5_DmaHandle, &USART5_DmaRxHandle, &USART5_DmaTxHandle,
  1431. };
  1432. static int32_t USART5_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1433. {
  1434. USART5_InitPins();
  1435. return USART_DmaInitialize(cb_event, &usart5_DmaDriverState);
  1436. }
  1437. static int32_t USART5_DmaUninitialize(void)
  1438. {
  1439. USART5_DeinitPins();
  1440. return USART_DmaUninitialize(&usart5_DmaDriverState);
  1441. }
  1442. static int32_t USART5_DmaPowerControl(ARM_POWER_STATE state)
  1443. {
  1444. return USART_DmaPowerControl(state, &usart5_DmaDriverState);
  1445. }
  1446. static int32_t USART5_DmaSend(const void *data, uint32_t num)
  1447. {
  1448. return USART_DmaSend(data, num, &usart5_DmaDriverState);
  1449. }
  1450. static int32_t USART5_DmaReceive(void *data, uint32_t num)
  1451. {
  1452. return USART_DmaReceive(data, num, &usart5_DmaDriverState);
  1453. }
  1454. static int32_t USART5_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1455. {
  1456. return USART_DmaTransfer(data_out, data_in, num, &usart5_DmaDriverState);
  1457. }
  1458. static uint32_t USART5_DmaGetTxCount(void)
  1459. {
  1460. return USART_DmaGetTxCount(&usart5_DmaDriverState);
  1461. }
  1462. static uint32_t USART5_DmaGetRxCount(void)
  1463. {
  1464. return USART_DmaGetRxCount(&usart5_DmaDriverState);
  1465. }
  1466. static int32_t USART5_DmaControl(uint32_t control, uint32_t arg)
  1467. {
  1468. return USART_DmaControl(control, arg, &usart5_DmaDriverState);
  1469. }
  1470. static ARM_USART_STATUS USART5_DmaGetStatus(void)
  1471. {
  1472. return USART_DmaGetStatus(&usart5_DmaDriverState);
  1473. }
  1474. #endif
  1475. #else
  1476. usart_handle_t USART5_Handle;
  1477. #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
  1478. static uint8_t usart5_rxRingBuffer[USART_RX_BUFFER_LEN];
  1479. #endif
  1480. #if defined(__CC_ARM)
  1481. ARMCC_SECTION("usart5_non_blocking_driver_state")
  1482. cmsis_usart_non_blocking_driver_state_t usart5_NonBlockingDriverState = {
  1483. #else
  1484. cmsis_usart_non_blocking_driver_state_t usart5_NonBlockingDriverState = {
  1485. #endif
  1486. &usart5_Resource, &USART5_Handle,
  1487. };
  1488. static int32_t USART5_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1489. {
  1490. USART5_InitPins();
  1491. return USART_NonBlockingInitialize(cb_event, &usart5_NonBlockingDriverState);
  1492. }
  1493. static int32_t USART5_NonBlockingUninitialize(void)
  1494. {
  1495. USART5_DeinitPins();
  1496. return USART_NonBlockingUninitialize(&usart5_NonBlockingDriverState);
  1497. }
  1498. static int32_t USART5_NonBlockingPowerControl(ARM_POWER_STATE state)
  1499. {
  1500. uint32_t result;
  1501. result = USART_NonBlockingPowerControl(state, &usart5_NonBlockingDriverState);
  1502. #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
  1503. if ((state == ARM_POWER_FULL) && (usart5_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1504. {
  1505. USART_TransferStartRingBuffer(usart5_NonBlockingDriverState.resource->base,
  1506. usart5_NonBlockingDriverState.handle, usart5_rxRingBuffer, USART_RX_BUFFER_LEN);
  1507. }
  1508. #endif
  1509. return result;
  1510. }
  1511. static int32_t USART5_NonBlockingSend(const void *data, uint32_t num)
  1512. {
  1513. return USART_NonBlockingSend(data, num, &usart5_NonBlockingDriverState);
  1514. }
  1515. static int32_t USART5_NonBlockingReceive(void *data, uint32_t num)
  1516. {
  1517. return USART_NonBlockingReceive(data, num, &usart5_NonBlockingDriverState);
  1518. }
  1519. static int32_t USART5_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1520. {
  1521. return USART_NonBlockingTransfer(data_out, data_in, num, &usart5_NonBlockingDriverState);
  1522. }
  1523. static uint32_t USART5_NonBlockingGetTxCount(void)
  1524. {
  1525. return USART_NonBlockingGetTxCount(&usart5_NonBlockingDriverState);
  1526. }
  1527. static uint32_t USART5_NonBlockingGetRxCount(void)
  1528. {
  1529. return USART_NonBlockingGetRxCount(&usart5_NonBlockingDriverState);
  1530. }
  1531. static int32_t USART5_NonBlockingControl(uint32_t control, uint32_t arg)
  1532. {
  1533. int32_t result;
  1534. result = USART_NonBlockingControl(control, arg, &usart5_NonBlockingDriverState);
  1535. if (ARM_DRIVER_OK != result)
  1536. {
  1537. return result;
  1538. }
  1539. #if defined(USART5_RX_BUFFER_ENABLE) && (USART5_RX_BUFFER_ENABLE == 1)
  1540. /* Start receiving interrupts */
  1541. usart5_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1542. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1543. #endif
  1544. return ARM_DRIVER_OK;
  1545. }
  1546. static ARM_USART_STATUS USART5_NonBlockingGetStatus(void)
  1547. {
  1548. return USART_NonBlockingGetStatus(&usart5_NonBlockingDriverState);
  1549. }
  1550. #endif
  1551. ARM_DRIVER_USART Driver_USART5 = {
  1552. USARTx_GetVersion, USARTx_GetCapabilities,
  1553. #if RTE_USART5_DMA_EN
  1554. USART5_DmaInitialize, USART5_DmaUninitialize, USART5_DmaPowerControl, USART5_DmaSend, USART5_DmaReceive,
  1555. USART5_DmaTransfer, USART5_DmaGetTxCount, USART5_DmaGetRxCount, USART5_DmaControl, USART5_DmaGetStatus,
  1556. #else
  1557. USART5_NonBlockingInitialize,
  1558. USART5_NonBlockingUninitialize,
  1559. USART5_NonBlockingPowerControl,
  1560. USART5_NonBlockingSend,
  1561. USART5_NonBlockingReceive,
  1562. USART5_NonBlockingTransfer,
  1563. USART5_NonBlockingGetTxCount,
  1564. USART5_NonBlockingGetRxCount,
  1565. USART5_NonBlockingControl,
  1566. USART5_NonBlockingGetStatus,
  1567. #endif
  1568. USARTx_SetModemControl, USARTx_GetModemStatus};
  1569. #endif /* usart5 */
  1570. #if defined(USART6) && RTE_USART6
  1571. /* User needs to provide the implementation for USART6_GetFreq/InitPins/DeinitPins
  1572. in the application for enabling according instance. */
  1573. extern uint32_t USART6_GetFreq(void);
  1574. extern void USART6_InitPins(void);
  1575. extern void USART6_DeinitPins(void);
  1576. cmsis_usart_resource_t usart6_Resource = {USART6, USART6_GetFreq};
  1577. #if RTE_USART6_DMA_EN
  1578. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1579. cmsis_usart_dma_resource_t usart6_DmaResource = {
  1580. RTE_USART6_DMA_TX_DMA_BASE, RTE_USART6_DMA_TX_CH, RTE_USART6_DMA_RX_DMA_BASE, RTE_USART6_DMA_RX_CH,
  1581. };
  1582. usart_dma_handle_t USART6_DmaHandle;
  1583. dma_handle_t USART6_DmaRxHandle;
  1584. dma_handle_t USART6_DmaTxHandle;
  1585. #if defined(__CC_ARM)
  1586. ARMCC_SECTION("usart6_dma_driver_state")
  1587. cmsis_usart_dma_driver_state_t usart6_DmaDriverState = {
  1588. #else
  1589. cmsis_usart_dma_driver_state_t usart6_DmaDriverState = {
  1590. #endif
  1591. &usart6_Resource, &usart6_DmaResource, &USART6_DmaHandle, &USART6_DmaRxHandle, &USART6_DmaTxHandle,
  1592. };
  1593. static int32_t USART6_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1594. {
  1595. USART6_InitPins();
  1596. return USART_DmaInitialize(cb_event, &usart6_DmaDriverState);
  1597. }
  1598. static int32_t USART6_DmaUninitialize(void)
  1599. {
  1600. USART6_DeinitPins();
  1601. return USART_DmaUninitialize(&usart6_DmaDriverState);
  1602. }
  1603. static int32_t USART6_DmaPowerControl(ARM_POWER_STATE state)
  1604. {
  1605. return USART_DmaPowerControl(state, &usart6_DmaDriverState);
  1606. }
  1607. static int32_t USART6_DmaSend(const void *data, uint32_t num)
  1608. {
  1609. return USART_DmaSend(data, num, &usart6_DmaDriverState);
  1610. }
  1611. static int32_t USART6_DmaReceive(void *data, uint32_t num)
  1612. {
  1613. return USART_DmaReceive(data, num, &usart6_DmaDriverState);
  1614. }
  1615. static int32_t USART6_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1616. {
  1617. return USART_DmaTransfer(data_out, data_in, num, &usart6_DmaDriverState);
  1618. }
  1619. static uint32_t USART6_DmaGetTxCount(void)
  1620. {
  1621. return USART_DmaGetTxCount(&usart6_DmaDriverState);
  1622. }
  1623. static uint32_t USART6_DmaGetRxCount(void)
  1624. {
  1625. return USART_DmaGetRxCount(&usart6_DmaDriverState);
  1626. }
  1627. static int32_t USART6_DmaControl(uint32_t control, uint32_t arg)
  1628. {
  1629. return USART_DmaControl(control, arg, &usart6_DmaDriverState);
  1630. }
  1631. static ARM_USART_STATUS USART6_DmaGetStatus(void)
  1632. {
  1633. return USART_DmaGetStatus(&usart6_DmaDriverState);
  1634. }
  1635. #endif
  1636. #else
  1637. usart_handle_t USART6_Handle;
  1638. #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
  1639. static uint8_t usart6_rxRingBuffer[USART_RX_BUFFER_LEN];
  1640. #endif
  1641. #if defined(__CC_ARM)
  1642. ARMCC_SECTION("usart6_non_blocking_driver_state")
  1643. cmsis_usart_non_blocking_driver_state_t usart6_NonBlockingDriverState = {
  1644. #else
  1645. cmsis_usart_non_blocking_driver_state_t usart6_NonBlockingDriverState = {
  1646. #endif
  1647. &usart6_Resource, &USART6_Handle,
  1648. };
  1649. static int32_t USART6_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1650. {
  1651. USART6_InitPins();
  1652. return USART_NonBlockingInitialize(cb_event, &usart6_NonBlockingDriverState);
  1653. }
  1654. static int32_t USART6_NonBlockingUninitialize(void)
  1655. {
  1656. USART6_DeinitPins();
  1657. return USART_NonBlockingUninitialize(&usart6_NonBlockingDriverState);
  1658. }
  1659. static int32_t USART6_NonBlockingPowerControl(ARM_POWER_STATE state)
  1660. {
  1661. uint32_t result;
  1662. result = USART_NonBlockingPowerControl(state, &usart6_NonBlockingDriverState);
  1663. #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
  1664. if ((state == ARM_POWER_FULL) && (usart6_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1665. {
  1666. USART_TransferStartRingBuffer(usart6_NonBlockingDriverState.resource->base,
  1667. usart6_NonBlockingDriverState.handle, usart6_rxRingBuffer, USART_RX_BUFFER_LEN);
  1668. }
  1669. #endif
  1670. return result;
  1671. }
  1672. static int32_t USART6_NonBlockingSend(const void *data, uint32_t num)
  1673. {
  1674. return USART_NonBlockingSend(data, num, &usart6_NonBlockingDriverState);
  1675. }
  1676. static int32_t USART6_NonBlockingReceive(void *data, uint32_t num)
  1677. {
  1678. return USART_NonBlockingReceive(data, num, &usart6_NonBlockingDriverState);
  1679. }
  1680. static int32_t USART6_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1681. {
  1682. return USART_NonBlockingTransfer(data_out, data_in, num, &usart6_NonBlockingDriverState);
  1683. }
  1684. static uint32_t USART6_NonBlockingGetTxCount(void)
  1685. {
  1686. return USART_NonBlockingGetTxCount(&usart6_NonBlockingDriverState);
  1687. }
  1688. static uint32_t USART6_NonBlockingGetRxCount(void)
  1689. {
  1690. return USART_NonBlockingGetRxCount(&usart6_NonBlockingDriverState);
  1691. }
  1692. static int32_t USART6_NonBlockingControl(uint32_t control, uint32_t arg)
  1693. {
  1694. int32_t result;
  1695. result = USART_NonBlockingControl(control, arg, &usart6_NonBlockingDriverState);
  1696. if (ARM_DRIVER_OK != result)
  1697. {
  1698. return result;
  1699. }
  1700. #if defined(USART6_RX_BUFFER_ENABLE) && (USART6_RX_BUFFER_ENABLE == 1)
  1701. /* Start receiving interrupts */
  1702. usart6_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1703. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1704. #endif
  1705. return ARM_DRIVER_OK;
  1706. }
  1707. static ARM_USART_STATUS USART6_NonBlockingGetStatus(void)
  1708. {
  1709. return USART_NonBlockingGetStatus(&usart6_NonBlockingDriverState);
  1710. }
  1711. #endif
  1712. ARM_DRIVER_USART Driver_USART6 = {
  1713. USARTx_GetVersion, USARTx_GetCapabilities,
  1714. #if RTE_USART6_DMA_EN
  1715. USART6_DmaInitialize, USART6_DmaUninitialize, USART6_DmaPowerControl, USART6_DmaSend, USART6_DmaReceive,
  1716. USART6_DmaTransfer, USART6_DmaGetTxCount, USART6_DmaGetRxCount, USART6_DmaControl, USART6_DmaGetStatus,
  1717. #else
  1718. USART6_NonBlockingInitialize,
  1719. USART6_NonBlockingUninitialize,
  1720. USART6_NonBlockingPowerControl,
  1721. USART6_NonBlockingSend,
  1722. USART6_NonBlockingReceive,
  1723. USART6_NonBlockingTransfer,
  1724. USART6_NonBlockingGetTxCount,
  1725. USART6_NonBlockingGetRxCount,
  1726. USART6_NonBlockingControl,
  1727. USART6_NonBlockingGetStatus,
  1728. #endif
  1729. USARTx_SetModemControl, USARTx_GetModemStatus};
  1730. #endif /* usart6 */
  1731. #if defined(USART7) && RTE_USART7
  1732. /* User needs to provide the implementation for USART7_GetFreq/InitPins/DeinitPins
  1733. in the application for enabling according instance. */
  1734. extern uint32_t USART7_GetFreq(void);
  1735. extern void USART7_InitPins(void);
  1736. extern void USART7_DeinitPins(void);
  1737. cmsis_usart_resource_t usart7_Resource = {USART7, USART7_GetFreq};
  1738. #if RTE_USART7_DMA_EN
  1739. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1740. cmsis_usart_dma_resource_t usart7_DmaResource = {
  1741. RTE_USART7_DMA_TX_DMA_BASE, RTE_USART7_DMA_TX_CH, RTE_USART7_DMA_RX_DMA_BASE, RTE_USART7_DMA_RX_CH,
  1742. };
  1743. usart_dma_handle_t USART7_DmaHandle;
  1744. dma_handle_t USART7_DmaRxHandle;
  1745. dma_handle_t USART7_DmaTxHandle;
  1746. #if defined(__CC_ARM)
  1747. ARMCC_SECTION("usart7_dma_driver_state")
  1748. cmsis_usart_dma_driver_state_t usart7_DmaDriverState = {
  1749. #else
  1750. cmsis_usart_dma_driver_state_t usart7_DmaDriverState = {
  1751. #endif
  1752. &usart7_Resource, &usart7_DmaResource, &USART7_DmaHandle, &USART7_DmaRxHandle, &USART7_DmaTxHandle,
  1753. };
  1754. static int32_t USART7_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1755. {
  1756. USART7_InitPins();
  1757. return USART_DmaInitialize(cb_event, &usart7_DmaDriverState);
  1758. }
  1759. static int32_t USART7_DmaUninitialize(void)
  1760. {
  1761. USART7_DeinitPins();
  1762. return USART_DmaUninitialize(&usart7_DmaDriverState);
  1763. }
  1764. static int32_t USART7_DmaPowerControl(ARM_POWER_STATE state)
  1765. {
  1766. return USART_DmaPowerControl(state, &usart7_DmaDriverState);
  1767. }
  1768. static int32_t USART7_DmaSend(const void *data, uint32_t num)
  1769. {
  1770. return USART_DmaSend(data, num, &usart7_DmaDriverState);
  1771. }
  1772. static int32_t USART7_DmaReceive(void *data, uint32_t num)
  1773. {
  1774. return USART_DmaReceive(data, num, &usart7_DmaDriverState);
  1775. }
  1776. static int32_t USART7_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1777. {
  1778. return USART_DmaTransfer(data_out, data_in, num, &usart7_DmaDriverState);
  1779. }
  1780. static uint32_t USART7_DmaGetTxCount(void)
  1781. {
  1782. return USART_DmaGetTxCount(&usart7_DmaDriverState);
  1783. }
  1784. static uint32_t USART7_DmaGetRxCount(void)
  1785. {
  1786. return USART_DmaGetRxCount(&usart7_DmaDriverState);
  1787. }
  1788. static int32_t USART7_DmaControl(uint32_t control, uint32_t arg)
  1789. {
  1790. return USART_DmaControl(control, arg, &usart7_DmaDriverState);
  1791. }
  1792. static ARM_USART_STATUS USART7_DmaGetStatus(void)
  1793. {
  1794. return USART_DmaGetStatus(&usart7_DmaDriverState);
  1795. }
  1796. #endif
  1797. #else
  1798. usart_handle_t USART7_Handle;
  1799. #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
  1800. static uint8_t usart7_rxRingBuffer[USART_RX_BUFFER_LEN];
  1801. #endif
  1802. #if defined(__CC_ARM)
  1803. ARMCC_SECTION("usart7_non_blocking_driver_state")
  1804. cmsis_usart_non_blocking_driver_state_t usart7_NonBlockingDriverState = {
  1805. #else
  1806. cmsis_usart_non_blocking_driver_state_t usart7_NonBlockingDriverState = {
  1807. #endif
  1808. &usart7_Resource, &USART7_Handle,
  1809. };
  1810. static int32_t USART7_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1811. {
  1812. USART7_InitPins();
  1813. return USART_NonBlockingInitialize(cb_event, &usart7_NonBlockingDriverState);
  1814. }
  1815. static int32_t USART7_NonBlockingUninitialize(void)
  1816. {
  1817. USART7_DeinitPins();
  1818. return USART_NonBlockingUninitialize(&usart7_NonBlockingDriverState);
  1819. }
  1820. static int32_t USART7_NonBlockingPowerControl(ARM_POWER_STATE state)
  1821. {
  1822. uint32_t result;
  1823. result = USART_NonBlockingPowerControl(state, &usart7_NonBlockingDriverState);
  1824. #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
  1825. if ((state == ARM_POWER_FULL) && (usart7_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1826. {
  1827. USART_TransferStartRingBuffer(usart7_NonBlockingDriverState.resource->base,
  1828. usart7_NonBlockingDriverState.handle, usart7_rxRingBuffer, USART_RX_BUFFER_LEN);
  1829. }
  1830. #endif
  1831. return result;
  1832. }
  1833. static int32_t USART7_NonBlockingSend(const void *data, uint32_t num)
  1834. {
  1835. return USART_NonBlockingSend(data, num, &usart7_NonBlockingDriverState);
  1836. }
  1837. static int32_t USART7_NonBlockingReceive(void *data, uint32_t num)
  1838. {
  1839. return USART_NonBlockingReceive(data, num, &usart7_NonBlockingDriverState);
  1840. }
  1841. static int32_t USART7_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  1842. {
  1843. return USART_NonBlockingTransfer(data_out, data_in, num, &usart7_NonBlockingDriverState);
  1844. }
  1845. static uint32_t USART7_NonBlockingGetTxCount(void)
  1846. {
  1847. return USART_NonBlockingGetTxCount(&usart7_NonBlockingDriverState);
  1848. }
  1849. static uint32_t USART7_NonBlockingGetRxCount(void)
  1850. {
  1851. return USART_NonBlockingGetRxCount(&usart7_NonBlockingDriverState);
  1852. }
  1853. static int32_t USART7_NonBlockingControl(uint32_t control, uint32_t arg)
  1854. {
  1855. int32_t result;
  1856. result = USART_NonBlockingControl(control, arg, &usart7_NonBlockingDriverState);
  1857. if (ARM_DRIVER_OK != result)
  1858. {
  1859. return result;
  1860. }
  1861. #if defined(USART7_RX_BUFFER_ENABLE) && (USART7_RX_BUFFER_ENABLE == 1)
  1862. /* Start receiving interrupts */
  1863. usart7_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  1864. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  1865. #endif
  1866. return ARM_DRIVER_OK;
  1867. }
  1868. static ARM_USART_STATUS USART7_NonBlockingGetStatus(void)
  1869. {
  1870. return USART_NonBlockingGetStatus(&usart7_NonBlockingDriverState);
  1871. }
  1872. #endif
  1873. ARM_DRIVER_USART Driver_USART7 = {
  1874. USARTx_GetVersion, USARTx_GetCapabilities,
  1875. #if RTE_USART7_DMA_EN
  1876. USART7_DmaInitialize, USART7_DmaUninitialize, USART7_DmaPowerControl, USART7_DmaSend, USART7_DmaReceive,
  1877. USART7_DmaTransfer, USART7_DmaGetTxCount, USART7_DmaGetRxCount, USART7_DmaControl, USART7_DmaGetStatus,
  1878. #else
  1879. USART7_NonBlockingInitialize,
  1880. USART7_NonBlockingUninitialize,
  1881. USART7_NonBlockingPowerControl,
  1882. USART7_NonBlockingSend,
  1883. USART7_NonBlockingReceive,
  1884. USART7_NonBlockingTransfer,
  1885. USART7_NonBlockingGetTxCount,
  1886. USART7_NonBlockingGetRxCount,
  1887. USART7_NonBlockingControl,
  1888. USART7_NonBlockingGetStatus,
  1889. #endif
  1890. USARTx_SetModemControl, USARTx_GetModemStatus};
  1891. #endif /* usart7 */
  1892. #if defined(USART8) && RTE_USART8
  1893. /* User needs to provide the implementation for USART8_GetFreq/InitPins/DeinitPins
  1894. in the application for enabling according instance. */
  1895. extern uint32_t USART8_GetFreq(void);
  1896. extern void USART8_InitPins(void);
  1897. extern void USART8_DeinitPins(void);
  1898. cmsis_usart_resource_t usart8_Resource = {USART8, USART8_GetFreq};
  1899. #if RTE_USART8_DMA_EN
  1900. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  1901. cmsis_usart_dma_resource_t usart8_DmaResource = {
  1902. RTE_USART8_DMA_TX_DMA_BASE, RTE_USART8_DMA_TX_CH, RTE_USART8_DMA_RX_DMA_BASE, RTE_USART8_DMA_RX_CH,
  1903. };
  1904. usart_dma_handle_t USART8_DmaHandle;
  1905. dma_handle_t USART8_DmaRxHandle;
  1906. dma_handle_t USART8_DmaTxHandle;
  1907. #if defined(__CC_ARM)
  1908. ARMCC_SECTION("usart8_dma_driver_state")
  1909. cmsis_usart_dma_driver_state_t usart8_DmaDriverState = {
  1910. #else
  1911. cmsis_usart_dma_driver_state_t usart8_DmaDriverState = {
  1912. #endif
  1913. &usart8_Resource, &usart8_DmaResource, &USART8_DmaHandle, &USART8_DmaRxHandle, &USART8_DmaTxHandle,
  1914. };
  1915. static int32_t USART8_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  1916. {
  1917. USART8_InitPins();
  1918. return USART_DmaInitialize(cb_event, &usart8_DmaDriverState);
  1919. }
  1920. static int32_t USART8_DmaUninitialize(void)
  1921. {
  1922. USART8_DeinitPins();
  1923. return USART_DmaUninitialize(&usart8_DmaDriverState);
  1924. }
  1925. static int32_t USART8_DmaPowerControl(ARM_POWER_STATE state)
  1926. {
  1927. return USART_DmaPowerControl(state, &usart8_DmaDriverState);
  1928. }
  1929. static int32_t USART8_DmaSend(const void *data, uint32_t num)
  1930. {
  1931. return USART_DmaSend(data, num, &usart8_DmaDriverState);
  1932. }
  1933. static int32_t USART8_DmaReceive(void *data, uint32_t num)
  1934. {
  1935. return USART_DmaReceive(data, num, &usart8_DmaDriverState);
  1936. }
  1937. static int32_t USART8_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  1938. {
  1939. return USART_DmaTransfer(data_out, data_in, num, &usart8_DmaDriverState);
  1940. }
  1941. static uint32_t USART8_DmaGetTxCount(void)
  1942. {
  1943. return USART_DmaGetTxCount(&usart8_DmaDriverState);
  1944. }
  1945. static uint32_t USART8_DmaGetRxCount(void)
  1946. {
  1947. return USART_DmaGetRxCount(&usart8_DmaDriverState);
  1948. }
  1949. static int32_t USART8_DmaControl(uint32_t control, uint32_t arg)
  1950. {
  1951. return USART_DmaControl(control, arg, &usart8_DmaDriverState);
  1952. }
  1953. static ARM_USART_STATUS USART8_DmaGetStatus(void)
  1954. {
  1955. return USART_DmaGetStatus(&usart8_DmaDriverState);
  1956. }
  1957. #endif
  1958. #else
  1959. usart_handle_t USART8_Handle;
  1960. #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
  1961. static uint8_t usart8_rxRingBuffer[USART_RX_BUFFER_LEN];
  1962. #endif
  1963. #if defined(__CC_ARM)
  1964. ARMCC_SECTION("usart8_non_blocking_driver_state")
  1965. cmsis_usart_non_blocking_driver_state_t usart8_NonBlockingDriverState = {
  1966. #else
  1967. cmsis_usart_non_blocking_driver_state_t usart8_NonBlockingDriverState = {
  1968. #endif
  1969. &usart8_Resource, &USART8_Handle,
  1970. };
  1971. static int32_t USART8_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  1972. {
  1973. USART8_InitPins();
  1974. return USART_NonBlockingInitialize(cb_event, &usart8_NonBlockingDriverState);
  1975. }
  1976. static int32_t USART8_NonBlockingUninitialize(void)
  1977. {
  1978. USART8_DeinitPins();
  1979. return USART_NonBlockingUninitialize(&usart8_NonBlockingDriverState);
  1980. }
  1981. static int32_t USART8_NonBlockingPowerControl(ARM_POWER_STATE state)
  1982. {
  1983. uint32_t result;
  1984. result = USART_NonBlockingPowerControl(state, &usart8_NonBlockingDriverState);
  1985. #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
  1986. if ((state == ARM_POWER_FULL) && (usart8_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  1987. {
  1988. USART_TransferStartRingBuffer(usart8_NonBlockingDriverState.resource->base,
  1989. usart8_NonBlockingDriverState.handle, usart8_rxRingBuffer, USART_RX_BUFFER_LEN);
  1990. }
  1991. #endif
  1992. return result;
  1993. }
  1994. static int32_t USART8_NonBlockingSend(const void *data, uint32_t num)
  1995. {
  1996. return USART_NonBlockingSend(data, num, &usart8_NonBlockingDriverState);
  1997. }
  1998. static int32_t USART8_NonBlockingReceive(void *data, uint32_t num)
  1999. {
  2000. return USART_NonBlockingReceive(data, num, &usart8_NonBlockingDriverState);
  2001. }
  2002. static int32_t USART8_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  2003. {
  2004. return USART_NonBlockingTransfer(data_out, data_in, num, &usart8_NonBlockingDriverState);
  2005. }
  2006. static uint32_t USART8_NonBlockingGetTxCount(void)
  2007. {
  2008. return USART_NonBlockingGetTxCount(&usart8_NonBlockingDriverState);
  2009. }
  2010. static uint32_t USART8_NonBlockingGetRxCount(void)
  2011. {
  2012. return USART_NonBlockingGetRxCount(&usart8_NonBlockingDriverState);
  2013. }
  2014. static int32_t USART8_NonBlockingControl(uint32_t control, uint32_t arg)
  2015. {
  2016. int32_t result;
  2017. result = USART_NonBlockingControl(control, arg, &usart8_NonBlockingDriverState);
  2018. if (ARM_DRIVER_OK != result)
  2019. {
  2020. return result;
  2021. }
  2022. #if defined(USART8_RX_BUFFER_ENABLE) && (USART8_RX_BUFFER_ENABLE == 1)
  2023. /* Start receiving interrupts */
  2024. usart8_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  2025. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  2026. #endif
  2027. return ARM_DRIVER_OK;
  2028. }
  2029. static ARM_USART_STATUS USART8_NonBlockingGetStatus(void)
  2030. {
  2031. return USART_NonBlockingGetStatus(&usart8_NonBlockingDriverState);
  2032. }
  2033. #endif
  2034. /* usart8 Driver Control Block */
  2035. ARM_DRIVER_USART Driver_USART8 = {
  2036. USARTx_GetVersion, USARTx_GetCapabilities,
  2037. #if RTE_USART8_DMA_EN
  2038. USART8_DmaInitialize, USART8_DmaUninitialize, USART8_DmaPowerControl, USART8_DmaSend, USART8_DmaReceive,
  2039. USART8_DmaTransfer, USART8_DmaGetTxCount, USART8_DmaGetRxCount, USART8_DmaControl, USART8_DmaGetStatus,
  2040. #else
  2041. USART8_NonBlockingInitialize,
  2042. USART8_NonBlockingUninitialize,
  2043. USART8_NonBlockingPowerControl,
  2044. USART8_NonBlockingSend,
  2045. USART8_NonBlockingReceive,
  2046. USART8_NonBlockingTransfer,
  2047. USART8_NonBlockingGetTxCount,
  2048. USART8_NonBlockingGetRxCount,
  2049. USART8_NonBlockingControl,
  2050. USART8_NonBlockingGetStatus,
  2051. #endif
  2052. USARTx_SetModemControl, USARTx_GetModemStatus};
  2053. #endif /* usart8 */
  2054. #if defined(USART9) && RTE_USART9
  2055. /* User needs to provide the implementation for USART9_GetFreq/InitPins/DeinitPins
  2056. in the application for enabling according instance. */
  2057. extern uint32_t USART9_GetFreq(void);
  2058. extern void USART9_InitPins(void);
  2059. extern void USART9_DeinitPins(void);
  2060. cmsis_usart_resource_t usart9_Resource = {USART9, USART9_GetFreq};
  2061. #if RTE_USART9_DMA_EN
  2062. #if (defined(FSL_FEATURE_SOC_DMA_COUNT) && FSL_FEATURE_SOC_DMA_COUNT)
  2063. cmsis_usart_dma_resource_t usart9_DmaResource = {
  2064. RTE_USART9_DMA_TX_DMA_BASE, RTE_USART9_DMA_TX_CH, RTE_USART9_DMA_RX_DMA_BASE, RTE_USART9_DMA_RX_CH,
  2065. };
  2066. usart_dma_handle_t USART9_DmaHandle;
  2067. dma_handle_t USART9_DmaRxHandle;
  2068. dma_handle_t USART9_DmaTxHandle;
  2069. #if defined(__CC_ARM)
  2070. ARMCC_SECTION("usart9_dma_driver_state")
  2071. cmsis_usart_dma_driver_state_t usart9_DmaDriverState = {
  2072. #else
  2073. cmsis_usart_dma_driver_state_t usart9_DmaDriverState = {
  2074. #endif
  2075. &usart9_Resource, &usart9_DmaResource, &USART9_DmaHandle, &USART9_DmaRxHandle, &USART9_DmaTxHandle,
  2076. };
  2077. static int32_t USART9_DmaInitialize(ARM_USART_SignalEvent_t cb_event)
  2078. {
  2079. USART9_InitPins();
  2080. return USART_DmaInitialize(cb_event, &usart9_DmaDriverState);
  2081. }
  2082. static int32_t USART9_DmaUninitialize(void)
  2083. {
  2084. USART9_DeinitPins();
  2085. return USART_DmaUninitialize(&usart9_DmaDriverState);
  2086. }
  2087. static int32_t USART9_DmaPowerControl(ARM_POWER_STATE state)
  2088. {
  2089. return USART_DmaPowerControl(state, &usart9_DmaDriverState);
  2090. }
  2091. static int32_t USART9_DmaSend(const void *data, uint32_t num)
  2092. {
  2093. return USART_DmaSend(data, num, &usart9_DmaDriverState);
  2094. }
  2095. static int32_t USART9_DmaReceive(void *data, uint32_t num)
  2096. {
  2097. return USART_DmaReceive(data, num, &usart9_DmaDriverState);
  2098. }
  2099. static int32_t USART9_DmaTransfer(const void *data_out, void *data_in, uint32_t num)
  2100. {
  2101. return USART_DmaTransfer(data_out, data_in, num, &usart9_DmaDriverState);
  2102. }
  2103. static uint32_t USART9_DmaGetTxCount(void)
  2104. {
  2105. return USART_DmaGetTxCount(&usart9_DmaDriverState);
  2106. }
  2107. static uint32_t USART9_DmaGetRxCount(void)
  2108. {
  2109. return USART_DmaGetRxCount(&usart9_DmaDriverState);
  2110. }
  2111. static int32_t USART9_DmaControl(uint32_t control, uint32_t arg)
  2112. {
  2113. return USART_DmaControl(control, arg, &usart9_DmaDriverState);
  2114. }
  2115. static ARM_USART_STATUS USART9_DmaGetStatus(void)
  2116. {
  2117. return USART_DmaGetStatus(&usart9_DmaDriverState);
  2118. }
  2119. #endif
  2120. #else
  2121. usart_handle_t USART9_Handle;
  2122. #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
  2123. static uint8_t usart9_rxRingBuffer[USART_RX_BUFFER_LEN];
  2124. #endif
  2125. #if defined(__CC_ARM)
  2126. ARMCC_SECTION("usart9_non_blocking_driver_state")
  2127. cmsis_usart_non_blocking_driver_state_t usart9_NonBlockingDriverState = {
  2128. #else
  2129. cmsis_usart_non_blocking_driver_state_t usart9_NonBlockingDriverState = {
  2130. #endif
  2131. &usart9_Resource, &USART9_Handle,
  2132. };
  2133. static int32_t USART9_NonBlockingInitialize(ARM_USART_SignalEvent_t cb_event)
  2134. {
  2135. USART9_InitPins();
  2136. return USART_NonBlockingInitialize(cb_event, &usart9_NonBlockingDriverState);
  2137. }
  2138. static int32_t USART9_NonBlockingUninitialize(void)
  2139. {
  2140. USART9_DeinitPins();
  2141. return USART_NonBlockingUninitialize(&usart9_NonBlockingDriverState);
  2142. }
  2143. static int32_t USART9_NonBlockingPowerControl(ARM_POWER_STATE state)
  2144. {
  2145. uint32_t result;
  2146. result = USART_NonBlockingPowerControl(state, &usart9_NonBlockingDriverState);
  2147. #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
  2148. if ((state == ARM_POWER_FULL) && (usart9_NonBlockingDriverState.handle->rxRingBuffer == NULL))
  2149. {
  2150. USART_TransferStartRingBuffer(usart9_NonBlockingDriverState.resource->base,
  2151. usart9_NonBlockingDriverState.handle, usart9_rxRingBuffer, USART_RX_BUFFER_LEN);
  2152. }
  2153. #endif
  2154. return result;
  2155. }
  2156. static int32_t USART9_NonBlockingSend(const void *data, uint32_t num)
  2157. {
  2158. return USART_NonBlockingSend(data, num, &usart9_NonBlockingDriverState);
  2159. }
  2160. static int32_t USART9_NonBlockingReceive(void *data, uint32_t num)
  2161. {
  2162. return USART_NonBlockingReceive(data, num, &usart9_NonBlockingDriverState);
  2163. }
  2164. static int32_t USART9_NonBlockingTransfer(const void *data_out, void *data_in, uint32_t num)
  2165. {
  2166. return USART_NonBlockingTransfer(data_out, data_in, num, &usart9_NonBlockingDriverState);
  2167. }
  2168. static uint32_t USART9_NonBlockingGetTxCount(void)
  2169. {
  2170. return USART_NonBlockingGetTxCount(&usart9_NonBlockingDriverState);
  2171. }
  2172. static uint32_t USART9_NonBlockingGetRxCount(void)
  2173. {
  2174. return USART_NonBlockingGetRxCount(&usart9_NonBlockingDriverState);
  2175. }
  2176. static int32_t USART9_NonBlockingControl(uint32_t control, uint32_t arg)
  2177. {
  2178. int32_t result;
  2179. result = USART_NonBlockingControl(control, arg, &usart9_NonBlockingDriverState);
  2180. if (ARM_DRIVER_OK != result)
  2181. {
  2182. return result;
  2183. }
  2184. #if defined(USART9_RX_BUFFER_ENABLE) && (USART9_RX_BUFFER_ENABLE == 1)
  2185. /* Start receiving interrupts */
  2186. usart9_NonBlockingDriverState.resource->base->FIFOINTENSET |=
  2187. USART_FIFOINTENSET_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
  2188. #endif
  2189. return ARM_DRIVER_OK;
  2190. }
  2191. static ARM_USART_STATUS USART9_NonBlockingGetStatus(void)
  2192. {
  2193. return USART_NonBlockingGetStatus(&usart9_NonBlockingDriverState);
  2194. }
  2195. #endif
  2196. /* usart9 Driver Control Block */
  2197. ARM_DRIVER_USART Driver_USART9 = {
  2198. USARTx_GetVersion, USARTx_GetCapabilities,
  2199. #if RTE_USART9_DMA_EN
  2200. USART9_DmaInitialize, USART9_DmaUninitialize, USART9_DmaPowerControl, USART9_DmaSend, USART9_DmaReceive,
  2201. USART9_DmaTransfer, USART9_DmaGetTxCount, USART9_DmaGetRxCount, USART9_DmaControl, USART9_DmaGetStatus,
  2202. #else
  2203. USART9_NonBlockingInitialize,
  2204. USART9_NonBlockingUninitialize,
  2205. USART9_NonBlockingPowerControl,
  2206. USART9_NonBlockingSend,
  2207. USART9_NonBlockingReceive,
  2208. USART9_NonBlockingTransfer,
  2209. USART9_NonBlockingGetTxCount,
  2210. USART9_NonBlockingGetRxCount,
  2211. USART9_NonBlockingControl,
  2212. USART9_NonBlockingGetStatus,
  2213. #endif
  2214. USARTx_SetModemControl, USARTx_GetModemStatus};
  2215. #endif /* usart9 */