fsl_dmic_dma.c 6.8 KB

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  1. /*
  2. * The Clear BSD License
  3. * Copyright (c) 2016, Freescale Semiconductor, Inc.
  4. * Copyright 2016-2017 NXP
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without modification,
  8. * are permitted (subject to the limitations in the disclaimer below) provided
  9. * that the following conditions are met:
  10. *
  11. * o Redistributions of source code must retain the above copyright notice, this list
  12. * of conditions and the following disclaimer.
  13. *
  14. * o Redistributions in binary form must reproduce the above copyright notice, this
  15. * list of conditions and the following disclaimer in the documentation and/or
  16. * other materials provided with the distribution.
  17. *
  18. * o Neither the name of the copyright holder nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  27. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include "fsl_dmic_dma.h"
  35. #include "fsl_dmic.h"
  36. /*******************************************************************************
  37. * Definitions
  38. ******************************************************************************/
  39. /* Component ID definition, used by tools. */
  40. #ifndef FSL_COMPONENT_ID
  41. #define FSL_COMPONENT_ID "platform.drivers.dmic_dma"
  42. #endif
  43. #define DMIC_HANDLE_ARRAY_SIZE 1
  44. /*<! Structure definition for dmic_dma_handle_t. The structure is private. */
  45. typedef struct _dmic_dma_private_handle
  46. {
  47. DMIC_Type *base;
  48. dmic_dma_handle_t *handle;
  49. } dmic_dma_private_handle_t;
  50. /*! @brief DMIC transfer state, which is used for DMIC transactiaonl APIs' internal state. */
  51. enum _dmic_dma_states_t
  52. {
  53. kDMIC_Idle = 0x0, /*!< DMIC is idle state */
  54. kDMIC_Busy /*!< DMIC is busy tranferring data. */
  55. };
  56. /*******************************************************************************
  57. * Prototypes
  58. ******************************************************************************/
  59. /*******************************************************************************
  60. * Variables
  61. ******************************************************************************/
  62. /*<! Private handle only used for internally. */
  63. static dmic_dma_private_handle_t s_dmaPrivateHandle[DMIC_HANDLE_ARRAY_SIZE];
  64. /*******************************************************************************
  65. * Code
  66. ********************************************************************************/
  67. static void DMIC_TransferReceiveDMACallback(dma_handle_t *handle, void *param, bool transferDone, uint32_t intmode)
  68. {
  69. assert(handle);
  70. assert(param);
  71. dmic_dma_private_handle_t *dmicPrivateHandle = (dmic_dma_private_handle_t *)param;
  72. dmicPrivateHandle->handle->state = kDMIC_Idle;
  73. if (dmicPrivateHandle->handle->callback)
  74. {
  75. dmicPrivateHandle->handle->callback(dmicPrivateHandle->base, dmicPrivateHandle->handle, kStatus_DMIC_Idle,
  76. dmicPrivateHandle->handle->userData);
  77. }
  78. }
  79. status_t DMIC_TransferCreateHandleDMA(DMIC_Type *base,
  80. dmic_dma_handle_t *handle,
  81. dmic_dma_transfer_callback_t callback,
  82. void *userData,
  83. dma_handle_t *rxDmaHandle)
  84. {
  85. int32_t instance = 0;
  86. /* check 'base' */
  87. assert(!(NULL == base));
  88. if (NULL == base)
  89. {
  90. return kStatus_InvalidArgument;
  91. }
  92. /* check 'handle' */
  93. assert(!(NULL == handle));
  94. if (NULL == handle)
  95. {
  96. return kStatus_InvalidArgument;
  97. }
  98. /* check DMIC instance by 'base'*/
  99. instance = DMIC_GetInstance(base);
  100. assert(!(instance < 0));
  101. if (instance < 0)
  102. {
  103. return kStatus_InvalidArgument;
  104. }
  105. memset(handle, 0, sizeof(*handle));
  106. /* assign 'base' and 'handle' */
  107. s_dmaPrivateHandle[instance].base = base;
  108. s_dmaPrivateHandle[instance].handle = handle;
  109. handle->callback = callback;
  110. handle->userData = userData;
  111. handle->rxDmaHandle = rxDmaHandle;
  112. /* Set DMIC state to idle */
  113. handle->state = kDMIC_Idle;
  114. /* Configure RX. */
  115. if (rxDmaHandle)
  116. {
  117. DMA_SetCallback(rxDmaHandle, DMIC_TransferReceiveDMACallback, &s_dmaPrivateHandle[instance]);
  118. }
  119. return kStatus_Success;
  120. }
  121. status_t DMIC_TransferReceiveDMA(DMIC_Type *base,
  122. dmic_dma_handle_t *handle,
  123. dmic_transfer_t *xfer,
  124. uint32_t dmic_channel)
  125. {
  126. assert(handle);
  127. assert(handle->rxDmaHandle);
  128. assert(xfer);
  129. assert(xfer->data);
  130. assert(xfer->dataSize);
  131. dma_transfer_config_t xferConfig;
  132. status_t status;
  133. uint32_t srcAddr = (uint32_t)(&base->CHANNEL[dmic_channel].FIFO_DATA);
  134. /* Check if the device is busy. If previous RX not finished.*/
  135. if (handle->state == kDMIC_Busy)
  136. {
  137. status = kStatus_DMIC_Busy;
  138. }
  139. else
  140. {
  141. handle->state = kDMIC_Busy;
  142. handle->transferSize = xfer->dataSize;
  143. /* Prepare transfer. */
  144. DMA_PrepareTransfer(&xferConfig, (void *)srcAddr, xfer->data, sizeof(uint16_t),
  145. xfer->dataSize, kDMA_PeripheralToMemory, NULL);
  146. /* Submit transfer. */
  147. DMA_SubmitTransfer(handle->rxDmaHandle, &xferConfig);
  148. DMA_StartTransfer(handle->rxDmaHandle);
  149. status = kStatus_Success;
  150. }
  151. return status;
  152. }
  153. void DMIC_TransferAbortReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle)
  154. {
  155. assert(NULL != handle);
  156. assert(NULL != handle->rxDmaHandle);
  157. /* Stop transfer. */
  158. DMA_AbortTransfer(handle->rxDmaHandle);
  159. handle->state = kDMIC_Idle;
  160. }
  161. status_t DMIC_TransferGetReceiveCountDMA(DMIC_Type *base, dmic_dma_handle_t *handle, uint32_t *count)
  162. {
  163. assert(handle);
  164. assert(handle->rxDmaHandle);
  165. assert(count);
  166. if (kDMIC_Idle == handle->state)
  167. {
  168. return kStatus_NoTransferInProgress;
  169. }
  170. *count = handle->transferSize - DMA_GetRemainingBytes(handle->rxDmaHandle->base, handle->rxDmaHandle->channel);
  171. return kStatus_Success;
  172. }