drv_hwtimer.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525
  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. */
  10. #include <board.h>
  11. #ifdef BSP_USING_TIM
  12. #include "drv_config.h"
  13. //#define DRV_DEBUG
  14. #define LOG_TAG "drv.hwtimer"
  15. #include <drv_log.h>
  16. #ifdef RT_USING_HWTIMER
  17. enum
  18. {
  19. #ifdef BSP_USING_TIM1
  20. TIM1_INDEX,
  21. #endif
  22. #ifdef BSP_USING_TIM2
  23. TIM2_INDEX,
  24. #endif
  25. #ifdef BSP_USING_TIM3
  26. TIM3_INDEX,
  27. #endif
  28. #ifdef BSP_USING_TIM4
  29. TIM4_INDEX,
  30. #endif
  31. #ifdef BSP_USING_TIM5
  32. TIM5_INDEX,
  33. #endif
  34. #ifdef BSP_USING_TIM6
  35. TIM6_INDEX,
  36. #endif
  37. #ifdef BSP_USING_TIM7
  38. TIM7_INDEX,
  39. #endif
  40. #ifdef BSP_USING_TIM8
  41. TIM8_INDEX,
  42. #endif
  43. #ifdef BSP_USING_TIM9
  44. TIM9_INDEX,
  45. #endif
  46. #ifdef BSP_USING_TIM10
  47. TIM10_INDEX,
  48. #endif
  49. #ifdef BSP_USING_TIM11
  50. TIM11_INDEX,
  51. #endif
  52. #ifdef BSP_USING_TIM12
  53. TIM12_INDEX,
  54. #endif
  55. #ifdef BSP_USING_TIM13
  56. TIM13_INDEX,
  57. #endif
  58. #ifdef BSP_USING_TIM14
  59. TIM14_INDEX,
  60. #endif
  61. #ifdef BSP_USING_TIM15
  62. TIM15_INDEX,
  63. #endif
  64. #ifdef BSP_USING_TIM16
  65. TIM16_INDEX,
  66. #endif
  67. #ifdef BSP_USING_TIM17
  68. TIM17_INDEX,
  69. #endif
  70. };
  71. struct stm32_hwtimer
  72. {
  73. rt_hwtimer_t time_device;
  74. TIM_HandleTypeDef tim_handle;
  75. IRQn_Type tim_irqn;
  76. char *name;
  77. };
  78. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  79. {
  80. #ifdef BSP_USING_TIM1
  81. TIM1_CONFIG,
  82. #endif
  83. #ifdef BSP_USING_TIM2
  84. TIM2_CONFIG,
  85. #endif
  86. #ifdef BSP_USING_TIM3
  87. TIM3_CONFIG,
  88. #endif
  89. #ifdef BSP_USING_TIM4
  90. TIM4_CONFIG,
  91. #endif
  92. #ifdef BSP_USING_TIM5
  93. TIM5_CONFIG,
  94. #endif
  95. #ifdef BSP_USING_TIM6
  96. TIM6_CONFIG,
  97. #endif
  98. #ifdef BSP_USING_TIM7
  99. TIM7_CONFIG,
  100. #endif
  101. #ifdef BSP_USING_TIM8
  102. TIM8_CONFIG,
  103. #endif
  104. #ifdef BSP_USING_TIM9
  105. TIM9_CONFIG,
  106. #endif
  107. #ifdef BSP_USING_TIM10
  108. TIM10_CONFIG,
  109. #endif
  110. #ifdef BSP_USING_TIM11
  111. TIM11_CONFIG,
  112. #endif
  113. #ifdef BSP_USING_TIM12
  114. TIM12_CONFIG,
  115. #endif
  116. #ifdef BSP_USING_TIM13
  117. TIM13_CONFIG,
  118. #endif
  119. #ifdef BSP_USING_TIM14
  120. TIM14_CONFIG,
  121. #endif
  122. #ifdef BSP_USING_TIM15
  123. TIM15_CONFIG,
  124. #endif
  125. #ifdef BSP_USING_TIM16
  126. TIM16_CONFIG,
  127. #endif
  128. #ifdef BSP_USING_TIM17
  129. TIM17_CONFIG,
  130. #endif
  131. };
  132. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  133. {
  134. uint32_t prescaler_value = 0;
  135. TIM_HandleTypeDef *tim = RT_NULL;
  136. struct stm32_hwtimer *tim_device = RT_NULL;
  137. RT_ASSERT(timer != RT_NULL);
  138. if (state)
  139. {
  140. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  141. tim_device = (struct stm32_hwtimer *)timer;
  142. /* time init */
  143. #if defined(SOC_SERIES_STM32F4)
  144. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  145. #elif defined(SOC_SERIES_STM32L4)
  146. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  147. #elif defined(SOC_SERIES_STM32F1)
  148. if (0)
  149. #endif
  150. {
  151. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1;
  152. }
  153. else
  154. {
  155. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * 2 / 10000) - 1;
  156. }
  157. tim->Init.Period = 10000 - 1;
  158. tim->Init.Prescaler = prescaler_value;
  159. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  160. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  161. {
  162. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  163. }
  164. else
  165. {
  166. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  167. }
  168. tim->Init.RepetitionCounter = 0;
  169. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
  170. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  171. #endif
  172. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  173. {
  174. LOG_E("%s init failed", tim_device->name);
  175. return;
  176. }
  177. else
  178. {
  179. /* set the TIMx priority */
  180. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  181. /* enable the TIMx global Interrupt */
  182. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  183. /* clear update flag */
  184. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  185. /* enable update request source */
  186. __HAL_TIM_URS_ENABLE(tim);
  187. LOG_D("%s init success", tim_device->name);
  188. }
  189. }
  190. }
  191. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  192. {
  193. rt_err_t result = RT_EOK;
  194. TIM_HandleTypeDef *tim = RT_NULL;
  195. RT_ASSERT(timer != RT_NULL);
  196. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  197. /* set tim cnt */
  198. __HAL_TIM_SET_AUTORELOAD(tim, t);
  199. if (opmode == HWTIMER_MODE_ONESHOT)
  200. {
  201. /* set timer to single mode */
  202. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  203. }
  204. /* start timer */
  205. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  206. {
  207. LOG_E("TIM2 start failed");
  208. result = -RT_ERROR;
  209. }
  210. return result;
  211. }
  212. static void timer_stop(rt_hwtimer_t *timer)
  213. {
  214. TIM_HandleTypeDef *tim = RT_NULL;
  215. RT_ASSERT(timer != RT_NULL);
  216. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  217. /* stop timer */
  218. HAL_TIM_Base_Stop_IT(tim);
  219. }
  220. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  221. {
  222. TIM_HandleTypeDef *tim = RT_NULL;
  223. rt_err_t result = RT_EOK;
  224. RT_ASSERT(timer != RT_NULL);
  225. RT_ASSERT(arg != RT_NULL);
  226. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  227. switch (cmd)
  228. {
  229. case HWTIMER_CTRL_FREQ_SET:
  230. {
  231. rt_uint32_t freq;
  232. rt_uint16_t val;
  233. /* set timer frequence */
  234. freq = *((rt_uint32_t *)arg);
  235. #if defined(SOC_SERIES_STM32F4)
  236. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  237. #elif defined(SOC_SERIES_STM32L4)
  238. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  239. #elif defined(SOC_SERIES_STM32F1)
  240. if (0)
  241. #endif
  242. {
  243. #if defined(SOC_SERIES_STM32L4)
  244. val = HAL_RCC_GetPCLK2Freq() / freq;
  245. #else
  246. val = HAL_RCC_GetPCLK2Freq() * 2 / freq;
  247. #endif
  248. }
  249. else
  250. {
  251. val = HAL_RCC_GetPCLK1Freq() * 2 / freq;
  252. }
  253. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  254. /* Update frequency value */
  255. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  256. }
  257. break;
  258. default:
  259. {
  260. result = -RT_ENOSYS;
  261. }
  262. break;
  263. }
  264. return result;
  265. }
  266. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  267. {
  268. TIM_HandleTypeDef *tim = RT_NULL;
  269. RT_ASSERT(timer != RT_NULL);
  270. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  271. return tim->Instance->CNT;
  272. }
  273. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  274. static const struct rt_hwtimer_ops _ops =
  275. {
  276. .init = timer_init,
  277. .start = timer_start,
  278. .stop = timer_stop,
  279. .count_get = timer_counter_get,
  280. .control = timer_ctrl,
  281. };
  282. #ifdef BSP_USING_TIM2
  283. void TIM2_IRQHandler(void)
  284. {
  285. /* enter interrupt */
  286. rt_interrupt_enter();
  287. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  288. /* leave interrupt */
  289. rt_interrupt_leave();
  290. }
  291. #endif
  292. #ifdef BSP_USING_TIM3
  293. void TIM3_IRQHandler(void)
  294. {
  295. /* enter interrupt */
  296. rt_interrupt_enter();
  297. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  298. /* leave interrupt */
  299. rt_interrupt_leave();
  300. }
  301. #endif
  302. #ifdef BSP_USING_TIM4
  303. void TIM4_IRQHandler(void)
  304. {
  305. /* enter interrupt */
  306. rt_interrupt_enter();
  307. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  308. /* leave interrupt */
  309. rt_interrupt_leave();
  310. }
  311. #endif
  312. #ifdef BSP_USING_TIM5
  313. void TIM5_IRQHandler(void)
  314. {
  315. /* enter interrupt */
  316. rt_interrupt_enter();
  317. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  318. /* leave interrupt */
  319. rt_interrupt_leave();
  320. }
  321. #endif
  322. #ifdef BSP_USING_TIM11
  323. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  324. {
  325. /* enter interrupt */
  326. rt_interrupt_enter();
  327. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  328. /* leave interrupt */
  329. rt_interrupt_leave();
  330. }
  331. #endif
  332. #ifdef BSP_USING_TIM13
  333. void TIM8_UP_TIM13_IRQHandler(void)
  334. {
  335. /* enter interrupt */
  336. rt_interrupt_enter();
  337. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  338. /* leave interrupt */
  339. rt_interrupt_leave();
  340. }
  341. #endif
  342. #ifdef BSP_USING_TIM14
  343. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  344. {
  345. /* enter interrupt */
  346. rt_interrupt_enter();
  347. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  348. /* leave interrupt */
  349. rt_interrupt_leave();
  350. }
  351. #endif
  352. #ifdef BSP_USING_TIM15
  353. void TIM1_BRK_TIM15_IRQHandler(void)
  354. {
  355. /* enter interrupt */
  356. rt_interrupt_enter();
  357. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  358. /* leave interrupt */
  359. rt_interrupt_leave();
  360. }
  361. #endif
  362. #ifdef BSP_USING_TIM16
  363. void TIM1_UP_TIM16_IRQHandler(void)
  364. {
  365. /* enter interrupt */
  366. rt_interrupt_enter();
  367. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  368. /* leave interrupt */
  369. rt_interrupt_leave();
  370. }
  371. #endif
  372. #ifdef BSP_USING_TIM17
  373. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  374. {
  375. /* enter interrupt */
  376. rt_interrupt_enter();
  377. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  378. /* leave interrupt */
  379. rt_interrupt_leave();
  380. }
  381. #endif
  382. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  383. {
  384. #ifdef BSP_USING_TIM2
  385. if (htim->Instance == TIM2)
  386. {
  387. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  388. }
  389. #endif
  390. #ifdef BSP_USING_TIM3
  391. if (htim->Instance == TIM3)
  392. {
  393. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  394. }
  395. #endif
  396. #ifdef BSP_USING_TIM4
  397. if (htim->Instance == TIM4)
  398. {
  399. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  400. }
  401. #endif
  402. #ifdef BSP_USING_TIM5
  403. if (htim->Instance == TIM5)
  404. {
  405. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  406. }
  407. #endif
  408. #ifdef BSP_USING_TIM11
  409. if (htim->Instance == TIM11)
  410. {
  411. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  412. }
  413. #endif
  414. #ifdef BSP_USING_TIM13
  415. if (htim->Instance == TIM13)
  416. {
  417. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  418. }
  419. #endif
  420. #ifdef BSP_USING_TIM14
  421. if (htim->Instance == TIM14)
  422. {
  423. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  424. }
  425. #endif
  426. #ifdef BSP_USING_TIM15
  427. if (htim->Instance == TIM15)
  428. {
  429. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  430. }
  431. #endif
  432. #ifdef BSP_USING_TIM16
  433. if (htim->Instance == TIM16)
  434. {
  435. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  436. }
  437. #endif
  438. #ifdef BSP_USING_TIM17
  439. if (htim->Instance == TIM17)
  440. {
  441. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  442. }
  443. #endif
  444. }
  445. static int stm32_hwtimer_init(void)
  446. {
  447. int i = 0;
  448. int result = RT_EOK;
  449. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  450. {
  451. stm32_hwtimer_obj[i].time_device.info = &_info;
  452. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  453. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  454. {
  455. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  456. }
  457. else
  458. {
  459. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  460. result = -RT_ERROR;
  461. }
  462. }
  463. return result;
  464. }
  465. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  466. #endif /* RT_USING_HWTIMER */
  467. #endif /* BSP_USING_TIM */