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drv_usart.c 19 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift change to new framework
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5)
  18. #error "Please define at least one BSP_USING_UARTx"
  19. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  20. #endif
  21. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
  22. #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG
  23. #elif defined(SOC_SERIES_STM32F7)
  24. #define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT
  25. #endif
  26. #ifdef BSP_UART_USING_DMA_RX
  27. static void stm32_dma_config(struct rt_serial_device *serial);
  28. #endif
  29. enum
  30. {
  31. #ifdef BSP_USING_UART1
  32. UART1_INDEX,
  33. #endif
  34. #ifdef BSP_USING_UART2
  35. UART2_INDEX,
  36. #endif
  37. #ifdef BSP_USING_UART3
  38. UART3_INDEX,
  39. #endif
  40. #ifdef BSP_USING_UART4
  41. UART4_INDEX,
  42. #endif
  43. #ifdef BSP_USING_UART5
  44. UART5_INDEX,
  45. #endif
  46. };
  47. static const struct stm32_uart_config uart_config[] =
  48. {
  49. #ifdef BSP_USING_UART1
  50. UART1_CONFIG,
  51. #endif
  52. #ifdef BSP_USING_UART2
  53. UART2_CONFIG,
  54. #endif
  55. #ifdef BSP_USING_UART3
  56. UART3_CONFIG,
  57. #endif
  58. #ifdef BSP_USING_UART4
  59. UART4_CONFIG,
  60. #endif
  61. #ifdef BSP_USING_UART5
  62. UART5_CONFIG,
  63. #endif
  64. };
  65. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])];
  66. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  67. {
  68. struct stm32_uart *uart;
  69. RT_ASSERT(serial != RT_NULL);
  70. RT_ASSERT(cfg != RT_NULL);
  71. uart = (struct stm32_uart *)serial->parent.user_data;
  72. RT_ASSERT(uart != RT_NULL);
  73. uart->handle.Instance = uart->config->Instance;
  74. uart->handle.Init.BaudRate = cfg->baud_rate;
  75. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  76. uart->handle.Init.Mode = UART_MODE_TX_RX;
  77. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  78. switch (cfg->data_bits)
  79. {
  80. case DATA_BITS_8:
  81. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  82. break;
  83. case DATA_BITS_9:
  84. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  85. break;
  86. default:
  87. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  88. break;
  89. }
  90. switch (cfg->stop_bits)
  91. {
  92. case STOP_BITS_1:
  93. uart->handle.Init.StopBits = UART_STOPBITS_1;
  94. break;
  95. case STOP_BITS_2:
  96. uart->handle.Init.StopBits = UART_STOPBITS_2;
  97. break;
  98. default:
  99. uart->handle.Init.StopBits = UART_STOPBITS_1;
  100. break;
  101. }
  102. switch (cfg->parity)
  103. {
  104. case PARITY_NONE:
  105. uart->handle.Init.Parity = UART_PARITY_NONE;
  106. break;
  107. case PARITY_ODD:
  108. uart->handle.Init.Parity = UART_PARITY_ODD;
  109. break;
  110. case PARITY_EVEN:
  111. uart->handle.Init.Parity = UART_PARITY_EVEN;
  112. break;
  113. default:
  114. uart->handle.Init.Parity = UART_PARITY_NONE;
  115. break;
  116. }
  117. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  118. {
  119. return -RT_ERROR;
  120. }
  121. return RT_EOK;
  122. }
  123. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  124. {
  125. struct stm32_uart *uart;
  126. #ifdef BSP_UART_USING_DMA_RX
  127. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  128. #endif
  129. RT_ASSERT(serial != RT_NULL);
  130. uart = (struct stm32_uart *)serial->parent.user_data;
  131. RT_ASSERT(uart != RT_NULL);
  132. switch (cmd)
  133. {
  134. /* disable interrupt */
  135. case RT_DEVICE_CTRL_CLR_INT:
  136. /* disable rx irq */
  137. NVIC_DisableIRQ(uart->config->irq_type);
  138. /* disable interrupt */
  139. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  140. break;
  141. /* enable interrupt */
  142. case RT_DEVICE_CTRL_SET_INT:
  143. /* enable rx irq */
  144. NVIC_EnableIRQ(uart->config->irq_type);
  145. /* enable interrupt */
  146. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  147. break;
  148. #ifdef BSP_UART_USING_DMA_RX
  149. case RT_DEVICE_CTRL_CONFIG:
  150. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  151. {
  152. stm32_dma_config(serial);
  153. }
  154. break;
  155. #endif
  156. }
  157. return RT_EOK;
  158. }
  159. static int stm32_putc(struct rt_serial_device *serial, char c)
  160. {
  161. struct stm32_uart *uart;
  162. RT_ASSERT(serial != RT_NULL);
  163. uart = (struct stm32_uart *)serial->parent.user_data;
  164. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  165. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
  166. uart->handle.Instance->TDR = c;
  167. #else
  168. uart->handle.Instance->DR = c;
  169. #endif
  170. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  171. return 1;
  172. }
  173. static int stm32_getc(struct rt_serial_device *serial)
  174. {
  175. int ch;
  176. struct stm32_uart *uart;
  177. RT_ASSERT(serial != RT_NULL);
  178. uart = (struct stm32_uart *)serial->parent.user_data;
  179. RT_ASSERT(uart != RT_NULL);
  180. ch = -1;
  181. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  182. {
  183. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
  184. ch = uart->handle.Instance->RDR & 0xff;
  185. #else
  186. ch = uart->handle.Instance->DR & 0xff;
  187. #endif
  188. }
  189. return ch;
  190. }
  191. static const struct rt_uart_ops stm32_uart_ops =
  192. {
  193. .configure = stm32_configure,
  194. .control = stm32_control,
  195. .putc = stm32_putc,
  196. .getc = stm32_getc,
  197. };
  198. /**
  199. * Uart common interrupt process. This need add to uart ISR.
  200. *
  201. * @param serial serial device
  202. */
  203. static void uart_isr(struct rt_serial_device *serial)
  204. {
  205. struct stm32_uart *uart;
  206. #ifdef BSP_UART_USING_DMA_RX
  207. rt_size_t recv_total_index, recv_len;
  208. rt_base_t level;
  209. #endif
  210. RT_ASSERT(serial != RT_NULL);
  211. uart = (struct stm32_uart *) serial->parent.user_data;
  212. RT_ASSERT(uart != RT_NULL);
  213. /* UART in mode Receiver -------------------------------------------------*/
  214. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  215. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  216. {
  217. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  218. /* Clear RXNE interrupt flag */
  219. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  220. }
  221. #ifdef BSP_UART_USING_DMA_RX
  222. else if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&
  223. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  224. {
  225. level = rt_hw_interrupt_disable();
  226. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
  227. recv_len = recv_total_index - uart->dma.last_index;
  228. uart->dma.last_index = recv_total_index;
  229. rt_hw_interrupt_enable(level);
  230. if (recv_len)
  231. {
  232. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  233. }
  234. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_IDLE);
  235. rt_uint32_t ch;
  236. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
  237. ch = uart->handle.Instance->RDR;
  238. #else
  239. ch = uart->handle.Instance->DR;
  240. #endif
  241. ch = ch;
  242. }
  243. #endif
  244. else
  245. {
  246. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  247. {
  248. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ORE);
  249. }
  250. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  251. {
  252. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_NE);
  253. }
  254. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  255. {
  256. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_FE);
  257. }
  258. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  259. {
  260. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_PE);
  261. }
  262. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  263. {
  264. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  265. }
  266. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4)
  267. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  268. {
  269. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  270. }
  271. #elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  272. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBDF) != RESET)
  273. {
  274. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBDF);
  275. }
  276. #endif
  277. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  278. {
  279. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  280. }
  281. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  282. {
  283. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  284. }
  285. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  286. {
  287. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  288. }
  289. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  290. {
  291. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_IDLE);
  292. }
  293. #if defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  294. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TEACK) != RESET)
  295. {
  296. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TEACK);
  297. }
  298. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_SBKF) != RESET)
  299. {
  300. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_SBKF);
  301. }
  302. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CMF) != RESET)
  303. {
  304. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CMF);
  305. }
  306. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_BUSY) != RESET)
  307. {
  308. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_BUSY);
  309. }
  310. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ABRF) != RESET)
  311. {
  312. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ABRF);
  313. }
  314. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ABRE) != RESET)
  315. {
  316. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_ABRE);
  317. }
  318. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTSIF) != RESET)
  319. {
  320. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTSIF);
  321. }
  322. #endif
  323. }
  324. }
  325. #if defined(BSP_USING_UART1)
  326. void USART1_IRQHandler(void)
  327. {
  328. /* enter interrupt */
  329. rt_interrupt_enter();
  330. uart_isr(&(uart_obj[UART1_INDEX].serial));
  331. /* leave interrupt */
  332. rt_interrupt_leave();
  333. }
  334. #if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR)
  335. void USART1_RX_DMA_ISR(void)
  336. {
  337. /* enter interrupt */
  338. rt_interrupt_enter();
  339. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
  340. /* leave interrupt */
  341. rt_interrupt_leave();
  342. }
  343. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR) */
  344. #endif /* BSP_USING_UART1 */
  345. #if defined(BSP_USING_UART2)
  346. void USART2_IRQHandler(void)
  347. {
  348. /* enter interrupt */
  349. rt_interrupt_enter();
  350. uart_isr(&(uart_obj[UART2_INDEX].serial));
  351. /* leave interrupt */
  352. rt_interrupt_leave();
  353. }
  354. #if defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR)
  355. void USART2_RX_DMA_ISR(void)
  356. {
  357. /* enter interrupt */
  358. rt_interrupt_enter();
  359. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
  360. /* leave interrupt */
  361. rt_interrupt_leave();
  362. }
  363. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART2_RX_DMA_ISR) */
  364. #endif /* BSP_USING_UART2 */
  365. #if defined(BSP_USING_UART3)
  366. void USART3_IRQHandler(void)
  367. {
  368. /* enter interrupt */
  369. rt_interrupt_enter();
  370. uart_isr(&(uart_obj[UART3_INDEX].serial));
  371. /* leave interrupt */
  372. rt_interrupt_leave();
  373. }
  374. #if defined(BSP_UART_USING_DMA_RX) && defined(USART3_RX_DMA_ISR)
  375. void USART3_RX_DMA_ISR(void)
  376. {
  377. /* enter interrupt */
  378. rt_interrupt_enter();
  379. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
  380. /* leave interrupt */
  381. rt_interrupt_leave();
  382. }
  383. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART3_RX_DMA_ISR) */
  384. #endif /* BSP_USING_UART3*/
  385. #if defined(BSP_USING_UART4)
  386. void UART4_IRQHandler(void)
  387. {
  388. /* enter interrupt */
  389. rt_interrupt_enter();
  390. uart_isr(&(uart_obj[UART4_INDEX].serial));
  391. /* leave interrupt */
  392. rt_interrupt_leave();
  393. }
  394. #if defined(BSP_UART_USING_DMA_RX) && defined(USART1_RX_DMA_ISR)
  395. void USART4_RX_DMA_ISR(void)
  396. {
  397. /* enter interrupt */
  398. rt_interrupt_enter();
  399. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);
  400. /* leave interrupt */
  401. rt_interrupt_leave();
  402. }
  403. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART4_RX_DMA_ISR) */
  404. #endif /* BSP_USING_UART4*/
  405. #if defined(BSP_USING_UART5)
  406. void UART5_IRQHandler(void)
  407. {
  408. /* enter interrupt */
  409. rt_interrupt_enter();
  410. uart_isr(&(uart_obj[UART5_INDEX].serial));
  411. /* leave interrupt */
  412. rt_interrupt_leave();
  413. }
  414. #if defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR)
  415. void USART5_RX_DMA_ISR(void)
  416. {
  417. /* enter interrupt */
  418. rt_interrupt_enter();
  419. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
  420. /* leave interrupt */
  421. rt_interrupt_leave();
  422. }
  423. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(USART5_RX_DMA_ISR) */
  424. #endif /* BSP_USING_UART5*/
  425. #ifdef BSP_UART_USING_DMA_RX
  426. static void stm32_dma_config(struct rt_serial_device *serial)
  427. {
  428. RT_ASSERT(serial != RT_NULL);
  429. struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
  430. RT_ASSERT(uart != RT_NULL);
  431. struct rt_serial_rx_fifo *rx_fifo;
  432. LOG_D("%s dma config start", uart->config->name);
  433. {
  434. rt_uint32_t tmpreg= 0x00U;
  435. #if defined(SOC_SERIES_STM32F1)
  436. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  437. SET_BIT(RCC->AHBENR, uart->config->dma_rcc);
  438. tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rcc);
  439. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  440. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  441. SET_BIT(RCC->AHB1ENR, uart->config->dma_rcc);
  442. tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rcc);
  443. #endif
  444. UNUSED(tmpreg); /* To avoid compiler warnings */
  445. }
  446. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
  447. #if defined(SOC_SERIES_STM32F1)
  448. uart->dma.handle.Instance = uart->config->dma.Instance;
  449. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  450. uart->dma.handle.Instance = uart->config->dma.Instance;
  451. uart->dma.handle.Init.Channel = uart->config->dma.stream_channel.channel;
  452. #elif defined(SOC_SERIES_STM32L4)
  453. uart->dma.handle.Instance = uart->config->dma.Instance;
  454. uart->dma.handle.Init.Request = uart->config->dma.channel_request.request;
  455. #endif
  456. uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
  457. uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE;
  458. uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE;
  459. uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  460. uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  461. uart->dma.handle.Init.Mode = DMA_CIRCULAR;
  462. uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM;
  463. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  464. uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  465. #endif
  466. if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
  467. {
  468. RT_ASSERT(0);
  469. }
  470. if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK)
  471. {
  472. RT_ASSERT(0);
  473. }
  474. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  475. /* Start DMA transfer */
  476. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  477. {
  478. /* Transfer error in reception process */
  479. RT_ASSERT(0);
  480. }
  481. /* enable interrupt */
  482. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  483. /* enable rx irq */
  484. HAL_NVIC_SetPriority(uart->config->dma_irq, 1, 0);
  485. HAL_NVIC_EnableIRQ(uart->config->dma_irq);
  486. HAL_NVIC_SetPriority(uart->config->irq_type, 0, 0);
  487. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  488. LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
  489. LOG_D("%s dma config done", uart->config->name);
  490. }
  491. /**
  492. * @brief UART error callbacks
  493. * @param huart: UART handle
  494. * @note This example shows a simple way to report transfer error, and you can
  495. * add your own implementation.
  496. * @retval None
  497. */
  498. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  499. {
  500. RT_ASSERT(huart != NULL);
  501. struct stm32_uart *uart = (struct stm32_uart *)huart;
  502. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  503. UNUSED(uart);
  504. }
  505. /**
  506. * @brief Rx Transfer completed callback
  507. * @param huart: UART handle
  508. * @note This example shows a simple way to report end of DMA Rx transfer, and
  509. * you can add your own implementation.
  510. * @retval None
  511. */
  512. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  513. {
  514. struct rt_serial_device *serial;
  515. struct stm32_uart *uart;
  516. rt_size_t recv_len;
  517. rt_base_t level;
  518. RT_ASSERT(huart != NULL);
  519. uart = (struct stm32_uart *)huart;
  520. serial = &uart->serial;
  521. level = rt_hw_interrupt_disable();
  522. recv_len = serial->config.bufsz - uart->dma.last_index;
  523. uart->dma.last_index = 0;
  524. rt_hw_interrupt_enable(level);
  525. if (recv_len)
  526. {
  527. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  528. }
  529. }
  530. #endif /* BSP_UART_USING_DMA_RX */
  531. int rt_hw_usart_init(void)
  532. {
  533. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  534. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  535. rt_err_t result = 0;
  536. for (int i = 0; i < obj_num; i++)
  537. {
  538. uart_obj[i].config = &uart_config[i];
  539. uart_obj[i].serial.ops = &stm32_uart_ops;
  540. uart_obj[i].serial.config = config;
  541. /* Determines whether a serial instance supports DMA */
  542. if(uart_obj[i].config->dma.Instance != DMA_NOT_AVAILABLE)
  543. {
  544. /* register UART device */
  545. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  546. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  547. #if defined(BSP_UART_USING_DMA_RX)
  548. | RT_DEVICE_FLAG_DMA_RX
  549. #endif
  550. ,&uart_obj[i]);
  551. }
  552. else
  553. {
  554. /* register UART device */
  555. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  556. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  557. ,&uart_obj[i]);
  558. }
  559. RT_ASSERT(result == RT_EOK);
  560. }
  561. return result;
  562. }
  563. #endif /* RT_USING_SERIAL */