startup_gcc.S 2.0 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018/10/01 Bernard The first version
  9. */
  10. #define MSTATUS_FS 0x00006000U /* initial state of FPU */
  11. #include <cpuport.h>
  12. .global _start
  13. .section ".start", "ax"
  14. _start:
  15. j 1f
  16. .word 0xdeadbeef
  17. 1:
  18. csrw mideleg, 0
  19. csrw medeleg, 0
  20. csrw mie, 0
  21. csrw mip, 0
  22. la t0, trap_entry
  23. csrw mtvec, t0
  24. li x1, 0
  25. li x2, 0
  26. li x3, 0
  27. li x4, 0
  28. li x5, 0
  29. li x6, 0
  30. li x7, 0
  31. li x8, 0
  32. li x9, 0
  33. li x10,0
  34. li x11,0
  35. li x12,0
  36. li x13,0
  37. li x14,0
  38. li x15,0
  39. li x16,0
  40. li x17,0
  41. li x18,0
  42. li x19,0
  43. li x20,0
  44. li x21,0
  45. li x22,0
  46. li x23,0
  47. li x24,0
  48. li x25,0
  49. li x26,0
  50. li x27,0
  51. li x28,0
  52. li x29,0
  53. li x30,0
  54. li x31,0
  55. /* set to initial state of FPU and disable interrupt */
  56. li t0, MSTATUS_FS
  57. csrs mstatus, t0
  58. fssr x0
  59. fmv.d.x f0, x0
  60. fmv.d.x f1, x0
  61. fmv.d.x f2, x0
  62. fmv.d.x f3, x0
  63. fmv.d.x f4, x0
  64. fmv.d.x f5, x0
  65. fmv.d.x f6, x0
  66. fmv.d.x f7, x0
  67. fmv.d.x f8, x0
  68. fmv.d.x f9, x0
  69. fmv.d.x f10,x0
  70. fmv.d.x f11,x0
  71. fmv.d.x f12,x0
  72. fmv.d.x f13,x0
  73. fmv.d.x f14,x0
  74. fmv.d.x f15,x0
  75. fmv.d.x f16,x0
  76. fmv.d.x f17,x0
  77. fmv.d.x f18,x0
  78. fmv.d.x f19,x0
  79. fmv.d.x f20,x0
  80. fmv.d.x f21,x0
  81. fmv.d.x f22,x0
  82. fmv.d.x f23,x0
  83. fmv.d.x f24,x0
  84. fmv.d.x f25,x0
  85. fmv.d.x f26,x0
  86. fmv.d.x f27,x0
  87. fmv.d.x f28,x0
  88. fmv.d.x f29,x0
  89. fmv.d.x f30,x0
  90. fmv.d.x f31,x0
  91. .option push
  92. .option norelax
  93. la gp, __global_pointer$
  94. .option pop
  95. /* get cpu id */
  96. csrr a0, mhartid
  97. la sp, __stack_start__
  98. addi t1, a0, 1
  99. li t2, __STACKSIZE__
  100. mul t1, t1, t2
  101. add sp, sp, t1 /* sp = (cpuid + 1) * __STACKSIZE__ + __stack_start__ */
  102. /* other cpu core, jump to cpu entry directly */
  103. bnez a0, _cpu_entry
  104. #if 0
  105. /* clear bss section */
  106. la a0, __bss_start
  107. la a1, __bss_end
  108. bgeu a0, a1, 2f
  109. 1:
  110. sw zero, (a0)
  111. addi a0, a0, REGBYTES
  112. bltu a0, a1, 1b
  113. 2:
  114. #endif
  115. _cpu_entry:
  116. csrr a0, mhartid
  117. j cpu_entry