drv_clock.h 2.5 KB

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  1. /**
  2. * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. ******************************************************************************
  6. * @file drv_clock.h
  7. * @version V0.1
  8. * @brief clock interface
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2019-07-11 Elaine.Zhang first implementation
  13. *
  14. ******************************************************************************
  15. */
  16. #ifndef _DRV_CLOCK_H_
  17. #define _DRV_CLOCK_H_
  18. #include <hal_base.h>
  19. #ifdef RT_CONSOLE_DEVICE_NAME
  20. #define RT_CONSOLE_DEVICE_UART(ID) \
  21. ((strcmp(RT_CONSOLE_DEVICE_NAME, "uart"#ID)) ? 0:1)
  22. #else
  23. #define RT_CONSOLE_DEVICE_UART(ID) 0
  24. #endif
  25. #define INIT_CLK(NAME, ID, RATE) \
  26. { .name = NAME, .clk_id = ID, .init_rate = RATE, }
  27. struct clk_gate
  28. {
  29. uint32_t gate_id;
  30. int enable_count;
  31. int ref_count;
  32. rt_slist_t node;
  33. };
  34. struct clk_init
  35. {
  36. const char *name;
  37. uint32_t clk_id;
  38. uint32_t init_rate;
  39. };
  40. struct clk_unused
  41. {
  42. uint32_t is_pmucru : 1;
  43. uint32_t gate_con : 31;
  44. uint32_t gate_val;
  45. };
  46. struct pd
  47. {
  48. uint32_t pd_id;
  49. int enable_count;
  50. int ref_count;
  51. rt_slist_t node;
  52. };
  53. /**
  54. * @brief clk set enable by id.
  55. * @param gate_id: gate id.
  56. * @retval RT_EOK: clk set enable success.
  57. * @retval -RT_ERROR: clk set enable failed.
  58. */
  59. static inline rt_err_t clk_enable_by_id(int gate_id)
  60. {
  61. #ifdef HAL_CRU_MODULE_ENABLED
  62. return (HAL_CRU_ClkEnable(gate_id) == HAL_OK) ? RT_EOK : -RT_ERROR;
  63. #else
  64. return RT_EOK;
  65. #endif
  66. }
  67. /**
  68. * @brief clk set disable by id.
  69. * @param gate_id: gate id.
  70. * @retval RT_EOK: clk set disable success.
  71. * @retval -RT_ERROR: clk set disable failed.
  72. */
  73. static inline rt_err_t clk_disable_by_id(int gate_id)
  74. {
  75. #ifdef HAL_CRU_MODULE_ENABLED
  76. return (HAL_CRU_ClkDisable(gate_id) == HAL_OK) ? RT_EOK : -RT_ERROR;
  77. #else
  78. return RT_EOK;
  79. #endif
  80. }
  81. struct clk_gate *get_clk_gate_from_id(int gate_id);
  82. void put_clk_gate(struct clk_gate *gate);
  83. rt_err_t clk_enable(struct clk_gate *gate);
  84. rt_err_t clk_disable(struct clk_gate *gate);
  85. int clk_is_enabled(struct clk_gate *gate);
  86. uint32_t clk_get_rate(eCLOCK_Name clk_id);
  87. rt_err_t clk_set_rate(eCLOCK_Name clk_id, uint32_t rate);
  88. #if defined(RT_USING_PMU)
  89. struct pd *get_pd_from_id(ePD_Id pd_id);
  90. void put_pd(struct pd *power);
  91. rt_err_t pd_on(struct pd *power);
  92. rt_err_t pd_off(struct pd *power);
  93. #endif
  94. void clk_init(const struct clk_init *clk_inits, bool clk_dump);
  95. void clk_disable_unused(const struct clk_unused *clks_unused);
  96. #endif // _DRV_CLOCK_H_