usart.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-01-05 Bernard the first version
  9. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  10. * 2013-05-13 aozima update for kehong-lingtai.
  11. * 2015-01-31 armink make sure the serial transmit complete in putc()
  12. * 2018-08-17 whj add to usart3
  13. */
  14. #include "stm32f10x.h"
  15. #include "usart.h"
  16. #include "board.h"
  17. #include <rtdevice.h>
  18. /* USART1 */
  19. #define UART1_GPIO_TX GPIO_Pin_9
  20. #define UART1_GPIO_RX GPIO_Pin_10
  21. #define UART1_GPIO GPIOA
  22. /* USART2 */
  23. #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
  24. #define UART2_GPIO_TX GPIO_Pin_5
  25. #define UART2_GPIO_RX GPIO_Pin_6
  26. #define UART2_GPIO GPIOD
  27. #else /* for STM32F10X_HD */
  28. /* USART2_REMAP = 0 */
  29. #define UART2_GPIO_TX GPIO_Pin_2
  30. #define UART2_GPIO_RX GPIO_Pin_3
  31. #define UART2_GPIO GPIOA
  32. #endif
  33. /* USART3_REMAP = 1 */
  34. #define UART3_GPIO_TX GPIO_Pin_10
  35. #define UART3_GPIO_RX GPIO_Pin_11
  36. #define UART3_GPIO GPIOC
  37. /* STM32 uart driver */
  38. struct stm32_uart
  39. {
  40. USART_TypeDef* uart_device;
  41. IRQn_Type irq;
  42. };
  43. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  44. {
  45. struct stm32_uart* uart;
  46. USART_InitTypeDef USART_InitStructure;
  47. RT_ASSERT(serial != RT_NULL);
  48. RT_ASSERT(cfg != RT_NULL);
  49. uart = (struct stm32_uart *)serial->parent.user_data;
  50. USART_InitStructure.USART_BaudRate = cfg->baud_rate;
  51. if (cfg->data_bits == DATA_BITS_8) {
  52. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  53. } else if (cfg->data_bits == DATA_BITS_9) {
  54. USART_InitStructure.USART_WordLength = USART_WordLength_9b;
  55. }
  56. if (cfg->stop_bits == STOP_BITS_1) {
  57. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  58. } else if (cfg->stop_bits == STOP_BITS_2) {
  59. USART_InitStructure.USART_StopBits = USART_StopBits_2;
  60. }
  61. if (cfg->parity == PARITY_NONE) {
  62. USART_InitStructure.USART_Parity = USART_Parity_No;
  63. } else if (cfg->parity == PARITY_ODD) {
  64. USART_InitStructure.USART_Parity = USART_Parity_Odd;
  65. } else if (cfg->parity == PARITY_EVEN) {
  66. USART_InitStructure.USART_Parity = USART_Parity_Even;
  67. }
  68. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  69. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  70. USART_Init(uart->uart_device, &USART_InitStructure);
  71. /* Enable USART */
  72. USART_Cmd(uart->uart_device, ENABLE);
  73. return RT_EOK;
  74. }
  75. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  76. {
  77. struct stm32_uart* uart;
  78. RT_ASSERT(serial != RT_NULL);
  79. uart = (struct stm32_uart *)serial->parent.user_data;
  80. switch (cmd)
  81. {
  82. /* disable interrupt */
  83. case RT_DEVICE_CTRL_CLR_INT:
  84. /* disable rx irq */
  85. UART_DISABLE_IRQ(uart->irq);
  86. /* disable interrupt */
  87. USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
  88. break;
  89. /* enable interrupt */
  90. case RT_DEVICE_CTRL_SET_INT:
  91. /* enable rx irq */
  92. UART_ENABLE_IRQ(uart->irq);
  93. /* enable interrupt */
  94. USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
  95. break;
  96. }
  97. return RT_EOK;
  98. }
  99. static int stm32_putc(struct rt_serial_device *serial, char c)
  100. {
  101. struct stm32_uart* uart;
  102. RT_ASSERT(serial != RT_NULL);
  103. uart = (struct stm32_uart *)serial->parent.user_data;
  104. USART_ClearFlag(uart->uart_device,USART_FLAG_TC);
  105. uart->uart_device->DR = c;
  106. while (!(uart->uart_device->SR & USART_FLAG_TC));
  107. return 1;
  108. }
  109. static int stm32_getc(struct rt_serial_device *serial)
  110. {
  111. int ch;
  112. struct stm32_uart* uart;
  113. RT_ASSERT(serial != RT_NULL);
  114. uart = (struct stm32_uart *)serial->parent.user_data;
  115. ch = -1;
  116. if (uart->uart_device->SR & USART_FLAG_RXNE)
  117. {
  118. ch = uart->uart_device->DR & 0xff;
  119. }
  120. return ch;
  121. }
  122. static const struct rt_uart_ops stm32_uart_ops =
  123. {
  124. stm32_configure,
  125. stm32_control,
  126. stm32_putc,
  127. stm32_getc,
  128. };
  129. #if defined(RT_USING_UART1)
  130. /* UART1 device driver structure */
  131. struct stm32_uart uart1 =
  132. {
  133. USART1,
  134. USART1_IRQn,
  135. };
  136. struct rt_serial_device serial1;
  137. void USART1_IRQHandler(void)
  138. {
  139. struct stm32_uart* uart;
  140. uart = &uart1;
  141. /* enter interrupt */
  142. rt_interrupt_enter();
  143. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  144. {
  145. rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
  146. /* clear interrupt */
  147. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  148. }
  149. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  150. {
  151. /* clear interrupt */
  152. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  153. }
  154. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  155. {
  156. stm32_getc(&serial1);
  157. }
  158. /* leave interrupt */
  159. rt_interrupt_leave();
  160. }
  161. #endif /* RT_USING_UART1 */
  162. #if defined(RT_USING_UART2)
  163. /* UART1 device driver structure */
  164. struct stm32_uart uart2 =
  165. {
  166. USART2,
  167. USART2_IRQn,
  168. };
  169. struct rt_serial_device serial2;
  170. void USART2_IRQHandler(void)
  171. {
  172. struct stm32_uart* uart;
  173. uart = &uart2;
  174. /* enter interrupt */
  175. rt_interrupt_enter();
  176. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  177. {
  178. rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
  179. /* clear interrupt */
  180. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  181. }
  182. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  183. {
  184. /* clear interrupt */
  185. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  186. }
  187. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  188. {
  189. stm32_getc(&serial2);
  190. }
  191. /* leave interrupt */
  192. rt_interrupt_leave();
  193. }
  194. #endif /* RT_USING_UART2 */
  195. #if defined(RT_USING_UART3)
  196. /* UART1 device driver structure */
  197. struct stm32_uart uart3 =
  198. {
  199. USART3,
  200. USART3_IRQn,
  201. };
  202. struct rt_serial_device serial3;
  203. void USART3_IRQHandler(void)
  204. {
  205. struct stm32_uart* uart;
  206. uart = &uart3;
  207. /* enter interrupt */
  208. rt_interrupt_enter();
  209. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  210. {
  211. rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
  212. /* clear interrupt */
  213. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  214. }
  215. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  216. {
  217. /* clear interrupt */
  218. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  219. }
  220. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  221. {
  222. stm32_getc(&serial3);
  223. }
  224. /* leave interrupt */
  225. rt_interrupt_leave();
  226. }
  227. #endif /* RT_USING_UART3 */
  228. static void RCC_Configuration(void)
  229. {
  230. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
  231. #if defined(RT_USING_UART1)
  232. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
  233. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  234. #endif /* RT_USING_UART1 */
  235. #if defined(RT_USING_UART2)
  236. #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
  237. /* Enable AFIO and GPIOD clock */
  238. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
  239. /* Enable the USART2 Pins Software Remapping */
  240. GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
  241. #else
  242. /* Enable AFIO and GPIOA clock */
  243. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
  244. #endif
  245. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  246. #endif /* RT_USING_UART2 */
  247. #if defined(RT_USING_UART3)
  248. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOC, ENABLE);
  249. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,ENABLE);
  250. GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
  251. #endif /* RT_USING_UART3 */
  252. }
  253. static void GPIO_Configuration(void)
  254. {
  255. GPIO_InitTypeDef GPIO_InitStructure;
  256. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  257. #if defined(RT_USING_UART1)
  258. /* Configure USART1 Rx (PA.10) as input floating */
  259. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  260. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  261. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  262. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  263. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  264. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  265. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  266. #endif /* RT_USING_UART1 */
  267. #if defined(RT_USING_UART2)
  268. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  269. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  270. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  271. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  272. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  273. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  274. #endif /* RT_USING_UART2 */
  275. #if defined(RT_USING_UART3)
  276. /* Configure USART3 Rx (PC.11) as input floating */
  277. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  278. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  279. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  280. /* Configure USART3 Tx (PC.10) as alternate function push-pull */
  281. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  282. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  283. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  284. #endif /* RT_USING_UART3 */
  285. }
  286. static void NVIC_Configuration(struct stm32_uart* uart)
  287. {
  288. NVIC_InitTypeDef NVIC_InitStructure;
  289. /* Enable the USART1 Interrupt */
  290. NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
  291. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  292. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  293. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  294. NVIC_Init(&NVIC_InitStructure);
  295. }
  296. void rt_hw_usart_init(void)
  297. {
  298. struct stm32_uart* uart;
  299. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  300. RCC_Configuration();
  301. GPIO_Configuration();
  302. #if defined(RT_USING_UART1)
  303. uart = &uart1;
  304. config.baud_rate = BAUD_RATE_115200;
  305. serial1.ops = &stm32_uart_ops;
  306. serial1.config = config;
  307. NVIC_Configuration(&uart1);
  308. /* register UART1 device */
  309. rt_hw_serial_register(&serial1, "uart1",
  310. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,
  311. uart);
  312. #endif /* RT_USING_UART1 */
  313. #if defined(RT_USING_UART2)
  314. uart = &uart2;
  315. config.baud_rate = BAUD_RATE_115200;
  316. serial2.ops = &stm32_uart_ops;
  317. serial2.config = config;
  318. NVIC_Configuration(&uart2);
  319. /* register UART2 device */
  320. rt_hw_serial_register(&serial2, "uart2",
  321. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  322. uart);
  323. #endif /* RT_USING_UART2 */
  324. #if defined(RT_USING_UART3)
  325. uart = &uart3;
  326. config.baud_rate = BAUD_RATE_115200;
  327. serial3.ops = &stm32_uart_ops;
  328. serial3.config = config;
  329. NVIC_Configuration(&uart3);
  330. /* register UART3 device */
  331. rt_hw_serial_register(&serial3, "uart3",
  332. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  333. uart);
  334. #endif /* RT_USING_UART3 */
  335. }