usart.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-01-05 Bernard the first version
  9. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  10. * 2013-05-13 aozima update for kehong-lingtai.
  11. * 2015-01-31 armink make sure the serial transmit complete in putc()
  12. * 2018-08-17 whj add to usart3
  13. */
  14. #include "stm32f10x.h"
  15. #include "usart.h"
  16. #include "board.h"
  17. #include <rtdevice.h>
  18. /* USART1 */
  19. #define UART1_GPIO_TX GPIO_Pin_9
  20. #define UART1_GPIO_RX GPIO_Pin_10
  21. #define UART1_GPIO GPIOA
  22. /* USART2 */
  23. #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
  24. #define UART2_GPIO_TX GPIO_Pin_5
  25. #define UART2_GPIO_RX GPIO_Pin_6
  26. #define UART2_GPIO GPIOD
  27. #else /* for STM32F10X_HD */
  28. /* USART2_REMAP = 0 */
  29. #define UART2_GPIO_TX GPIO_Pin_2
  30. #define UART2_GPIO_RX GPIO_Pin_3
  31. #define UART2_GPIO GPIOA
  32. #endif
  33. /* USART3_REMAP = 1 */
  34. #define UART3_GPIO_TX GPIO_Pin_10
  35. #define UART3_GPIO_RX GPIO_Pin_11
  36. #define UART3_GPIO GPIOC
  37. /* STM32 uart driver */
  38. struct stm32_uart
  39. {
  40. USART_TypeDef* uart_device;
  41. IRQn_Type irq;
  42. };
  43. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  44. {
  45. struct stm32_uart* uart;
  46. USART_InitTypeDef USART_InitStructure;
  47. RT_ASSERT(serial != RT_NULL);
  48. RT_ASSERT(cfg != RT_NULL);
  49. uart = (struct stm32_uart *)serial->parent.user_data;
  50. USART_InitStructure.USART_BaudRate = cfg->baud_rate;
  51. if (cfg->data_bits == DATA_BITS_8) {
  52. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  53. } else if (cfg->data_bits == DATA_BITS_9) {
  54. USART_InitStructure.USART_WordLength = USART_WordLength_9b;
  55. }
  56. if (cfg->stop_bits == STOP_BITS_1) {
  57. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  58. } else if (cfg->stop_bits == STOP_BITS_2) {
  59. USART_InitStructure.USART_StopBits = USART_StopBits_2;
  60. }
  61. if (cfg->parity == PARITY_NONE) {
  62. USART_InitStructure.USART_Parity = USART_Parity_No;
  63. } else if (cfg->parity == PARITY_ODD) {
  64. USART_InitStructure.USART_Parity = USART_Parity_Odd;
  65. } else if (cfg->parity == PARITY_EVEN) {
  66. USART_InitStructure.USART_Parity = USART_Parity_Even;
  67. }
  68. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  69. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  70. USART_Init(uart->uart_device, &USART_InitStructure);
  71. /* Enable USART */
  72. USART_Cmd(uart->uart_device, ENABLE);
  73. return RT_EOK;
  74. }
  75. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  76. {
  77. struct stm32_uart* uart;
  78. RT_ASSERT(serial != RT_NULL);
  79. uart = (struct stm32_uart *)serial->parent.user_data;
  80. switch (cmd)
  81. {
  82. /* disable interrupt */
  83. case RT_DEVICE_CTRL_CLR_INT:
  84. /* disable rx irq */
  85. UART_DISABLE_IRQ(uart->irq);
  86. /* disable interrupt */
  87. USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
  88. break;
  89. /* enable interrupt */
  90. case RT_DEVICE_CTRL_SET_INT:
  91. /* enable rx irq */
  92. UART_ENABLE_IRQ(uart->irq);
  93. /* enable interrupt */
  94. USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
  95. break;
  96. }
  97. return RT_EOK;
  98. }
  99. static int stm32_putc(struct rt_serial_device *serial, char c)
  100. {
  101. struct stm32_uart* uart;
  102. RT_ASSERT(serial != RT_NULL);
  103. uart = (struct stm32_uart *)serial->parent.user_data;
  104. uart->uart_device->DR = c;
  105. while (!(uart->uart_device->SR & USART_FLAG_TC));
  106. return 1;
  107. }
  108. static int stm32_getc(struct rt_serial_device *serial)
  109. {
  110. int ch;
  111. struct stm32_uart* uart;
  112. RT_ASSERT(serial != RT_NULL);
  113. uart = (struct stm32_uart *)serial->parent.user_data;
  114. ch = -1;
  115. if (uart->uart_device->SR & USART_FLAG_RXNE)
  116. {
  117. ch = uart->uart_device->DR & 0xff;
  118. }
  119. return ch;
  120. }
  121. static const struct rt_uart_ops stm32_uart_ops =
  122. {
  123. stm32_configure,
  124. stm32_control,
  125. stm32_putc,
  126. stm32_getc,
  127. };
  128. #if defined(RT_USING_UART1)
  129. /* UART1 device driver structure */
  130. struct stm32_uart uart1 =
  131. {
  132. USART1,
  133. USART1_IRQn,
  134. };
  135. struct rt_serial_device serial1;
  136. void USART1_IRQHandler(void)
  137. {
  138. struct stm32_uart* uart;
  139. uart = &uart1;
  140. /* enter interrupt */
  141. rt_interrupt_enter();
  142. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  143. {
  144. rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
  145. /* clear interrupt */
  146. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  147. }
  148. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  149. {
  150. /* clear interrupt */
  151. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  152. }
  153. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  154. {
  155. stm32_getc(&serial1);
  156. }
  157. /* leave interrupt */
  158. rt_interrupt_leave();
  159. }
  160. #endif /* RT_USING_UART1 */
  161. #if defined(RT_USING_UART2)
  162. /* UART1 device driver structure */
  163. struct stm32_uart uart2 =
  164. {
  165. USART2,
  166. USART2_IRQn,
  167. };
  168. struct rt_serial_device serial2;
  169. void USART2_IRQHandler(void)
  170. {
  171. struct stm32_uart* uart;
  172. uart = &uart2;
  173. /* enter interrupt */
  174. rt_interrupt_enter();
  175. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  176. {
  177. rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
  178. /* clear interrupt */
  179. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  180. }
  181. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  182. {
  183. /* clear interrupt */
  184. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  185. }
  186. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  187. {
  188. stm32_getc(&serial2);
  189. }
  190. /* leave interrupt */
  191. rt_interrupt_leave();
  192. }
  193. #endif /* RT_USING_UART2 */
  194. #if defined(RT_USING_UART3)
  195. /* UART1 device driver structure */
  196. struct stm32_uart uart3 =
  197. {
  198. USART3,
  199. USART3_IRQn,
  200. };
  201. struct rt_serial_device serial3;
  202. void USART3_IRQHandler(void)
  203. {
  204. struct stm32_uart* uart;
  205. uart = &uart3;
  206. /* enter interrupt */
  207. rt_interrupt_enter();
  208. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  209. {
  210. rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
  211. /* clear interrupt */
  212. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  213. }
  214. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  215. {
  216. /* clear interrupt */
  217. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  218. }
  219. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  220. {
  221. stm32_getc(&serial3);
  222. }
  223. /* leave interrupt */
  224. rt_interrupt_leave();
  225. }
  226. #endif /* RT_USING_UART3 */
  227. static void RCC_Configuration(void)
  228. {
  229. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
  230. #if defined(RT_USING_UART1)
  231. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
  232. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  233. #endif /* RT_USING_UART1 */
  234. #if defined(RT_USING_UART2)
  235. #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
  236. /* Enable AFIO and GPIOD clock */
  237. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
  238. /* Enable the USART2 Pins Software Remapping */
  239. GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
  240. #else
  241. /* Enable AFIO and GPIOA clock */
  242. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
  243. #endif
  244. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  245. #endif /* RT_USING_UART2 */
  246. #if defined(RT_USING_UART3)
  247. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOC, ENABLE);
  248. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,ENABLE);
  249. GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
  250. #endif /* RT_USING_UART3 */
  251. }
  252. static void GPIO_Configuration(void)
  253. {
  254. GPIO_InitTypeDef GPIO_InitStructure;
  255. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  256. #if defined(RT_USING_UART1)
  257. /* Configure USART1 Rx (PA.10) as input floating */
  258. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  259. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  260. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  261. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  262. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  263. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  264. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  265. #endif /* RT_USING_UART1 */
  266. #if defined(RT_USING_UART2)
  267. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  268. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  269. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  270. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  271. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  272. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  273. #endif /* RT_USING_UART2 */
  274. #if defined(RT_USING_UART3)
  275. /* Configure USART3 Rx (PC.11) as input floating */
  276. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  277. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  278. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  279. /* Configure USART3 Tx (PC.10) as alternate function push-pull */
  280. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  281. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  282. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  283. #endif /* RT_USING_UART3 */
  284. }
  285. static void NVIC_Configuration(struct stm32_uart* uart)
  286. {
  287. NVIC_InitTypeDef NVIC_InitStructure;
  288. /* Enable the USART1 Interrupt */
  289. NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
  290. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  291. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  292. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  293. NVIC_Init(&NVIC_InitStructure);
  294. }
  295. void rt_hw_usart_init(void)
  296. {
  297. struct stm32_uart* uart;
  298. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  299. RCC_Configuration();
  300. GPIO_Configuration();
  301. #if defined(RT_USING_UART1)
  302. uart = &uart1;
  303. config.baud_rate = BAUD_RATE_115200;
  304. serial1.ops = &stm32_uart_ops;
  305. serial1.config = config;
  306. NVIC_Configuration(&uart1);
  307. /* register UART1 device */
  308. rt_hw_serial_register(&serial1, "uart1",
  309. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,
  310. uart);
  311. #endif /* RT_USING_UART1 */
  312. #if defined(RT_USING_UART2)
  313. uart = &uart2;
  314. config.baud_rate = BAUD_RATE_115200;
  315. serial2.ops = &stm32_uart_ops;
  316. serial2.config = config;
  317. NVIC_Configuration(&uart2);
  318. /* register UART2 device */
  319. rt_hw_serial_register(&serial2, "uart2",
  320. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  321. uart);
  322. #endif /* RT_USING_UART2 */
  323. #if defined(RT_USING_UART3)
  324. uart = &uart3;
  325. config.baud_rate = BAUD_RATE_115200;
  326. serial3.ops = &stm32_uart_ops;
  327. serial3.config = config;
  328. NVIC_Configuration(&uart3);
  329. /* register UART3 device */
  330. rt_hw_serial_register(&serial3, "uart3",
  331. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  332. uart);
  333. #endif /* RT_USING_UART3 */
  334. }