drv_qspi.c 11 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-04-11 Carl the first version
  9. */
  10. #include "drv_qspi.h"
  11. #include <rtthread.h>
  12. #include "rtdevice.h"
  13. #include "ft_qspi.h"
  14. #include "ft_parameters.h"
  15. #ifdef BSP_USE_QSPI
  16. #define DRV_DEBUG
  17. #define LOG_TAG "drv.qspi"
  18. #include <drv_log.h>
  19. struct ft2004_qspi_bus
  20. {
  21. FQSpi_t fqspi;
  22. char *name;
  23. rt_uint32_t init; /* 1 is init already */
  24. };
  25. static struct rt_spi_bus _qspi_bus;
  26. static struct ft2004_qspi_bus _ft2004_qspi_bus;
  27. static int ft2004_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configuration *qspi_cfg)
  28. {
  29. RT_ASSERT(device != RT_NULL);
  30. RT_ASSERT(qspi_cfg != RT_NULL);
  31. // struct rt_spi_configuration *cfg = &qspi_cfg->parent;
  32. struct ft2004_qspi_bus *qspi_bus_p = device->parent.bus->parent.user_data;
  33. if (qspi_bus_p->init == 0)
  34. {
  35. qspi_bus_p->init = 1;
  36. FQSpi_CfgInitialize(&qspi_bus_p->fqspi, FQSpi_LookupConfig(0));
  37. }
  38. return RT_EOK;
  39. }
  40. static rt_err_t ft2004_cmdOperation(struct ft2004_qspi_bus *qspi_bus_p, struct rt_spi_message *message)
  41. {
  42. struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
  43. const rt_uint8_t *sndb = message->send_buf;
  44. rt_uint8_t *rcvb = message->recv_buf;
  45. ft_error_t ret;
  46. RT_ASSERT(qspi_bus_p != RT_NULL);
  47. RT_ASSERT(message != RT_NULL);
  48. struct FQSpi_CmdPack cmd_pack = {0};
  49. if (qspi_message->instruction.qspi_lines == 0)
  50. {
  51. LOG_E("instruction is not valid");
  52. return RT_ERROR;
  53. }
  54. cmd_pack.cmd = qspi_message->instruction.content;
  55. if (qspi_message->address.qspi_lines != 0)
  56. {
  57. cmd_pack.flags |= FQSPI_CMD_NEED_ADDR_MASK;
  58. cmd_pack.addr = qspi_message->address.content;
  59. }
  60. if (qspi_message->address.size == 24)
  61. {
  62. cmd_pack.flags |= FQSPI_CMD_ADDRESS_3BYTE_MASK;
  63. }
  64. else if (qspi_message->address.size == 32)
  65. {
  66. cmd_pack.flags |= FQSPI_CMD_ADDRESS_4BYTE_MASK;
  67. }
  68. if (qspi_message->qspi_data_lines != 0)
  69. {
  70. if (sndb && (message->length > 0))
  71. {
  72. cmd_pack.flags |= FQSPI_CMD_NEED_SET_MASK;
  73. cmd_pack.txBuf = sndb;
  74. cmd_pack.length = message->length;
  75. }
  76. else if (rcvb && (message->length > 0))
  77. {
  78. cmd_pack.flags |= FQSPI_CMD_NEED_GET_MASK;
  79. cmd_pack.rxBuf = rcvb;
  80. cmd_pack.length = message->length;
  81. }
  82. else
  83. {
  84. cmd_pack.flags &= ~(FQSPI_CMD_NEED_GET_MASK | FQSPI_CMD_NEED_SET_MASK);
  85. }
  86. }
  87. if (qspi_message->dummy_cycles)
  88. {
  89. cmd_pack.flags |= FQSPI_CMD_NEED_DUMMY_MASK;
  90. cmd_pack.dummyCycle = qspi_message->dummy_cycles;
  91. }
  92. if (cmd_pack.cmd == 0x20)
  93. {
  94. if (qspi_message->address.size == 32)
  95. {
  96. cmd_pack.cmd = 0xdc;
  97. }
  98. }
  99. #ifdef BSP_QSPI_DEBUG
  100. LOG_I("flags %x", cmd_pack.flags);
  101. #endif
  102. ret = FQSpi_CmdOperation(&qspi_bus_p->fqspi, &cmd_pack);
  103. #ifdef BSP_QSPI_DEBUG
  104. if (ret == FQSPI_SUCCESS)
  105. if (cmd_pack.cmd == 5)
  106. {
  107. LOG_I("cmd05 0x%x", cmd_pack.rxBuf[0]);
  108. }
  109. #endif
  110. return (ret == FQSPI_SUCCESS) ? RT_EOK : RT_ERROR;
  111. }
  112. static rt_uint32_t ft2004_qspi_xfer(struct ft2004_qspi_bus *qspi_bus_p, struct rt_spi_message *message)
  113. {
  114. struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
  115. rt_uint32_t ret_length = 0;
  116. const rt_uint8_t *sndb = message->send_buf;
  117. rt_uint8_t *rcvb = message->recv_buf;
  118. rt_int32_t length = message->length;
  119. rt_uint32_t cmd;
  120. rt_uint32_t addr;
  121. FQSpi_t *qspi_p;
  122. FQSpi_Config_t *qspi_config_p;
  123. struct FQSpi_DataPack data_pack = {0};
  124. qspi_p = &qspi_bus_p->fqspi;
  125. qspi_config_p = &qspi_bus_p->fqspi.config;
  126. cmd = qspi_message->instruction.content;
  127. addr = qspi_message->address.content;
  128. #ifdef BSP_QSPI_DEBUG
  129. LOG_I("cmd is %x ", cmd);
  130. LOG_I("length %d , rcvb %x sndb %x addr %x dummy_cycles %x ", length, rcvb, sndb, addr, qspi_message->dummy_cycles);
  131. #endif
  132. if (qspi_config_p->channel >= FT_QSPI_MAX_CS_NUM)
  133. {
  134. LOG_E("invalid channel[%x] ", qspi_config_p->channel);
  135. return RT_ERROR;
  136. }
  137. switch (cmd)
  138. {
  139. case FQSPI_FLASH_CMD_PP:
  140. {
  141. if (RT_NULL != sndb)
  142. {
  143. data_pack.cmd = cmd;
  144. data_pack.addr = addr;
  145. if (qspi_message->address.size == 24)
  146. {
  147. data_pack.flags |= FQSPI_DATA_ADDRESS_3BYTE_MASK;
  148. }
  149. else
  150. {
  151. data_pack.flags |= FQSPI_DATA_ADDRESS_4BYTE_MASK;
  152. }
  153. LOG_E("write flags %x ", data_pack.flags);
  154. data_pack.txBuf = sndb;
  155. data_pack.length = length;
  156. ret_length = ((FQSpi_Write(qspi_p, &data_pack) == FQSPI_SUCCESS) ? length : 0);
  157. }
  158. else
  159. {
  160. LOG_E("pp cmd %x sndb is null", cmd);
  161. ret_length = 0;
  162. }
  163. }
  164. break;
  165. case FQSPI_FLASH_CMD_WRDI: /* for sufd qspi fast read */
  166. FQSpi_FlashRegSet(qspi_p, cmd, RT_NULL, 0);
  167. case FQSPI_FLASH_CMD_READ:
  168. {
  169. if (RT_NULL != rcvb)
  170. {
  171. data_pack.cmd = FQSPI_FLASH_CMD_READ;
  172. data_pack.addr = addr;
  173. if (qspi_message->address.size == 24)
  174. {
  175. data_pack.flags |= FQSPI_DATA_ADDRESS_3BYTE_MASK;
  176. }
  177. else
  178. {
  179. data_pack.flags |= FQSPI_DATA_ADDRESS_4BYTE_MASK;
  180. }
  181. if (qspi_message->dummy_cycles)
  182. {
  183. data_pack.flags |= FQSPI_DATA_NEED_DUMMY_MASK;
  184. data_pack.dummyCycle = qspi_message->dummy_cycles;
  185. }
  186. data_pack.rxBuf = rcvb;
  187. data_pack.length = length;
  188. ret_length = ((FQSpi_Read(qspi_p, &data_pack) == FQSPI_SUCCESS) ? length : 0);
  189. }
  190. else
  191. {
  192. // LOG_E("read cmd %x rcvb is null", cmd);
  193. ret_length = 0;
  194. }
  195. }
  196. break;
  197. default:
  198. {
  199. if (ft2004_cmdOperation(qspi_bus_p, message) == RT_EOK)
  200. {
  201. ret_length = 1;
  202. }
  203. else
  204. {
  205. LOG_E("ft2004_cmdOperation error");
  206. ret_length = 0;
  207. }
  208. }
  209. }
  210. return ret_length;
  211. }
  212. static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  213. {
  214. RT_ASSERT(device != RT_NULL);
  215. RT_ASSERT(device->bus != RT_NULL);
  216. struct ft2004_qspi_bus *qspi_bus_p = device->bus->parent.user_data;
  217. return ft2004_qspi_xfer(qspi_bus_p, message);
  218. }
  219. static rt_err_t qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
  220. {
  221. RT_ASSERT(device != RT_NULL);
  222. RT_ASSERT(configuration != RT_NULL);
  223. struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
  224. return ft2004_qspi_init(qspi_device, &qspi_device->config);
  225. }
  226. static const struct rt_spi_ops ft2004_qspi_ops =
  227. {
  228. .configure = qspi_configure,
  229. .xfer = qspixfer,
  230. };
  231. static int ft2004_qspi_register_bus(struct ft2004_qspi_bus *qspi_bus, const char *name)
  232. {
  233. RT_ASSERT(qspi_bus != RT_NULL);
  234. RT_ASSERT(name != RT_NULL);
  235. _qspi_bus.parent.user_data = qspi_bus;
  236. return rt_qspi_bus_register(&_qspi_bus, name, &ft2004_qspi_ops);
  237. }
  238. rt_err_t ft2004_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
  239. {
  240. struct rt_qspi_device *qspi_device = RT_NULL;
  241. rt_err_t result = RT_EOK;
  242. RT_ASSERT(bus_name != RT_NULL);
  243. RT_ASSERT(device_name != RT_NULL);
  244. RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
  245. qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
  246. if (qspi_device == RT_NULL)
  247. {
  248. LOG_E("no memory, qspi bus attach device failed!");
  249. result = RT_ENOMEM;
  250. goto __exit;
  251. }
  252. qspi_device->enter_qspi_mode = enter_qspi_mode;
  253. qspi_device->exit_qspi_mode = exit_qspi_mode;
  254. qspi_device->config.qspi_dl_width = data_line_width;
  255. result = rt_spi_bus_attach_device(&qspi_device->parent, device_name, bus_name, RT_NULL);
  256. __exit:
  257. if (result != RT_EOK)
  258. {
  259. if (qspi_device)
  260. {
  261. rt_free(qspi_device);
  262. }
  263. }
  264. return result;
  265. }
  266. static int rt_hw_qspi_bus_init(void)
  267. {
  268. return ft2004_qspi_register_bus(&_ft2004_qspi_bus, FT2004_QSPI_NAME);
  269. }
  270. INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
  271. #ifdef BSP_QSPI_DEBUG
  272. static void cmd05_check(void)
  273. {
  274. struct FQSpi_CmdPack cmd_pack = {0};
  275. u8 rx_buffer[1];
  276. cmd_pack.cmd = 0x6;
  277. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  278. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  279. cmd_pack.cmd = 0x5;
  280. cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
  281. cmd_pack.rxBuf = rx_buffer;
  282. cmd_pack.length = sizeof(rx_buffer);
  283. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  284. for (u32 i = 0; i < cmd_pack.length; i++)
  285. {
  286. LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
  287. }
  288. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  289. cmd_pack.cmd = 0x4;
  290. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  291. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  292. cmd_pack.cmd = 0x5;
  293. cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
  294. cmd_pack.rxBuf = rx_buffer;
  295. cmd_pack.length = sizeof(rx_buffer);
  296. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  297. for (u32 i = 0; i < cmd_pack.length; i++)
  298. {
  299. LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
  300. }
  301. }
  302. MSH_CMD_EXPORT_ALIAS(cmd05_check, cmd05_check, cmd05_check);
  303. #endif
  304. #ifdef BSP_QSPI_DEBUG
  305. static void cmd35_check(void)
  306. {
  307. struct FQSpi_CmdPack cmd_pack = {0};
  308. u8 rx_buffer[1];
  309. cmd_pack.cmd = 0x6;
  310. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  311. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  312. cmd_pack.cmd = 0x5;
  313. cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
  314. cmd_pack.rxBuf = rx_buffer;
  315. cmd_pack.length = sizeof(rx_buffer);
  316. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  317. for (u32 i = 0; i < cmd_pack.length; i++)
  318. {
  319. LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
  320. }
  321. cmd_pack.cmd = 0xB7;
  322. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  323. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  324. cmd_pack.cmd = 0x35;
  325. cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
  326. cmd_pack.rxBuf = rx_buffer;
  327. cmd_pack.length = sizeof(rx_buffer);
  328. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  329. for (u32 i = 0; i < cmd_pack.length; i++)
  330. {
  331. LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
  332. }
  333. }
  334. MSH_CMD_EXPORT_ALIAS(cmd35_check, cmd35_check, cmd35_check);
  335. #endif
  336. #ifdef BSP_QSPI_DEBUG
  337. static void cmd15_check(void)
  338. {
  339. struct FQSpi_CmdPack cmd_pack = {0};
  340. u8 rx_buffer[1];
  341. // cmd_pack.cmd = 0xB7;
  342. // FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  343. rt_memset(&cmd_pack, 0, sizeof(&cmd_pack));
  344. cmd_pack.cmd = 0x15;
  345. cmd_pack.flags = FQSPI_CMD_NEED_GET_MASK;
  346. cmd_pack.rxBuf = rx_buffer;
  347. cmd_pack.length = sizeof(rx_buffer);
  348. FQSpi_CmdOperation(&_ft2004_qspi_bus.fqspi, &cmd_pack);
  349. for (u32 i = 0; i < cmd_pack.length; i++)
  350. {
  351. LOG_I("cnt %d, 0x%x ", i, rx_buffer[i]);
  352. }
  353. }
  354. MSH_CMD_EXPORT_ALIAS(cmd15_check, cmd15_check, cmd15_check);
  355. #endif
  356. #endif