display_controller.c 9.3 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2011-08-09 lgnq first version for LS1B DC
  9. * 2015-07-06 chinesebear modified for loongson 1c
  10. * 2018-01-06 sundm75 modified for smartloong
  11. */
  12. #include <rtthread.h>
  13. #include "display_controller.h"
  14. #include "../../libraries/ls1c_pwm.h"
  15. #include "../../libraries/ls1c_public.h"
  16. #include "../../libraries/ls1c_gpio.h"
  17. #include "../../libraries/ls1c_pin.h"
  18. #if (defined PKG_USING_GUIENGINE) || (defined RT_USING_RTGUI)
  19. struct vga_struct vga_mode[] =
  20. {
  21. {/*"480x272_60.00"*/ 111000, 480, 482, 523, 525, 272, 274, 284, 286, },
  22. {/*"640x480_70.00"*/ 28560, 640, 664, 728, 816, 480, 481, 484, 500, },
  23. {/*"640x640_60.00"*/ 33100, 640, 672, 736, 832, 640, 641, 644, 663, },
  24. {/*"640x768_60.00"*/ 39690, 640, 672, 736, 832, 768, 769, 772, 795, },
  25. {/*"640x800_60.00"*/ 42130, 640, 680, 744, 848, 800, 801, 804, 828, },
  26. {/*"800x480_70.00"*/ 35840, 800, 832, 912, 1024, 480, 481, 484, 500, },
  27. {/*"800x600_60.00"*/ 38220, 800, 832, 912, 1024, 600, 601, 604, 622, },
  28. {/*"800x640_60.00"*/ 40730, 800, 832, 912, 1024, 640, 641, 644, 663, },
  29. {/*"832x600_60.00"*/ 40010, 832, 864, 952, 1072, 600, 601, 604, 622, },
  30. {/*"832x608_60.00"*/ 40520, 832, 864, 952, 1072, 608, 609, 612, 630, },
  31. {/*"1024x480_60.00"*/ 38170, 1024, 1048, 1152, 1280, 480, 481, 484, 497, },
  32. {/*"1024x600_60.00"*/ 48960, 1024, 1064, 1168, 1312, 600, 601, 604, 622, },
  33. {/*"1024x640_60.00"*/ 52830, 1024, 1072, 1176, 1328, 640, 641, 644, 663, },
  34. {/*"1024x768_60.00"*/ 64110, 1024, 1080, 1184, 1344, 768, 769, 772, 795, },
  35. {/*"1152x764_60.00"*/ 71380, 1152, 1208, 1328, 1504, 764, 765, 768, 791, },
  36. {/*"1280x800_60.00"*/ 83460, 1280, 1344, 1480, 1680, 800, 801, 804, 828, },
  37. {/*"1280x1024_55.00"*/ 98600, 1280, 1352, 1488, 1696, 1024, 1025, 1028, 1057, },
  38. {/*"1440x800_60.00"*/ 93800, 1440, 1512, 1664, 1888, 800, 801, 804, 828, },
  39. {/*"1440x900_67.00"*/ 120280, 1440, 1528, 1680, 1920, 900, 901, 904, 935, },
  40. };
  41. static volatile int fb_index = 0;
  42. rt_align(16)
  43. volatile rt_uint16_t _rt_framebuffer[FB_YSIZE][FB_XSIZE];
  44. volatile rt_uint16_t _rt_framebuffer0[FB_YSIZE][FB_XSIZE];
  45. volatile rt_uint16_t _rt_framebuffer1[FB_YSIZE][FB_XSIZE];
  46. static struct rt_device_graphic_info _dc_info;
  47. static void pwminit(void)
  48. {
  49. pwm_info_t pwm_info;
  50. pwm_info.gpio = LS1C_PWM0_GPIO06; // pwm引脚位gpio06
  51. pwm_info.mode = PWM_MODE_NORMAL; // 正常模式--连续输出pwm波形
  52. pwm_info.duty = 0.85; // pwm占空比 85%
  53. pwm_info.period_ns = 5*1000*1000; // pwm周期5ms
  54. /*pwm初始化,初始化后立即产生pwm波形*/
  55. pwm_init(&pwm_info);
  56. /* 使能pwm */
  57. pwm_enable(&pwm_info);
  58. }
  59. int caclulate_freq(rt_uint32_t XIN, rt_uint32_t PCLK)
  60. {
  61. rt_uint32_t divider_int;
  62. rt_uint32_t needed_pixclk;
  63. rt_uint32_t pll_clk, pix_div;
  64. rt_uint32_t regval;
  65. pll_clk = PLL_FREQ; // 读CPU的 PLL及SDRAM 分频系数
  66. pll_clk =( pll_clk>>8 )& 0xff;
  67. pll_clk = XIN * pll_clk / 4 ;
  68. pix_div = PLL_DIV_PARAM;//读CPU的 CPU/CAMERA/DC 分频系数
  69. pix_div = (pix_div>>24)&0xff;
  70. rt_kprintf("old pll_clk=%d, pix_div=%d\n", pll_clk, pix_div);
  71. divider_int = pll_clk/(1000000) *PCLK/1000;
  72. if(divider_int%1000>=500)
  73. divider_int = divider_int/1000+1;
  74. else
  75. divider_int = divider_int/1000;
  76. rt_kprintf("divider_int = %d\n", divider_int);
  77. /* check whether divisor is too small. */
  78. if (divider_int < 1) {
  79. rt_kprintf("Warning: clock source is too slow.Try smaller resolution\n");
  80. divider_int = 1;
  81. }
  82. else if(divider_int > 100) {
  83. rt_kprintf("Warning: clock source is too fast.Try smaller resolution\n");
  84. divider_int = 100;
  85. }
  86. /* 配置分频寄存器 */
  87. {
  88. rt_uint32_t regval = 0;
  89. regval = PLL_DIV_PARAM;
  90. /*首先需要把分频使能位清零 */
  91. regval &= ~0x80000030; //PIX_DIV_VALID PIX_SEL 置0
  92. regval &= ~(0x3f<<24); //PIX_DIV 清零
  93. regval |= divider_int << 24;
  94. PLL_DIV_PARAM = regval;
  95. regval |= 0x80000030; //PIX_DIV_VALID PIX_SEL 置1
  96. PLL_DIV_PARAM = regval;
  97. }
  98. rt_kprintf("new PLL_FREQ=0x%x, PLL_DIV_PARAM=0x%x\n", PLL_FREQ, PLL_DIV_PARAM);
  99. rt_thread_delay(10);
  100. return 0;
  101. }
  102. static rt_err_t rt_dc_init(rt_device_t dev)
  103. {
  104. int i, out, mode=-1;
  105. int val;
  106. rt_kprintf("PWM initied\n");
  107. /* Set the back light PWM. */
  108. pwminit();
  109. for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)
  110. {
  111. if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)
  112. {
  113. mode=i;
  114. /* 计算时钟 配置频率*/
  115. caclulate_freq(OSC, vga_mode[i].pclk);
  116. break;
  117. }
  118. }
  119. if (mode<0)
  120. {
  121. rt_kprintf("\n\n\nunsupported framebuffer resolution\n\n\n");
  122. return RT_ERROR;
  123. }
  124. DC_FB_CONFIG = 0x0;
  125. DC_FB_CONFIG = 0x3; // // framebuffer configuration RGB565
  126. DC_DITHER_CONFIG = 0x0; //颜色抖动配置寄存器
  127. DC_DITHER_TABLE_LOW = 0x0; //颜色抖动查找表低位寄存器
  128. DC_DITHER_TABLE_HIGH = 0x0; //颜色抖动查找表高位寄存器
  129. DC_PANEL_CONFIG = 0x80001311; //液晶面板配置寄存器
  130. DC_PANEL_TIMING = 0x0;
  131. DC_HDISPLAY = (vga_mode[mode].hfl<<16) | vga_mode[mode].hr;
  132. DC_HSYNC = 0x40000000 | (vga_mode[mode].hse<<16) | vga_mode[mode].hss;
  133. DC_VDISPLAY = (vga_mode[mode].vfl<<16) | vga_mode[mode].vr;
  134. DC_VSYNC = 0x40000000 | (vga_mode[mode].vse<<16) | vga_mode[mode].vss;
  135. #if defined(CONFIG_VIDEO_32BPP)
  136. DC_FB_CONFIG = 0x00100105;
  137. DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
  138. #elif defined(CONFIG_VIDEO_24BPP)
  139. DC_FB_CONFIG = 0x00100104;
  140. DC_FB_BUFFER_STRIDE = (FB_XSIZE*4+255)&(~255);
  141. #elif defined(CONFIG_VIDEO_16BPP)// 使用这个选项
  142. DC_FB_CONFIG = 0x00100103;
  143. DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+0x7f)&(~0x7f);
  144. #elif defined(CONFIG_VIDEO_15BPP)
  145. DC_FB_CONFIG = 0x00100102;
  146. DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
  147. #elif defined(CONFIG_VIDEO_12BPP)
  148. DC_FB_CONFIG = 0x00100101;
  149. DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
  150. #else
  151. DC_FB_CONFIG = 0x00100104;
  152. DC_FB_BUFFER_STRIDE = (FB_XSIZE*4+255)&(~255);
  153. #endif
  154. return RT_EOK;
  155. }
  156. static rt_err_t rt_dc_control(rt_device_t dev, int cmd, void *args)
  157. {
  158. switch (cmd)
  159. {
  160. case RTGRAPHIC_CTRL_RECT_UPDATE:
  161. {
  162. if (fb_index == 0)
  163. {
  164. DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer1 - 0x80000000;
  165. DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer1 - 0x80000000;
  166. rt_memcpy((void *)_rt_framebuffer1, (const void *)_rt_framebuffer, sizeof(_rt_framebuffer));
  167. rt_memcpy((void *)_rt_framebuffer1, (const void *)_rt_framebuffer, sizeof(_rt_framebuffer));
  168. fb_index =1;
  169. }
  170. else
  171. {
  172. DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer0 - 0x80000000;
  173. DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer0 - 0x80000000;
  174. rt_memcpy((void *)_rt_framebuffer0, (const void *)_rt_framebuffer, sizeof(_rt_framebuffer));
  175. rt_memcpy((void *)_rt_framebuffer0, (const void *)_rt_framebuffer, sizeof(_rt_framebuffer));
  176. fb_index =0;
  177. }
  178. break;
  179. }
  180. case RTGRAPHIC_CTRL_POWERON:
  181. break;
  182. case RTGRAPHIC_CTRL_POWEROFF:
  183. break;
  184. case RTGRAPHIC_CTRL_GET_INFO:
  185. rt_memcpy(args, &_dc_info, sizeof(_dc_info));
  186. break;
  187. case RTGRAPHIC_CTRL_SET_MODE:
  188. break;
  189. }
  190. return RT_EOK;
  191. }
  192. void rt_hw_dc_init(void)
  193. {
  194. rt_device_t dc = rt_malloc(sizeof(struct rt_device));
  195. if (dc == RT_NULL)
  196. {
  197. rt_kprintf("dc == RT_NULL\n");
  198. return; /* no memory yet */
  199. }
  200. _dc_info.bits_per_pixel = 16;
  201. _dc_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
  202. _dc_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
  203. _dc_info.width = FB_XSIZE;
  204. _dc_info.height = FB_YSIZE;
  205. /* init device structure */
  206. dc->type = RT_Device_Class_Graphic;
  207. dc->init = rt_dc_init;
  208. dc->open = RT_NULL;
  209. dc->close = RT_NULL;
  210. dc->control = rt_dc_control;
  211. dc->user_data = (void*)&_dc_info;
  212. /* register Display Controller device to RT-Thread */
  213. rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);
  214. rt_device_init(dc);
  215. }
  216. #include <rtgui/driver.h>
  217. #include "display_controller.h"
  218. /* initialize for gui driver */
  219. int rtgui_lcd_init(void)
  220. {
  221. rt_device_t dc;
  222. rt_kprintf("DC initied\n");
  223. pin_set_purpose(76, PIN_PURPOSE_OTHER);
  224. pin_set_remap(76, PIN_REMAP_DEFAULT);
  225. /* init Display Controller */
  226. rt_hw_dc_init();
  227. /* find Display Controller device */
  228. dc = rt_device_find("dc");
  229. /* set Display Controller device as rtgui graphic driver */
  230. rtgui_graphic_set_device(dc);
  231. return 0;
  232. }
  233. INIT_DEVICE_EXPORT(rtgui_lcd_init);
  234. #endif