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EFM32GG
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efm32gg_gpio.h

efm32gg_gpio.h 162 KB
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  1. /**************************************************************************//**
    2. 

  2.  * @file
    3. 

  3.  * @brief efm32gg_gpio Register and Bit Field definitions
    4. 

  4.  * @author Energy Micro AS
    5. 

  5.  * @version 3.0.0
    6. 

  6.  ******************************************************************************
    7. 

  7.  * @section License
    8. 

  8.  * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
    9. 

  9.  ******************************************************************************
    10. 

  10.  *
    11. 

  11.  * Permission is granted to anyone to use this software for any purpose,
    12. 

  12.  * including commercial applications, and to alter it and redistribute it
    13. 

  13.  * freely, subject to the following restrictions:
    14. 

  14.  *
    15. 

  15.  * 1. The origin of this software must not be misrepresented; you must not
    16. 

  16.  *    claim that you wrote the original software.
    17. 

  17.  * 2. Altered source versions must be plainly marked as such, and must not be
    18. 

  18.  *    misrepresented as being the original software.
    19. 

  19.  * 3. This notice may not be removed or altered from any source distribution.
    20. 

  20.  *
    21. 

  21.  * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
    22. 

  22.  * obligation to support this Software. Energy Micro AS is providing the
    23. 

  23.  * Software "AS IS", with no express or implied warranties of any kind,
    24. 

  24.  * including, but not limited to, any implied warranties of merchantability
    25. 

  25.  * or fitness for any particular purpose or warranties against infringement
    26. 

  26.  * of any proprietary rights of a third party.
    27. 

  27.  *
    28. 

  28.  * Energy Micro AS will not be liable for any consequential, incidental, or
    29. 

  29.  * special damages, or any other relief, or for any claim by any third party,
    30. 

  30.  * arising from your use of this Software.
    31. 

  31.  *
    32. 

  32.  *****************************************************************************/
    33. 

  33. /**************************************************************************//**
    34. 

  34.  * @defgroup EFM32GG_GPIO
    35. 

  35.  * @{
    36. 

  36.  * @brief EFM32GG_GPIO Register Declaration
    37. 

  37.  *****************************************************************************/
    38. 

  38. typedef struct
    39. 

  39. {
    40. 

  40.   GPIO_P_TypeDef P[6];          /**< Port configuration bits */
    41. 

  41. 

  42.   uint32_t       RESERVED0[10]; /**< Reserved for future use **/
    43. 

  43.   __IO uint32_t  EXTIPSELL;     /**< External Interrupt Port Select Low Register  */
    44. 

  44.   __IO uint32_t  EXTIPSELH;     /**< External Interrupt Port Select High Register  */
    45. 

  45.   __IO uint32_t  EXTIRISE;      /**< External Interrupt Rising Edge Trigger Register  */
    46. 

  46.   __IO uint32_t  EXTIFALL;      /**< External Interrupt Falling Edge Trigger Register  */
    47. 

  47.   __IO uint32_t  IEN;           /**< Interrupt Enable Register  */
    48. 

  48.   __I uint32_t   IF;            /**< Interrupt Flag Register  */
    49. 

  49.   __IO uint32_t  IFS;           /**< Interrupt Flag Set Register  */
    50. 

  50.   __IO uint32_t  IFC;           /**< Interrupt Flag Clear Register  */
    51. 

  51. 

  52.   __IO uint32_t  ROUTE;         /**< I/O Routing Register  */
    53. 

  53.   __IO uint32_t  INSENSE;       /**< Input Sense Register  */
    54. 

  54.   __IO uint32_t  LOCK;          /**< Configuration Lock Register  */
    55. 

  55.   __IO uint32_t  CTRL;          /**< GPIO Control Register  */
    56. 

  56.   __IO uint32_t  CMD;           /**< GPIO Command Register  */
    57. 

  57.   __IO uint32_t  EM4WUEN;       /**< EM4 Wake-up Enable Register  */
    58. 

  58.   __IO uint32_t  EM4WUPOL;      /**< EM4 Wake-up Polarity Register  */
    59. 

  59.   __I uint32_t   EM4WUCAUSE;    /**< EM4 Wake-up Cause Register  */
    60. 

  60. } GPIO_TypeDef;                 /** @} */
    61. 

  61. 

  62. /**************************************************************************//**
    63. 

  63.  * @defgroup EFM32GG_GPIO_BitFields
    64. 

  64.  * @{
    65. 

  65.  *****************************************************************************/
    66. 

  66. 

  67. /* Bit fields for GPIO P_CTRL */
    68. 

  68. #define _GPIO_P_CTRL_RESETVALUE                           0x00000000UL                           /**< Default value for GPIO_P_CTRL */
    69. 

  69. #define _GPIO_P_CTRL_MASK                                 0x00000003UL                           /**< Mask for GPIO_P_CTRL */
    70. 

  70. #define _GPIO_P_CTRL_DRIVEMODE_SHIFT                      0                                      /**< Shift value for GPIO_DRIVEMODE */
    71. 

  71. #define _GPIO_P_CTRL_DRIVEMODE_MASK                       0x3UL                                  /**< Bit mask for GPIO_DRIVEMODE */
    72. 

  72. #define _GPIO_P_CTRL_DRIVEMODE_DEFAULT                    0x00000000UL                           /**< Mode DEFAULT for GPIO_P_CTRL */
    73. 

  73. #define _GPIO_P_CTRL_DRIVEMODE_STANDARD                   0x00000000UL                           /**< Mode STANDARD for GPIO_P_CTRL */
    74. 

  74. #define _GPIO_P_CTRL_DRIVEMODE_LOWEST                     0x00000001UL                           /**< Mode LOWEST for GPIO_P_CTRL */
    75. 

  75. #define _GPIO_P_CTRL_DRIVEMODE_HIGH                       0x00000002UL                           /**< Mode HIGH for GPIO_P_CTRL */
    76. 

  76. #define _GPIO_P_CTRL_DRIVEMODE_LOW                        0x00000003UL                           /**< Mode LOW for GPIO_P_CTRL */
    77. 

  77. #define GPIO_P_CTRL_DRIVEMODE_DEFAULT                     (_GPIO_P_CTRL_DRIVEMODE_DEFAULT << 0)  /**< Shifted mode DEFAULT for GPIO_P_CTRL */
    78. 

  78. #define GPIO_P_CTRL_DRIVEMODE_STANDARD                    (_GPIO_P_CTRL_DRIVEMODE_STANDARD << 0) /**< Shifted mode STANDARD for GPIO_P_CTRL */
    79. 

  79. #define GPIO_P_CTRL_DRIVEMODE_LOWEST                      (_GPIO_P_CTRL_DRIVEMODE_LOWEST << 0)   /**< Shifted mode LOWEST for GPIO_P_CTRL */
    80. 

  80. #define GPIO_P_CTRL_DRIVEMODE_HIGH                        (_GPIO_P_CTRL_DRIVEMODE_HIGH << 0)     /**< Shifted mode HIGH for GPIO_P_CTRL */
    81. 

  81. #define GPIO_P_CTRL_DRIVEMODE_LOW                         (_GPIO_P_CTRL_DRIVEMODE_LOW << 0)      /**< Shifted mode LOW for GPIO_P_CTRL */
    82. 

  82. 

  83. /* Bit fields for GPIO P_MODEL */
    84. 

  84. #define _GPIO_P_MODEL_RESETVALUE                          0x00000000UL                                          /**< Default value for GPIO_P_MODEL */
    85. 

  85. #define _GPIO_P_MODEL_MASK                                0xFFFFFFFFUL                                          /**< Mask for GPIO_P_MODEL */
    86. 

  86. #define _GPIO_P_MODEL_MODE0_SHIFT                         0                                                     /**< Shift value for GPIO_MODE0 */
    87. 

  87. #define _GPIO_P_MODEL_MODE0_MASK                          0xFUL                                                 /**< Bit mask for GPIO_MODE0 */
    88. 

  88. #define _GPIO_P_MODEL_MODE0_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    89. 

  89. #define _GPIO_P_MODEL_MODE0_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    90. 

  90. #define _GPIO_P_MODEL_MODE0_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    91. 

  91. #define _GPIO_P_MODEL_MODE0_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    92. 

  92. #define _GPIO_P_MODEL_MODE0_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    93. 

  93. #define _GPIO_P_MODEL_MODE0_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    94. 

  94. #define _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    95. 

  95. #define _GPIO_P_MODEL_MODE0_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    96. 

  96. #define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    97. 

  97. #define _GPIO_P_MODEL_MODE0_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    98. 

  98. #define _GPIO_P_MODEL_MODE0_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    99. 

  99. #define _GPIO_P_MODEL_MODE0_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    100. 

  100. #define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    101. 

  101. #define _GPIO_P_MODEL_MODE0_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    102. 

  102. #define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    103. 

  103. #define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    104. 

  104. #define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    105. 

  105. #define GPIO_P_MODEL_MODE0_DEFAULT                        (_GPIO_P_MODEL_MODE0_DEFAULT << 0)                    /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    106. 

  106. #define GPIO_P_MODEL_MODE0_DISABLED                       (_GPIO_P_MODEL_MODE0_DISABLED << 0)                   /**< Shifted mode DISABLED for GPIO_P_MODEL */
    107. 

  107. #define GPIO_P_MODEL_MODE0_INPUT                          (_GPIO_P_MODEL_MODE0_INPUT << 0)                      /**< Shifted mode INPUT for GPIO_P_MODEL */
    108. 

  108. #define GPIO_P_MODEL_MODE0_INPUTPULL                      (_GPIO_P_MODEL_MODE0_INPUTPULL << 0)                  /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    109. 

  109. #define GPIO_P_MODEL_MODE0_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE0_INPUTPULLFILTER << 0)            /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    110. 

  110. #define GPIO_P_MODEL_MODE0_PUSHPULL                       (_GPIO_P_MODEL_MODE0_PUSHPULL << 0)                   /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    111. 

  111. #define GPIO_P_MODEL_MODE0_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE0_PUSHPULLDRIVE << 0)              /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    112. 

  112. #define GPIO_P_MODEL_MODE0_WIREDOR                        (_GPIO_P_MODEL_MODE0_WIREDOR << 0)                    /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    113. 

  113. #define GPIO_P_MODEL_MODE0_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN << 0)            /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    114. 

  114. #define GPIO_P_MODEL_MODE0_WIREDAND                       (_GPIO_P_MODEL_MODE0_WIREDAND << 0)                   /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    115. 

  115. #define GPIO_P_MODEL_MODE0_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE0_WIREDANDFILTER << 0)             /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    116. 

  116. #define GPIO_P_MODEL_MODE0_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE0_WIREDANDPULLUP << 0)             /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    117. 

  117. #define GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER << 0)       /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    118. 

  118. #define GPIO_P_MODEL_MODE0_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE0_WIREDANDDRIVE << 0)              /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    119. 

  119. #define GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER << 0)        /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    120. 

  120. #define GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP << 0)        /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    121. 

  121. #define GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER << 0)  /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    122. 

  122. #define _GPIO_P_MODEL_MODE1_SHIFT                         4                                                     /**< Shift value for GPIO_MODE1 */
    123. 

  123. #define _GPIO_P_MODEL_MODE1_MASK                          0xF0UL                                                /**< Bit mask for GPIO_MODE1 */
    124. 

  124. #define _GPIO_P_MODEL_MODE1_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    125. 

  125. #define _GPIO_P_MODEL_MODE1_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    126. 

  126. #define _GPIO_P_MODEL_MODE1_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    127. 

  127. #define _GPIO_P_MODEL_MODE1_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    128. 

  128. #define _GPIO_P_MODEL_MODE1_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    129. 

  129. #define _GPIO_P_MODEL_MODE1_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    130. 

  130. #define _GPIO_P_MODEL_MODE1_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    131. 

  131. #define _GPIO_P_MODEL_MODE1_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    132. 

  132. #define _GPIO_P_MODEL_MODE1_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    133. 

  133. #define _GPIO_P_MODEL_MODE1_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    134. 

  134. #define _GPIO_P_MODEL_MODE1_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    135. 

  135. #define _GPIO_P_MODEL_MODE1_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    136. 

  136. #define _GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    137. 

  137. #define _GPIO_P_MODEL_MODE1_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    138. 

  138. #define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    139. 

  139. #define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    140. 

  140. #define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    141. 

  141. #define GPIO_P_MODEL_MODE1_DEFAULT                        (_GPIO_P_MODEL_MODE1_DEFAULT << 4)                    /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    142. 

  142. #define GPIO_P_MODEL_MODE1_DISABLED                       (_GPIO_P_MODEL_MODE1_DISABLED << 4)                   /**< Shifted mode DISABLED for GPIO_P_MODEL */
    143. 

  143. #define GPIO_P_MODEL_MODE1_INPUT                          (_GPIO_P_MODEL_MODE1_INPUT << 4)                      /**< Shifted mode INPUT for GPIO_P_MODEL */
    144. 

  144. #define GPIO_P_MODEL_MODE1_INPUTPULL                      (_GPIO_P_MODEL_MODE1_INPUTPULL << 4)                  /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    145. 

  145. #define GPIO_P_MODEL_MODE1_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE1_INPUTPULLFILTER << 4)            /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    146. 

  146. #define GPIO_P_MODEL_MODE1_PUSHPULL                       (_GPIO_P_MODEL_MODE1_PUSHPULL << 4)                   /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    147. 

  147. #define GPIO_P_MODEL_MODE1_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE1_PUSHPULLDRIVE << 4)              /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    148. 

  148. #define GPIO_P_MODEL_MODE1_WIREDOR                        (_GPIO_P_MODEL_MODE1_WIREDOR << 4)                    /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    149. 

  149. #define GPIO_P_MODEL_MODE1_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE1_WIREDORPULLDOWN << 4)            /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    150. 

  150. #define GPIO_P_MODEL_MODE1_WIREDAND                       (_GPIO_P_MODEL_MODE1_WIREDAND << 4)                   /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    151. 

  151. #define GPIO_P_MODEL_MODE1_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE1_WIREDANDFILTER << 4)             /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    152. 

  152. #define GPIO_P_MODEL_MODE1_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE1_WIREDANDPULLUP << 4)             /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    153. 

  153. #define GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER << 4)       /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    154. 

  154. #define GPIO_P_MODEL_MODE1_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE1_WIREDANDDRIVE << 4)              /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    155. 

  155. #define GPIO_P_MODEL_MODE1_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE1_WIREDANDDRIVEFILTER << 4)        /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    156. 

  156. #define GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUP << 4)        /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    157. 

  157. #define GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUPFILTER << 4)  /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    158. 

  158. #define _GPIO_P_MODEL_MODE2_SHIFT                         8                                                     /**< Shift value for GPIO_MODE2 */
    159. 

  159. #define _GPIO_P_MODEL_MODE2_MASK                          0xF00UL                                               /**< Bit mask for GPIO_MODE2 */
    160. 

  160. #define _GPIO_P_MODEL_MODE2_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    161. 

  161. #define _GPIO_P_MODEL_MODE2_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    162. 

  162. #define _GPIO_P_MODEL_MODE2_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    163. 

  163. #define _GPIO_P_MODEL_MODE2_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    164. 

  164. #define _GPIO_P_MODEL_MODE2_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    165. 

  165. #define _GPIO_P_MODEL_MODE2_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    166. 

  166. #define _GPIO_P_MODEL_MODE2_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    167. 

  167. #define _GPIO_P_MODEL_MODE2_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    168. 

  168. #define _GPIO_P_MODEL_MODE2_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    169. 

  169. #define _GPIO_P_MODEL_MODE2_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    170. 

  170. #define _GPIO_P_MODEL_MODE2_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    171. 

  171. #define _GPIO_P_MODEL_MODE2_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    172. 

  172. #define _GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    173. 

  173. #define _GPIO_P_MODEL_MODE2_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    174. 

  174. #define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    175. 

  175. #define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    176. 

  176. #define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    177. 

  177. #define GPIO_P_MODEL_MODE2_DEFAULT                        (_GPIO_P_MODEL_MODE2_DEFAULT << 8)                    /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    178. 

  178. #define GPIO_P_MODEL_MODE2_DISABLED                       (_GPIO_P_MODEL_MODE2_DISABLED << 8)                   /**< Shifted mode DISABLED for GPIO_P_MODEL */
    179. 

  179. #define GPIO_P_MODEL_MODE2_INPUT                          (_GPIO_P_MODEL_MODE2_INPUT << 8)                      /**< Shifted mode INPUT for GPIO_P_MODEL */
    180. 

  180. #define GPIO_P_MODEL_MODE2_INPUTPULL                      (_GPIO_P_MODEL_MODE2_INPUTPULL << 8)                  /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    181. 

  181. #define GPIO_P_MODEL_MODE2_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE2_INPUTPULLFILTER << 8)            /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    182. 

  182. #define GPIO_P_MODEL_MODE2_PUSHPULL                       (_GPIO_P_MODEL_MODE2_PUSHPULL << 8)                   /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    183. 

  183. #define GPIO_P_MODEL_MODE2_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE2_PUSHPULLDRIVE << 8)              /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    184. 

  184. #define GPIO_P_MODEL_MODE2_WIREDOR                        (_GPIO_P_MODEL_MODE2_WIREDOR << 8)                    /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    185. 

  185. #define GPIO_P_MODEL_MODE2_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE2_WIREDORPULLDOWN << 8)            /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    186. 

  186. #define GPIO_P_MODEL_MODE2_WIREDAND                       (_GPIO_P_MODEL_MODE2_WIREDAND << 8)                   /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    187. 

  187. #define GPIO_P_MODEL_MODE2_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE2_WIREDANDFILTER << 8)             /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    188. 

  188. #define GPIO_P_MODEL_MODE2_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE2_WIREDANDPULLUP << 8)             /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    189. 

  189. #define GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER << 8)       /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    190. 

  190. #define GPIO_P_MODEL_MODE2_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE2_WIREDANDDRIVE << 8)              /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    191. 

  191. #define GPIO_P_MODEL_MODE2_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE2_WIREDANDDRIVEFILTER << 8)        /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    192. 

  192. #define GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUP << 8)        /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    193. 

  193. #define GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUPFILTER << 8)  /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    194. 

  194. #define _GPIO_P_MODEL_MODE3_SHIFT                         12                                                    /**< Shift value for GPIO_MODE3 */
    195. 

  195. #define _GPIO_P_MODEL_MODE3_MASK                          0xF000UL                                              /**< Bit mask for GPIO_MODE3 */
    196. 

  196. #define _GPIO_P_MODEL_MODE3_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    197. 

  197. #define _GPIO_P_MODEL_MODE3_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    198. 

  198. #define _GPIO_P_MODEL_MODE3_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    199. 

  199. #define _GPIO_P_MODEL_MODE3_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    200. 

  200. #define _GPIO_P_MODEL_MODE3_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    201. 

  201. #define _GPIO_P_MODEL_MODE3_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    202. 

  202. #define _GPIO_P_MODEL_MODE3_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    203. 

  203. #define _GPIO_P_MODEL_MODE3_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    204. 

  204. #define _GPIO_P_MODEL_MODE3_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    205. 

  205. #define _GPIO_P_MODEL_MODE3_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    206. 

  206. #define _GPIO_P_MODEL_MODE3_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    207. 

  207. #define _GPIO_P_MODEL_MODE3_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    208. 

  208. #define _GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    209. 

  209. #define _GPIO_P_MODEL_MODE3_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    210. 

  210. #define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    211. 

  211. #define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    212. 

  212. #define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    213. 

  213. #define GPIO_P_MODEL_MODE3_DEFAULT                        (_GPIO_P_MODEL_MODE3_DEFAULT << 12)                   /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    214. 

  214. #define GPIO_P_MODEL_MODE3_DISABLED                       (_GPIO_P_MODEL_MODE3_DISABLED << 12)                  /**< Shifted mode DISABLED for GPIO_P_MODEL */
    215. 

  215. #define GPIO_P_MODEL_MODE3_INPUT                          (_GPIO_P_MODEL_MODE3_INPUT << 12)                     /**< Shifted mode INPUT for GPIO_P_MODEL */
    216. 

  216. #define GPIO_P_MODEL_MODE3_INPUTPULL                      (_GPIO_P_MODEL_MODE3_INPUTPULL << 12)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    217. 

  217. #define GPIO_P_MODEL_MODE3_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE3_INPUTPULLFILTER << 12)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    218. 

  218. #define GPIO_P_MODEL_MODE3_PUSHPULL                       (_GPIO_P_MODEL_MODE3_PUSHPULL << 12)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    219. 

  219. #define GPIO_P_MODEL_MODE3_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE3_PUSHPULLDRIVE << 12)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    220. 

  220. #define GPIO_P_MODEL_MODE3_WIREDOR                        (_GPIO_P_MODEL_MODE3_WIREDOR << 12)                   /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    221. 

  221. #define GPIO_P_MODEL_MODE3_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE3_WIREDORPULLDOWN << 12)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    222. 

  222. #define GPIO_P_MODEL_MODE3_WIREDAND                       (_GPIO_P_MODEL_MODE3_WIREDAND << 12)                  /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    223. 

  223. #define GPIO_P_MODEL_MODE3_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE3_WIREDANDFILTER << 12)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    224. 

  224. #define GPIO_P_MODEL_MODE3_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE3_WIREDANDPULLUP << 12)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    225. 

  225. #define GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER << 12)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    226. 

  226. #define GPIO_P_MODEL_MODE3_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE3_WIREDANDDRIVE << 12)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    227. 

  227. #define GPIO_P_MODEL_MODE3_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE3_WIREDANDDRIVEFILTER << 12)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    228. 

  228. #define GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUP << 12)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    229. 

  229. #define GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUPFILTER << 12) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    230. 

  230. #define _GPIO_P_MODEL_MODE4_SHIFT                         16                                                    /**< Shift value for GPIO_MODE4 */
    231. 

  231. #define _GPIO_P_MODEL_MODE4_MASK                          0xF0000UL                                             /**< Bit mask for GPIO_MODE4 */
    232. 

  232. #define _GPIO_P_MODEL_MODE4_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    233. 

  233. #define _GPIO_P_MODEL_MODE4_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    234. 

  234. #define _GPIO_P_MODEL_MODE4_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    235. 

  235. #define _GPIO_P_MODEL_MODE4_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    236. 

  236. #define _GPIO_P_MODEL_MODE4_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    237. 

  237. #define _GPIO_P_MODEL_MODE4_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    238. 

  238. #define _GPIO_P_MODEL_MODE4_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    239. 

  239. #define _GPIO_P_MODEL_MODE4_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    240. 

  240. #define _GPIO_P_MODEL_MODE4_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    241. 

  241. #define _GPIO_P_MODEL_MODE4_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    242. 

  242. #define _GPIO_P_MODEL_MODE4_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    243. 

  243. #define _GPIO_P_MODEL_MODE4_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    244. 

  244. #define _GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    245. 

  245. #define _GPIO_P_MODEL_MODE4_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    246. 

  246. #define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    247. 

  247. #define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    248. 

  248. #define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    249. 

  249. #define GPIO_P_MODEL_MODE4_DEFAULT                        (_GPIO_P_MODEL_MODE4_DEFAULT << 16)                   /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    250. 

  250. #define GPIO_P_MODEL_MODE4_DISABLED                       (_GPIO_P_MODEL_MODE4_DISABLED << 16)                  /**< Shifted mode DISABLED for GPIO_P_MODEL */
    251. 

  251. #define GPIO_P_MODEL_MODE4_INPUT                          (_GPIO_P_MODEL_MODE4_INPUT << 16)                     /**< Shifted mode INPUT for GPIO_P_MODEL */
    252. 

  252. #define GPIO_P_MODEL_MODE4_INPUTPULL                      (_GPIO_P_MODEL_MODE4_INPUTPULL << 16)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    253. 

  253. #define GPIO_P_MODEL_MODE4_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE4_INPUTPULLFILTER << 16)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    254. 

  254. #define GPIO_P_MODEL_MODE4_PUSHPULL                       (_GPIO_P_MODEL_MODE4_PUSHPULL << 16)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    255. 

  255. #define GPIO_P_MODEL_MODE4_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE4_PUSHPULLDRIVE << 16)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    256. 

  256. #define GPIO_P_MODEL_MODE4_WIREDOR                        (_GPIO_P_MODEL_MODE4_WIREDOR << 16)                   /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    257. 

  257. #define GPIO_P_MODEL_MODE4_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE4_WIREDORPULLDOWN << 16)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    258. 

  258. #define GPIO_P_MODEL_MODE4_WIREDAND                       (_GPIO_P_MODEL_MODE4_WIREDAND << 16)                  /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    259. 

  259. #define GPIO_P_MODEL_MODE4_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE4_WIREDANDFILTER << 16)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    260. 

  260. #define GPIO_P_MODEL_MODE4_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE4_WIREDANDPULLUP << 16)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    261. 

  261. #define GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER << 16)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    262. 

  262. #define GPIO_P_MODEL_MODE4_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE4_WIREDANDDRIVE << 16)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    263. 

  263. #define GPIO_P_MODEL_MODE4_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE4_WIREDANDDRIVEFILTER << 16)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    264. 

  264. #define GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUP << 16)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    265. 

  265. #define GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUPFILTER << 16) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    266. 

  266. #define _GPIO_P_MODEL_MODE5_SHIFT                         20                                                    /**< Shift value for GPIO_MODE5 */
    267. 

  267. #define _GPIO_P_MODEL_MODE5_MASK                          0xF00000UL                                            /**< Bit mask for GPIO_MODE5 */
    268. 

  268. #define _GPIO_P_MODEL_MODE5_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    269. 

  269. #define _GPIO_P_MODEL_MODE5_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    270. 

  270. #define _GPIO_P_MODEL_MODE5_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    271. 

  271. #define _GPIO_P_MODEL_MODE5_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    272. 

  272. #define _GPIO_P_MODEL_MODE5_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    273. 

  273. #define _GPIO_P_MODEL_MODE5_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    274. 

  274. #define _GPIO_P_MODEL_MODE5_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    275. 

  275. #define _GPIO_P_MODEL_MODE5_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    276. 

  276. #define _GPIO_P_MODEL_MODE5_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    277. 

  277. #define _GPIO_P_MODEL_MODE5_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    278. 

  278. #define _GPIO_P_MODEL_MODE5_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    279. 

  279. #define _GPIO_P_MODEL_MODE5_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    280. 

  280. #define _GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    281. 

  281. #define _GPIO_P_MODEL_MODE5_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    282. 

  282. #define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    283. 

  283. #define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    284. 

  284. #define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    285. 

  285. #define GPIO_P_MODEL_MODE5_DEFAULT                        (_GPIO_P_MODEL_MODE5_DEFAULT << 20)                   /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    286. 

  286. #define GPIO_P_MODEL_MODE5_DISABLED                       (_GPIO_P_MODEL_MODE5_DISABLED << 20)                  /**< Shifted mode DISABLED for GPIO_P_MODEL */
    287. 

  287. #define GPIO_P_MODEL_MODE5_INPUT                          (_GPIO_P_MODEL_MODE5_INPUT << 20)                     /**< Shifted mode INPUT for GPIO_P_MODEL */
    288. 

  288. #define GPIO_P_MODEL_MODE5_INPUTPULL                      (_GPIO_P_MODEL_MODE5_INPUTPULL << 20)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    289. 

  289. #define GPIO_P_MODEL_MODE5_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE5_INPUTPULLFILTER << 20)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    290. 

  290. #define GPIO_P_MODEL_MODE5_PUSHPULL                       (_GPIO_P_MODEL_MODE5_PUSHPULL << 20)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    291. 

  291. #define GPIO_P_MODEL_MODE5_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE5_PUSHPULLDRIVE << 20)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    292. 

  292. #define GPIO_P_MODEL_MODE5_WIREDOR                        (_GPIO_P_MODEL_MODE5_WIREDOR << 20)                   /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    293. 

  293. #define GPIO_P_MODEL_MODE5_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE5_WIREDORPULLDOWN << 20)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    294. 

  294. #define GPIO_P_MODEL_MODE5_WIREDAND                       (_GPIO_P_MODEL_MODE5_WIREDAND << 20)                  /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    295. 

  295. #define GPIO_P_MODEL_MODE5_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE5_WIREDANDFILTER << 20)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    296. 

  296. #define GPIO_P_MODEL_MODE5_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE5_WIREDANDPULLUP << 20)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    297. 

  297. #define GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER << 20)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    298. 

  298. #define GPIO_P_MODEL_MODE5_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE5_WIREDANDDRIVE << 20)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    299. 

  299. #define GPIO_P_MODEL_MODE5_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE5_WIREDANDDRIVEFILTER << 20)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    300. 

  300. #define GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUP << 20)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    301. 

  301. #define GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUPFILTER << 20) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    302. 

  302. #define _GPIO_P_MODEL_MODE6_SHIFT                         24                                                    /**< Shift value for GPIO_MODE6 */
    303. 

  303. #define _GPIO_P_MODEL_MODE6_MASK                          0xF000000UL                                           /**< Bit mask for GPIO_MODE6 */
    304. 

  304. #define _GPIO_P_MODEL_MODE6_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    305. 

  305. #define _GPIO_P_MODEL_MODE6_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    306. 

  306. #define _GPIO_P_MODEL_MODE6_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    307. 

  307. #define _GPIO_P_MODEL_MODE6_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    308. 

  308. #define _GPIO_P_MODEL_MODE6_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    309. 

  309. #define _GPIO_P_MODEL_MODE6_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    310. 

  310. #define _GPIO_P_MODEL_MODE6_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    311. 

  311. #define _GPIO_P_MODEL_MODE6_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    312. 

  312. #define _GPIO_P_MODEL_MODE6_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    313. 

  313. #define _GPIO_P_MODEL_MODE6_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    314. 

  314. #define _GPIO_P_MODEL_MODE6_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    315. 

  315. #define _GPIO_P_MODEL_MODE6_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    316. 

  316. #define _GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    317. 

  317. #define _GPIO_P_MODEL_MODE6_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    318. 

  318. #define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    319. 

  319. #define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    320. 

  320. #define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    321. 

  321. #define GPIO_P_MODEL_MODE6_DEFAULT                        (_GPIO_P_MODEL_MODE6_DEFAULT << 24)                   /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    322. 

  322. #define GPIO_P_MODEL_MODE6_DISABLED                       (_GPIO_P_MODEL_MODE6_DISABLED << 24)                  /**< Shifted mode DISABLED for GPIO_P_MODEL */
    323. 

  323. #define GPIO_P_MODEL_MODE6_INPUT                          (_GPIO_P_MODEL_MODE6_INPUT << 24)                     /**< Shifted mode INPUT for GPIO_P_MODEL */
    324. 

  324. #define GPIO_P_MODEL_MODE6_INPUTPULL                      (_GPIO_P_MODEL_MODE6_INPUTPULL << 24)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    325. 

  325. #define GPIO_P_MODEL_MODE6_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE6_INPUTPULLFILTER << 24)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    326. 

  326. #define GPIO_P_MODEL_MODE6_PUSHPULL                       (_GPIO_P_MODEL_MODE6_PUSHPULL << 24)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    327. 

  327. #define GPIO_P_MODEL_MODE6_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE6_PUSHPULLDRIVE << 24)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    328. 

  328. #define GPIO_P_MODEL_MODE6_WIREDOR                        (_GPIO_P_MODEL_MODE6_WIREDOR << 24)                   /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    329. 

  329. #define GPIO_P_MODEL_MODE6_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE6_WIREDORPULLDOWN << 24)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    330. 

  330. #define GPIO_P_MODEL_MODE6_WIREDAND                       (_GPIO_P_MODEL_MODE6_WIREDAND << 24)                  /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    331. 

  331. #define GPIO_P_MODEL_MODE6_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE6_WIREDANDFILTER << 24)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    332. 

  332. #define GPIO_P_MODEL_MODE6_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE6_WIREDANDPULLUP << 24)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    333. 

  333. #define GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER << 24)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    334. 

  334. #define GPIO_P_MODEL_MODE6_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE6_WIREDANDDRIVE << 24)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    335. 

  335. #define GPIO_P_MODEL_MODE6_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE6_WIREDANDDRIVEFILTER << 24)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    336. 

  336. #define GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUP << 24)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    337. 

  337. #define GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUPFILTER << 24) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    338. 

  338. #define _GPIO_P_MODEL_MODE7_SHIFT                         28                                                    /**< Shift value for GPIO_MODE7 */
    339. 

  339. #define _GPIO_P_MODEL_MODE7_MASK                          0xF0000000UL                                          /**< Bit mask for GPIO_MODE7 */
    340. 

  340. #define _GPIO_P_MODEL_MODE7_DEFAULT                       0x00000000UL                                          /**< Mode DEFAULT for GPIO_P_MODEL */
    341. 

  341. #define _GPIO_P_MODEL_MODE7_DISABLED                      0x00000000UL                                          /**< Mode DISABLED for GPIO_P_MODEL */
    342. 

  342. #define _GPIO_P_MODEL_MODE7_INPUT                         0x00000001UL                                          /**< Mode INPUT for GPIO_P_MODEL */
    343. 

  343. #define _GPIO_P_MODEL_MODE7_INPUTPULL                     0x00000002UL                                          /**< Mode INPUTPULL for GPIO_P_MODEL */
    344. 

  344. #define _GPIO_P_MODEL_MODE7_INPUTPULLFILTER               0x00000003UL                                          /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
    345. 

  345. #define _GPIO_P_MODEL_MODE7_PUSHPULL                      0x00000004UL                                          /**< Mode PUSHPULL for GPIO_P_MODEL */
    346. 

  346. #define _GPIO_P_MODEL_MODE7_PUSHPULLDRIVE                 0x00000005UL                                          /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
    347. 

  347. #define _GPIO_P_MODEL_MODE7_WIREDOR                       0x00000006UL                                          /**< Mode WIREDOR for GPIO_P_MODEL */
    348. 

  348. #define _GPIO_P_MODEL_MODE7_WIREDORPULLDOWN               0x00000007UL                                          /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
    349. 

  349. #define _GPIO_P_MODEL_MODE7_WIREDAND                      0x00000008UL                                          /**< Mode WIREDAND for GPIO_P_MODEL */
    350. 

  350. #define _GPIO_P_MODEL_MODE7_WIREDANDFILTER                0x00000009UL                                          /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
    351. 

  351. #define _GPIO_P_MODEL_MODE7_WIREDANDPULLUP                0x0000000AUL                                          /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
    352. 

  352. #define _GPIO_P_MODEL_MODE7_WIREDANDPULLUPFILTER          0x0000000BUL                                          /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    353. 

  353. #define _GPIO_P_MODEL_MODE7_WIREDANDDRIVE                 0x0000000CUL                                          /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
    354. 

  354. #define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEFILTER           0x0000000DUL                                          /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    355. 

  355. #define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUP           0x0000000EUL                                          /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    356. 

  356. #define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                          /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    357. 

  357. #define GPIO_P_MODEL_MODE7_DEFAULT                        (_GPIO_P_MODEL_MODE7_DEFAULT << 28)                   /**< Shifted mode DEFAULT for GPIO_P_MODEL */
    358. 

  358. #define GPIO_P_MODEL_MODE7_DISABLED                       (_GPIO_P_MODEL_MODE7_DISABLED << 28)                  /**< Shifted mode DISABLED for GPIO_P_MODEL */
    359. 

  359. #define GPIO_P_MODEL_MODE7_INPUT                          (_GPIO_P_MODEL_MODE7_INPUT << 28)                     /**< Shifted mode INPUT for GPIO_P_MODEL */
    360. 

  360. #define GPIO_P_MODEL_MODE7_INPUTPULL                      (_GPIO_P_MODEL_MODE7_INPUTPULL << 28)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
    361. 

  361. #define GPIO_P_MODEL_MODE7_INPUTPULLFILTER                (_GPIO_P_MODEL_MODE7_INPUTPULLFILTER << 28)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
    362. 

  362. #define GPIO_P_MODEL_MODE7_PUSHPULL                       (_GPIO_P_MODEL_MODE7_PUSHPULL << 28)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
    363. 

  363. #define GPIO_P_MODEL_MODE7_PUSHPULLDRIVE                  (_GPIO_P_MODEL_MODE7_PUSHPULLDRIVE << 28)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
    364. 

  364. #define GPIO_P_MODEL_MODE7_WIREDOR                        (_GPIO_P_MODEL_MODE7_WIREDOR << 28)                   /**< Shifted mode WIREDOR for GPIO_P_MODEL */
    365. 

  365. #define GPIO_P_MODEL_MODE7_WIREDORPULLDOWN                (_GPIO_P_MODEL_MODE7_WIREDORPULLDOWN << 28)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
    366. 

  366. #define GPIO_P_MODEL_MODE7_WIREDAND                       (_GPIO_P_MODEL_MODE7_WIREDAND << 28)                  /**< Shifted mode WIREDAND for GPIO_P_MODEL */
    367. 

  367. #define GPIO_P_MODEL_MODE7_WIREDANDFILTER                 (_GPIO_P_MODEL_MODE7_WIREDANDFILTER << 28)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
    368. 

  368. #define GPIO_P_MODEL_MODE7_WIREDANDPULLUP                 (_GPIO_P_MODEL_MODE7_WIREDANDPULLUP << 28)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
    369. 

  369. #define GPIO_P_MODEL_MODE7_WIREDANDPULLUPFILTER           (_GPIO_P_MODEL_MODE7_WIREDANDPULLUPFILTER << 28)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
    370. 

  370. #define GPIO_P_MODEL_MODE7_WIREDANDDRIVE                  (_GPIO_P_MODEL_MODE7_WIREDANDDRIVE << 28)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
    371. 

  371. #define GPIO_P_MODEL_MODE7_WIREDANDDRIVEFILTER            (_GPIO_P_MODEL_MODE7_WIREDANDDRIVEFILTER << 28)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
    372. 

  372. #define GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUP << 28)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
    373. 

  373. #define GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUPFILTER << 28) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
    374. 

  374. 

  375. /* Bit fields for GPIO P_MODEH */
    376. 

  376. #define _GPIO_P_MODEH_RESETVALUE                          0x00000000UL                                           /**< Default value for GPIO_P_MODEH */
    377. 

  377. #define _GPIO_P_MODEH_MASK                                0xFFFFFFFFUL                                           /**< Mask for GPIO_P_MODEH */
    378. 

  378. #define _GPIO_P_MODEH_MODE8_SHIFT                         0                                                      /**< Shift value for GPIO_MODE8 */
    379. 

  379. #define _GPIO_P_MODEH_MODE8_MASK                          0xFUL                                                  /**< Bit mask for GPIO_MODE8 */
    380. 

  380. #define _GPIO_P_MODEH_MODE8_DEFAULT                       0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    381. 

  381. #define _GPIO_P_MODEH_MODE8_DISABLED                      0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    382. 

  382. #define _GPIO_P_MODEH_MODE8_INPUT                         0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    383. 

  383. #define _GPIO_P_MODEH_MODE8_INPUTPULL                     0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    384. 

  384. #define _GPIO_P_MODEH_MODE8_INPUTPULLFILTER               0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    385. 

  385. #define _GPIO_P_MODEH_MODE8_PUSHPULL                      0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    386. 

  386. #define _GPIO_P_MODEH_MODE8_PUSHPULLDRIVE                 0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    387. 

  387. #define _GPIO_P_MODEH_MODE8_WIREDOR                       0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    388. 

  388. #define _GPIO_P_MODEH_MODE8_WIREDORPULLDOWN               0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    389. 

  389. #define _GPIO_P_MODEH_MODE8_WIREDAND                      0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    390. 

  390. #define _GPIO_P_MODEH_MODE8_WIREDANDFILTER                0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    391. 

  391. #define _GPIO_P_MODEH_MODE8_WIREDANDPULLUP                0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    392. 

  392. #define _GPIO_P_MODEH_MODE8_WIREDANDPULLUPFILTER          0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    393. 

  393. #define _GPIO_P_MODEH_MODE8_WIREDANDDRIVE                 0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    394. 

  394. #define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEFILTER           0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    395. 

  395. #define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUP           0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    396. 

  396. #define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    397. 

  397. #define GPIO_P_MODEH_MODE8_DEFAULT                        (_GPIO_P_MODEH_MODE8_DEFAULT << 0)                     /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    398. 

  398. #define GPIO_P_MODEH_MODE8_DISABLED                       (_GPIO_P_MODEH_MODE8_DISABLED << 0)                    /**< Shifted mode DISABLED for GPIO_P_MODEH */
    399. 

  399. #define GPIO_P_MODEH_MODE8_INPUT                          (_GPIO_P_MODEH_MODE8_INPUT << 0)                       /**< Shifted mode INPUT for GPIO_P_MODEH */
    400. 

  400. #define GPIO_P_MODEH_MODE8_INPUTPULL                      (_GPIO_P_MODEH_MODE8_INPUTPULL << 0)                   /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    401. 

  401. #define GPIO_P_MODEH_MODE8_INPUTPULLFILTER                (_GPIO_P_MODEH_MODE8_INPUTPULLFILTER << 0)             /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    402. 

  402. #define GPIO_P_MODEH_MODE8_PUSHPULL                       (_GPIO_P_MODEH_MODE8_PUSHPULL << 0)                    /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    403. 

  403. #define GPIO_P_MODEH_MODE8_PUSHPULLDRIVE                  (_GPIO_P_MODEH_MODE8_PUSHPULLDRIVE << 0)               /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    404. 

  404. #define GPIO_P_MODEH_MODE8_WIREDOR                        (_GPIO_P_MODEH_MODE8_WIREDOR << 0)                     /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    405. 

  405. #define GPIO_P_MODEH_MODE8_WIREDORPULLDOWN                (_GPIO_P_MODEH_MODE8_WIREDORPULLDOWN << 0)             /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    406. 

  406. #define GPIO_P_MODEH_MODE8_WIREDAND                       (_GPIO_P_MODEH_MODE8_WIREDAND << 0)                    /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    407. 

  407. #define GPIO_P_MODEH_MODE8_WIREDANDFILTER                 (_GPIO_P_MODEH_MODE8_WIREDANDFILTER << 0)              /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    408. 

  408. #define GPIO_P_MODEH_MODE8_WIREDANDPULLUP                 (_GPIO_P_MODEH_MODE8_WIREDANDPULLUP << 0)              /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    409. 

  409. #define GPIO_P_MODEH_MODE8_WIREDANDPULLUPFILTER           (_GPIO_P_MODEH_MODE8_WIREDANDPULLUPFILTER << 0)        /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    410. 

  410. #define GPIO_P_MODEH_MODE8_WIREDANDDRIVE                  (_GPIO_P_MODEH_MODE8_WIREDANDDRIVE << 0)               /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    411. 

  411. #define GPIO_P_MODEH_MODE8_WIREDANDDRIVEFILTER            (_GPIO_P_MODEH_MODE8_WIREDANDDRIVEFILTER << 0)         /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    412. 

  412. #define GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUP << 0)         /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    413. 

  413. #define GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUPFILTER << 0)   /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    414. 

  414. #define _GPIO_P_MODEH_MODE9_SHIFT                         4                                                      /**< Shift value for GPIO_MODE9 */
    415. 

  415. #define _GPIO_P_MODEH_MODE9_MASK                          0xF0UL                                                 /**< Bit mask for GPIO_MODE9 */
    416. 

  416. #define _GPIO_P_MODEH_MODE9_DEFAULT                       0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    417. 

  417. #define _GPIO_P_MODEH_MODE9_DISABLED                      0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    418. 

  418. #define _GPIO_P_MODEH_MODE9_INPUT                         0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    419. 

  419. #define _GPIO_P_MODEH_MODE9_INPUTPULL                     0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    420. 

  420. #define _GPIO_P_MODEH_MODE9_INPUTPULLFILTER               0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    421. 

  421. #define _GPIO_P_MODEH_MODE9_PUSHPULL                      0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    422. 

  422. #define _GPIO_P_MODEH_MODE9_PUSHPULLDRIVE                 0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    423. 

  423. #define _GPIO_P_MODEH_MODE9_WIREDOR                       0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    424. 

  424. #define _GPIO_P_MODEH_MODE9_WIREDORPULLDOWN               0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    425. 

  425. #define _GPIO_P_MODEH_MODE9_WIREDAND                      0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    426. 

  426. #define _GPIO_P_MODEH_MODE9_WIREDANDFILTER                0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    427. 

  427. #define _GPIO_P_MODEH_MODE9_WIREDANDPULLUP                0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    428. 

  428. #define _GPIO_P_MODEH_MODE9_WIREDANDPULLUPFILTER          0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    429. 

  429. #define _GPIO_P_MODEH_MODE9_WIREDANDDRIVE                 0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    430. 

  430. #define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEFILTER           0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    431. 

  431. #define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUP           0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    432. 

  432. #define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUPFILTER     0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    433. 

  433. #define GPIO_P_MODEH_MODE9_DEFAULT                        (_GPIO_P_MODEH_MODE9_DEFAULT << 4)                     /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    434. 

  434. #define GPIO_P_MODEH_MODE9_DISABLED                       (_GPIO_P_MODEH_MODE9_DISABLED << 4)                    /**< Shifted mode DISABLED for GPIO_P_MODEH */
    435. 

  435. #define GPIO_P_MODEH_MODE9_INPUT                          (_GPIO_P_MODEH_MODE9_INPUT << 4)                       /**< Shifted mode INPUT for GPIO_P_MODEH */
    436. 

  436. #define GPIO_P_MODEH_MODE9_INPUTPULL                      (_GPIO_P_MODEH_MODE9_INPUTPULL << 4)                   /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    437. 

  437. #define GPIO_P_MODEH_MODE9_INPUTPULLFILTER                (_GPIO_P_MODEH_MODE9_INPUTPULLFILTER << 4)             /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    438. 

  438. #define GPIO_P_MODEH_MODE9_PUSHPULL                       (_GPIO_P_MODEH_MODE9_PUSHPULL << 4)                    /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    439. 

  439. #define GPIO_P_MODEH_MODE9_PUSHPULLDRIVE                  (_GPIO_P_MODEH_MODE9_PUSHPULLDRIVE << 4)               /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    440. 

  440. #define GPIO_P_MODEH_MODE9_WIREDOR                        (_GPIO_P_MODEH_MODE9_WIREDOR << 4)                     /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    441. 

  441. #define GPIO_P_MODEH_MODE9_WIREDORPULLDOWN                (_GPIO_P_MODEH_MODE9_WIREDORPULLDOWN << 4)             /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    442. 

  442. #define GPIO_P_MODEH_MODE9_WIREDAND                       (_GPIO_P_MODEH_MODE9_WIREDAND << 4)                    /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    443. 

  443. #define GPIO_P_MODEH_MODE9_WIREDANDFILTER                 (_GPIO_P_MODEH_MODE9_WIREDANDFILTER << 4)              /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    444. 

  444. #define GPIO_P_MODEH_MODE9_WIREDANDPULLUP                 (_GPIO_P_MODEH_MODE9_WIREDANDPULLUP << 4)              /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    445. 

  445. #define GPIO_P_MODEH_MODE9_WIREDANDPULLUPFILTER           (_GPIO_P_MODEH_MODE9_WIREDANDPULLUPFILTER << 4)        /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    446. 

  446. #define GPIO_P_MODEH_MODE9_WIREDANDDRIVE                  (_GPIO_P_MODEH_MODE9_WIREDANDDRIVE << 4)               /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    447. 

  447. #define GPIO_P_MODEH_MODE9_WIREDANDDRIVEFILTER            (_GPIO_P_MODEH_MODE9_WIREDANDDRIVEFILTER << 4)         /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    448. 

  448. #define GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUP            (_GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUP << 4)         /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    449. 

  449. #define GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUPFILTER      (_GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUPFILTER << 4)   /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    450. 

  450. #define _GPIO_P_MODEH_MODE10_SHIFT                        8                                                      /**< Shift value for GPIO_MODE10 */
    451. 

  451. #define _GPIO_P_MODEH_MODE10_MASK                         0xF00UL                                                /**< Bit mask for GPIO_MODE10 */
    452. 

  452. #define _GPIO_P_MODEH_MODE10_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    453. 

  453. #define _GPIO_P_MODEH_MODE10_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    454. 

  454. #define _GPIO_P_MODEH_MODE10_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    455. 

  455. #define _GPIO_P_MODEH_MODE10_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    456. 

  456. #define _GPIO_P_MODEH_MODE10_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    457. 

  457. #define _GPIO_P_MODEH_MODE10_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    458. 

  458. #define _GPIO_P_MODEH_MODE10_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    459. 

  459. #define _GPIO_P_MODEH_MODE10_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    460. 

  460. #define _GPIO_P_MODEH_MODE10_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    461. 

  461. #define _GPIO_P_MODEH_MODE10_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    462. 

  462. #define _GPIO_P_MODEH_MODE10_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    463. 

  463. #define _GPIO_P_MODEH_MODE10_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    464. 

  464. #define _GPIO_P_MODEH_MODE10_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    465. 

  465. #define _GPIO_P_MODEH_MODE10_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    466. 

  466. #define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    467. 

  467. #define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    468. 

  468. #define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    469. 

  469. #define GPIO_P_MODEH_MODE10_DEFAULT                       (_GPIO_P_MODEH_MODE10_DEFAULT << 8)                    /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    470. 

  470. #define GPIO_P_MODEH_MODE10_DISABLED                      (_GPIO_P_MODEH_MODE10_DISABLED << 8)                   /**< Shifted mode DISABLED for GPIO_P_MODEH */
    471. 

  471. #define GPIO_P_MODEH_MODE10_INPUT                         (_GPIO_P_MODEH_MODE10_INPUT << 8)                      /**< Shifted mode INPUT for GPIO_P_MODEH */
    472. 

  472. #define GPIO_P_MODEH_MODE10_INPUTPULL                     (_GPIO_P_MODEH_MODE10_INPUTPULL << 8)                  /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    473. 

  473. #define GPIO_P_MODEH_MODE10_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE10_INPUTPULLFILTER << 8)            /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    474. 

  474. #define GPIO_P_MODEH_MODE10_PUSHPULL                      (_GPIO_P_MODEH_MODE10_PUSHPULL << 8)                   /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    475. 

  475. #define GPIO_P_MODEH_MODE10_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE10_PUSHPULLDRIVE << 8)              /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    476. 

  476. #define GPIO_P_MODEH_MODE10_WIREDOR                       (_GPIO_P_MODEH_MODE10_WIREDOR << 8)                    /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    477. 

  477. #define GPIO_P_MODEH_MODE10_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE10_WIREDORPULLDOWN << 8)            /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    478. 

  478. #define GPIO_P_MODEH_MODE10_WIREDAND                      (_GPIO_P_MODEH_MODE10_WIREDAND << 8)                   /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    479. 

  479. #define GPIO_P_MODEH_MODE10_WIREDANDFILTER                (_GPIO_P_MODEH_MODE10_WIREDANDFILTER << 8)             /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    480. 

  480. #define GPIO_P_MODEH_MODE10_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE10_WIREDANDPULLUP << 8)             /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    481. 

  481. #define GPIO_P_MODEH_MODE10_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE10_WIREDANDPULLUPFILTER << 8)       /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    482. 

  482. #define GPIO_P_MODEH_MODE10_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE10_WIREDANDDRIVE << 8)              /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    483. 

  483. #define GPIO_P_MODEH_MODE10_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE10_WIREDANDDRIVEFILTER << 8)        /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    484. 

  484. #define GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUP << 8)        /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    485. 

  485. #define GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUPFILTER << 8)  /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    486. 

  486. #define _GPIO_P_MODEH_MODE11_SHIFT                        12                                                     /**< Shift value for GPIO_MODE11 */
    487. 

  487. #define _GPIO_P_MODEH_MODE11_MASK                         0xF000UL                                               /**< Bit mask for GPIO_MODE11 */
    488. 

  488. #define _GPIO_P_MODEH_MODE11_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    489. 

  489. #define _GPIO_P_MODEH_MODE11_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    490. 

  490. #define _GPIO_P_MODEH_MODE11_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    491. 

  491. #define _GPIO_P_MODEH_MODE11_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    492. 

  492. #define _GPIO_P_MODEH_MODE11_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    493. 

  493. #define _GPIO_P_MODEH_MODE11_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    494. 

  494. #define _GPIO_P_MODEH_MODE11_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    495. 

  495. #define _GPIO_P_MODEH_MODE11_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    496. 

  496. #define _GPIO_P_MODEH_MODE11_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    497. 

  497. #define _GPIO_P_MODEH_MODE11_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    498. 

  498. #define _GPIO_P_MODEH_MODE11_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    499. 

  499. #define _GPIO_P_MODEH_MODE11_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    500. 

  500. #define _GPIO_P_MODEH_MODE11_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    501. 

  501. #define _GPIO_P_MODEH_MODE11_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    502. 

  502. #define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    503. 

  503. #define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    504. 

  504. #define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    505. 

  505. #define GPIO_P_MODEH_MODE11_DEFAULT                       (_GPIO_P_MODEH_MODE11_DEFAULT << 12)                   /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    506. 

  506. #define GPIO_P_MODEH_MODE11_DISABLED                      (_GPIO_P_MODEH_MODE11_DISABLED << 12)                  /**< Shifted mode DISABLED for GPIO_P_MODEH */
    507. 

  507. #define GPIO_P_MODEH_MODE11_INPUT                         (_GPIO_P_MODEH_MODE11_INPUT << 12)                     /**< Shifted mode INPUT for GPIO_P_MODEH */
    508. 

  508. #define GPIO_P_MODEH_MODE11_INPUTPULL                     (_GPIO_P_MODEH_MODE11_INPUTPULL << 12)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    509. 

  509. #define GPIO_P_MODEH_MODE11_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE11_INPUTPULLFILTER << 12)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    510. 

  510. #define GPIO_P_MODEH_MODE11_PUSHPULL                      (_GPIO_P_MODEH_MODE11_PUSHPULL << 12)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    511. 

  511. #define GPIO_P_MODEH_MODE11_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE11_PUSHPULLDRIVE << 12)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    512. 

  512. #define GPIO_P_MODEH_MODE11_WIREDOR                       (_GPIO_P_MODEH_MODE11_WIREDOR << 12)                   /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    513. 

  513. #define GPIO_P_MODEH_MODE11_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE11_WIREDORPULLDOWN << 12)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    514. 

  514. #define GPIO_P_MODEH_MODE11_WIREDAND                      (_GPIO_P_MODEH_MODE11_WIREDAND << 12)                  /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    515. 

  515. #define GPIO_P_MODEH_MODE11_WIREDANDFILTER                (_GPIO_P_MODEH_MODE11_WIREDANDFILTER << 12)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    516. 

  516. #define GPIO_P_MODEH_MODE11_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE11_WIREDANDPULLUP << 12)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    517. 

  517. #define GPIO_P_MODEH_MODE11_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE11_WIREDANDPULLUPFILTER << 12)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    518. 

  518. #define GPIO_P_MODEH_MODE11_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE11_WIREDANDDRIVE << 12)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    519. 

  519. #define GPIO_P_MODEH_MODE11_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE11_WIREDANDDRIVEFILTER << 12)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    520. 

  520. #define GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUP << 12)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    521. 

  521. #define GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUPFILTER << 12) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    522. 

  522. #define _GPIO_P_MODEH_MODE12_SHIFT                        16                                                     /**< Shift value for GPIO_MODE12 */
    523. 

  523. #define _GPIO_P_MODEH_MODE12_MASK                         0xF0000UL                                              /**< Bit mask for GPIO_MODE12 */
    524. 

  524. #define _GPIO_P_MODEH_MODE12_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    525. 

  525. #define _GPIO_P_MODEH_MODE12_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    526. 

  526. #define _GPIO_P_MODEH_MODE12_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    527. 

  527. #define _GPIO_P_MODEH_MODE12_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    528. 

  528. #define _GPIO_P_MODEH_MODE12_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    529. 

  529. #define _GPIO_P_MODEH_MODE12_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    530. 

  530. #define _GPIO_P_MODEH_MODE12_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    531. 

  531. #define _GPIO_P_MODEH_MODE12_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    532. 

  532. #define _GPIO_P_MODEH_MODE12_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    533. 

  533. #define _GPIO_P_MODEH_MODE12_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    534. 

  534. #define _GPIO_P_MODEH_MODE12_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    535. 

  535. #define _GPIO_P_MODEH_MODE12_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    536. 

  536. #define _GPIO_P_MODEH_MODE12_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    537. 

  537. #define _GPIO_P_MODEH_MODE12_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    538. 

  538. #define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    539. 

  539. #define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    540. 

  540. #define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    541. 

  541. #define GPIO_P_MODEH_MODE12_DEFAULT                       (_GPIO_P_MODEH_MODE12_DEFAULT << 16)                   /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    542. 

  542. #define GPIO_P_MODEH_MODE12_DISABLED                      (_GPIO_P_MODEH_MODE12_DISABLED << 16)                  /**< Shifted mode DISABLED for GPIO_P_MODEH */
    543. 

  543. #define GPIO_P_MODEH_MODE12_INPUT                         (_GPIO_P_MODEH_MODE12_INPUT << 16)                     /**< Shifted mode INPUT for GPIO_P_MODEH */
    544. 

  544. #define GPIO_P_MODEH_MODE12_INPUTPULL                     (_GPIO_P_MODEH_MODE12_INPUTPULL << 16)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    545. 

  545. #define GPIO_P_MODEH_MODE12_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE12_INPUTPULLFILTER << 16)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    546. 

  546. #define GPIO_P_MODEH_MODE12_PUSHPULL                      (_GPIO_P_MODEH_MODE12_PUSHPULL << 16)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    547. 

  547. #define GPIO_P_MODEH_MODE12_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE12_PUSHPULLDRIVE << 16)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    548. 

  548. #define GPIO_P_MODEH_MODE12_WIREDOR                       (_GPIO_P_MODEH_MODE12_WIREDOR << 16)                   /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    549. 

  549. #define GPIO_P_MODEH_MODE12_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE12_WIREDORPULLDOWN << 16)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    550. 

  550. #define GPIO_P_MODEH_MODE12_WIREDAND                      (_GPIO_P_MODEH_MODE12_WIREDAND << 16)                  /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    551. 

  551. #define GPIO_P_MODEH_MODE12_WIREDANDFILTER                (_GPIO_P_MODEH_MODE12_WIREDANDFILTER << 16)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    552. 

  552. #define GPIO_P_MODEH_MODE12_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE12_WIREDANDPULLUP << 16)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    553. 

  553. #define GPIO_P_MODEH_MODE12_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE12_WIREDANDPULLUPFILTER << 16)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    554. 

  554. #define GPIO_P_MODEH_MODE12_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE12_WIREDANDDRIVE << 16)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    555. 

  555. #define GPIO_P_MODEH_MODE12_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE12_WIREDANDDRIVEFILTER << 16)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    556. 

  556. #define GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUP << 16)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    557. 

  557. #define GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUPFILTER << 16) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    558. 

  558. #define _GPIO_P_MODEH_MODE13_SHIFT                        20                                                     /**< Shift value for GPIO_MODE13 */
    559. 

  559. #define _GPIO_P_MODEH_MODE13_MASK                         0xF00000UL                                             /**< Bit mask for GPIO_MODE13 */
    560. 

  560. #define _GPIO_P_MODEH_MODE13_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    561. 

  561. #define _GPIO_P_MODEH_MODE13_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    562. 

  562. #define _GPIO_P_MODEH_MODE13_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    563. 

  563. #define _GPIO_P_MODEH_MODE13_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    564. 

  564. #define _GPIO_P_MODEH_MODE13_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    565. 

  565. #define _GPIO_P_MODEH_MODE13_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    566. 

  566. #define _GPIO_P_MODEH_MODE13_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    567. 

  567. #define _GPIO_P_MODEH_MODE13_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    568. 

  568. #define _GPIO_P_MODEH_MODE13_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    569. 

  569. #define _GPIO_P_MODEH_MODE13_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    570. 

  570. #define _GPIO_P_MODEH_MODE13_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    571. 

  571. #define _GPIO_P_MODEH_MODE13_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    572. 

  572. #define _GPIO_P_MODEH_MODE13_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    573. 

  573. #define _GPIO_P_MODEH_MODE13_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    574. 

  574. #define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    575. 

  575. #define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    576. 

  576. #define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    577. 

  577. #define GPIO_P_MODEH_MODE13_DEFAULT                       (_GPIO_P_MODEH_MODE13_DEFAULT << 20)                   /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    578. 

  578. #define GPIO_P_MODEH_MODE13_DISABLED                      (_GPIO_P_MODEH_MODE13_DISABLED << 20)                  /**< Shifted mode DISABLED for GPIO_P_MODEH */
    579. 

  579. #define GPIO_P_MODEH_MODE13_INPUT                         (_GPIO_P_MODEH_MODE13_INPUT << 20)                     /**< Shifted mode INPUT for GPIO_P_MODEH */
    580. 

  580. #define GPIO_P_MODEH_MODE13_INPUTPULL                     (_GPIO_P_MODEH_MODE13_INPUTPULL << 20)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    581. 

  581. #define GPIO_P_MODEH_MODE13_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE13_INPUTPULLFILTER << 20)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    582. 

  582. #define GPIO_P_MODEH_MODE13_PUSHPULL                      (_GPIO_P_MODEH_MODE13_PUSHPULL << 20)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    583. 

  583. #define GPIO_P_MODEH_MODE13_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE13_PUSHPULLDRIVE << 20)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    584. 

  584. #define GPIO_P_MODEH_MODE13_WIREDOR                       (_GPIO_P_MODEH_MODE13_WIREDOR << 20)                   /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    585. 

  585. #define GPIO_P_MODEH_MODE13_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE13_WIREDORPULLDOWN << 20)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    586. 

  586. #define GPIO_P_MODEH_MODE13_WIREDAND                      (_GPIO_P_MODEH_MODE13_WIREDAND << 20)                  /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    587. 

  587. #define GPIO_P_MODEH_MODE13_WIREDANDFILTER                (_GPIO_P_MODEH_MODE13_WIREDANDFILTER << 20)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    588. 

  588. #define GPIO_P_MODEH_MODE13_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE13_WIREDANDPULLUP << 20)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    589. 

  589. #define GPIO_P_MODEH_MODE13_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE13_WIREDANDPULLUPFILTER << 20)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    590. 

  590. #define GPIO_P_MODEH_MODE13_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE13_WIREDANDDRIVE << 20)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    591. 

  591. #define GPIO_P_MODEH_MODE13_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE13_WIREDANDDRIVEFILTER << 20)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    592. 

  592. #define GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUP << 20)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    593. 

  593. #define GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUPFILTER << 20) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    594. 

  594. #define _GPIO_P_MODEH_MODE14_SHIFT                        24                                                     /**< Shift value for GPIO_MODE14 */
    595. 

  595. #define _GPIO_P_MODEH_MODE14_MASK                         0xF000000UL                                            /**< Bit mask for GPIO_MODE14 */
    596. 

  596. #define _GPIO_P_MODEH_MODE14_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    597. 

  597. #define _GPIO_P_MODEH_MODE14_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    598. 

  598. #define _GPIO_P_MODEH_MODE14_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    599. 

  599. #define _GPIO_P_MODEH_MODE14_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    600. 

  600. #define _GPIO_P_MODEH_MODE14_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    601. 

  601. #define _GPIO_P_MODEH_MODE14_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    602. 

  602. #define _GPIO_P_MODEH_MODE14_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    603. 

  603. #define _GPIO_P_MODEH_MODE14_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    604. 

  604. #define _GPIO_P_MODEH_MODE14_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    605. 

  605. #define _GPIO_P_MODEH_MODE14_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    606. 

  606. #define _GPIO_P_MODEH_MODE14_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    607. 

  607. #define _GPIO_P_MODEH_MODE14_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    608. 

  608. #define _GPIO_P_MODEH_MODE14_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    609. 

  609. #define _GPIO_P_MODEH_MODE14_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    610. 

  610. #define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    611. 

  611. #define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    612. 

  612. #define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    613. 

  613. #define GPIO_P_MODEH_MODE14_DEFAULT                       (_GPIO_P_MODEH_MODE14_DEFAULT << 24)                   /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    614. 

  614. #define GPIO_P_MODEH_MODE14_DISABLED                      (_GPIO_P_MODEH_MODE14_DISABLED << 24)                  /**< Shifted mode DISABLED for GPIO_P_MODEH */
    615. 

  615. #define GPIO_P_MODEH_MODE14_INPUT                         (_GPIO_P_MODEH_MODE14_INPUT << 24)                     /**< Shifted mode INPUT for GPIO_P_MODEH */
    616. 

  616. #define GPIO_P_MODEH_MODE14_INPUTPULL                     (_GPIO_P_MODEH_MODE14_INPUTPULL << 24)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    617. 

  617. #define GPIO_P_MODEH_MODE14_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE14_INPUTPULLFILTER << 24)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    618. 

  618. #define GPIO_P_MODEH_MODE14_PUSHPULL                      (_GPIO_P_MODEH_MODE14_PUSHPULL << 24)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    619. 

  619. #define GPIO_P_MODEH_MODE14_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE14_PUSHPULLDRIVE << 24)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    620. 

  620. #define GPIO_P_MODEH_MODE14_WIREDOR                       (_GPIO_P_MODEH_MODE14_WIREDOR << 24)                   /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    621. 

  621. #define GPIO_P_MODEH_MODE14_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE14_WIREDORPULLDOWN << 24)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    622. 

  622. #define GPIO_P_MODEH_MODE14_WIREDAND                      (_GPIO_P_MODEH_MODE14_WIREDAND << 24)                  /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    623. 

  623. #define GPIO_P_MODEH_MODE14_WIREDANDFILTER                (_GPIO_P_MODEH_MODE14_WIREDANDFILTER << 24)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    624. 

  624. #define GPIO_P_MODEH_MODE14_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE14_WIREDANDPULLUP << 24)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    625. 

  625. #define GPIO_P_MODEH_MODE14_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE14_WIREDANDPULLUPFILTER << 24)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    626. 

  626. #define GPIO_P_MODEH_MODE14_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE14_WIREDANDDRIVE << 24)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    627. 

  627. #define GPIO_P_MODEH_MODE14_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE14_WIREDANDDRIVEFILTER << 24)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    628. 

  628. #define GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUP << 24)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    629. 

  629. #define GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUPFILTER << 24) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    630. 

  630. #define _GPIO_P_MODEH_MODE15_SHIFT                        28                                                     /**< Shift value for GPIO_MODE15 */
    631. 

  631. #define _GPIO_P_MODEH_MODE15_MASK                         0xF0000000UL                                           /**< Bit mask for GPIO_MODE15 */
    632. 

  632. #define _GPIO_P_MODEH_MODE15_DEFAULT                      0x00000000UL                                           /**< Mode DEFAULT for GPIO_P_MODEH */
    633. 

  633. #define _GPIO_P_MODEH_MODE15_DISABLED                     0x00000000UL                                           /**< Mode DISABLED for GPIO_P_MODEH */
    634. 

  634. #define _GPIO_P_MODEH_MODE15_INPUT                        0x00000001UL                                           /**< Mode INPUT for GPIO_P_MODEH */
    635. 

  635. #define _GPIO_P_MODEH_MODE15_INPUTPULL                    0x00000002UL                                           /**< Mode INPUTPULL for GPIO_P_MODEH */
    636. 

  636. #define _GPIO_P_MODEH_MODE15_INPUTPULLFILTER              0x00000003UL                                           /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
    637. 

  637. #define _GPIO_P_MODEH_MODE15_PUSHPULL                     0x00000004UL                                           /**< Mode PUSHPULL for GPIO_P_MODEH */
    638. 

  638. #define _GPIO_P_MODEH_MODE15_PUSHPULLDRIVE                0x00000005UL                                           /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
    639. 

  639. #define _GPIO_P_MODEH_MODE15_WIREDOR                      0x00000006UL                                           /**< Mode WIREDOR for GPIO_P_MODEH */
    640. 

  640. #define _GPIO_P_MODEH_MODE15_WIREDORPULLDOWN              0x00000007UL                                           /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
    641. 

  641. #define _GPIO_P_MODEH_MODE15_WIREDAND                     0x00000008UL                                           /**< Mode WIREDAND for GPIO_P_MODEH */
    642. 

  642. #define _GPIO_P_MODEH_MODE15_WIREDANDFILTER               0x00000009UL                                           /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
    643. 

  643. #define _GPIO_P_MODEH_MODE15_WIREDANDPULLUP               0x0000000AUL                                           /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
    644. 

  644. #define _GPIO_P_MODEH_MODE15_WIREDANDPULLUPFILTER         0x0000000BUL                                           /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    645. 

  645. #define _GPIO_P_MODEH_MODE15_WIREDANDDRIVE                0x0000000CUL                                           /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
    646. 

  646. #define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEFILTER          0x0000000DUL                                           /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    647. 

  647. #define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUP          0x0000000EUL                                           /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    648. 

  648. #define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUPFILTER    0x0000000FUL                                           /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    649. 

  649. #define GPIO_P_MODEH_MODE15_DEFAULT                       (_GPIO_P_MODEH_MODE15_DEFAULT << 28)                   /**< Shifted mode DEFAULT for GPIO_P_MODEH */
    650. 

  650. #define GPIO_P_MODEH_MODE15_DISABLED                      (_GPIO_P_MODEH_MODE15_DISABLED << 28)                  /**< Shifted mode DISABLED for GPIO_P_MODEH */
    651. 

  651. #define GPIO_P_MODEH_MODE15_INPUT                         (_GPIO_P_MODEH_MODE15_INPUT << 28)                     /**< Shifted mode INPUT for GPIO_P_MODEH */
    652. 

  652. #define GPIO_P_MODEH_MODE15_INPUTPULL                     (_GPIO_P_MODEH_MODE15_INPUTPULL << 28)                 /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
    653. 

  653. #define GPIO_P_MODEH_MODE15_INPUTPULLFILTER               (_GPIO_P_MODEH_MODE15_INPUTPULLFILTER << 28)           /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
    654. 

  654. #define GPIO_P_MODEH_MODE15_PUSHPULL                      (_GPIO_P_MODEH_MODE15_PUSHPULL << 28)                  /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
    655. 

  655. #define GPIO_P_MODEH_MODE15_PUSHPULLDRIVE                 (_GPIO_P_MODEH_MODE15_PUSHPULLDRIVE << 28)             /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
    656. 

  656. #define GPIO_P_MODEH_MODE15_WIREDOR                       (_GPIO_P_MODEH_MODE15_WIREDOR << 28)                   /**< Shifted mode WIREDOR for GPIO_P_MODEH */
    657. 

  657. #define GPIO_P_MODEH_MODE15_WIREDORPULLDOWN               (_GPIO_P_MODEH_MODE15_WIREDORPULLDOWN << 28)           /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
    658. 

  658. #define GPIO_P_MODEH_MODE15_WIREDAND                      (_GPIO_P_MODEH_MODE15_WIREDAND << 28)                  /**< Shifted mode WIREDAND for GPIO_P_MODEH */
    659. 

  659. #define GPIO_P_MODEH_MODE15_WIREDANDFILTER                (_GPIO_P_MODEH_MODE15_WIREDANDFILTER << 28)            /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
    660. 

  660. #define GPIO_P_MODEH_MODE15_WIREDANDPULLUP                (_GPIO_P_MODEH_MODE15_WIREDANDPULLUP << 28)            /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
    661. 

  661. #define GPIO_P_MODEH_MODE15_WIREDANDPULLUPFILTER          (_GPIO_P_MODEH_MODE15_WIREDANDPULLUPFILTER << 28)      /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
    662. 

  662. #define GPIO_P_MODEH_MODE15_WIREDANDDRIVE                 (_GPIO_P_MODEH_MODE15_WIREDANDDRIVE << 28)             /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
    663. 

  663. #define GPIO_P_MODEH_MODE15_WIREDANDDRIVEFILTER           (_GPIO_P_MODEH_MODE15_WIREDANDDRIVEFILTER << 28)       /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
    664. 

  664. #define GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUP           (_GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUP << 28)       /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
    665. 

  665. #define GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUPFILTER     (_GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUPFILTER << 28) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
    666. 

  666. 

  667. /* Bit fields for GPIO P_DOUT */
    668. 

  668. #define _GPIO_P_DOUT_RESETVALUE                           0x00000000UL                     /**< Default value for GPIO_P_DOUT */
    669. 

  669. #define _GPIO_P_DOUT_MASK                                 0x0000FFFFUL                     /**< Mask for GPIO_P_DOUT */
    670. 

  670. #define _GPIO_P_DOUT_DOUT_SHIFT                           0                                /**< Shift value for GPIO_DOUT */
    671. 

  671. #define _GPIO_P_DOUT_DOUT_MASK                            0xFFFFUL                         /**< Bit mask for GPIO_DOUT */
    672. 

  672. #define _GPIO_P_DOUT_DOUT_DEFAULT                         0x00000000UL                     /**< Mode DEFAULT for GPIO_P_DOUT */
    673. 

  673. #define GPIO_P_DOUT_DOUT_DEFAULT                          (_GPIO_P_DOUT_DOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUT */
    674. 

  674. 

  675. /* Bit fields for GPIO P_DOUTSET */
    676. 

  676. #define _GPIO_P_DOUTSET_RESETVALUE                        0x00000000UL                           /**< Default value for GPIO_P_DOUTSET */
    677. 

  677. #define _GPIO_P_DOUTSET_MASK                              0x0000FFFFUL                           /**< Mask for GPIO_P_DOUTSET */
    678. 

  678. #define _GPIO_P_DOUTSET_DOUTSET_SHIFT                     0                                      /**< Shift value for GPIO_DOUTSET */
    679. 

  679. #define _GPIO_P_DOUTSET_DOUTSET_MASK                      0xFFFFUL                               /**< Bit mask for GPIO_DOUTSET */
    680. 

  680. #define _GPIO_P_DOUTSET_DOUTSET_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_P_DOUTSET */
    681. 

  681. #define GPIO_P_DOUTSET_DOUTSET_DEFAULT                    (_GPIO_P_DOUTSET_DOUTSET_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTSET */
    682. 

  682. 

  683. /* Bit fields for GPIO P_DOUTCLR */
    684. 

  684. #define _GPIO_P_DOUTCLR_RESETVALUE                        0x00000000UL                           /**< Default value for GPIO_P_DOUTCLR */
    685. 

  685. #define _GPIO_P_DOUTCLR_MASK                              0x0000FFFFUL                           /**< Mask for GPIO_P_DOUTCLR */
    686. 

  686. #define _GPIO_P_DOUTCLR_DOUTCLR_SHIFT                     0                                      /**< Shift value for GPIO_DOUTCLR */
    687. 

  687. #define _GPIO_P_DOUTCLR_DOUTCLR_MASK                      0xFFFFUL                               /**< Bit mask for GPIO_DOUTCLR */
    688. 

  688. #define _GPIO_P_DOUTCLR_DOUTCLR_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_P_DOUTCLR */
    689. 

  689. #define GPIO_P_DOUTCLR_DOUTCLR_DEFAULT                    (_GPIO_P_DOUTCLR_DOUTCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTCLR */
    690. 

  690. 

  691. /* Bit fields for GPIO P_DOUTTGL */
    692. 

  692. #define _GPIO_P_DOUTTGL_RESETVALUE                        0x00000000UL                           /**< Default value for GPIO_P_DOUTTGL */
    693. 

  693. #define _GPIO_P_DOUTTGL_MASK                              0x0000FFFFUL                           /**< Mask for GPIO_P_DOUTTGL */
    694. 

  694. #define _GPIO_P_DOUTTGL_DOUTTGL_SHIFT                     0                                      /**< Shift value for GPIO_DOUTTGL */
    695. 

  695. #define _GPIO_P_DOUTTGL_DOUTTGL_MASK                      0xFFFFUL                               /**< Bit mask for GPIO_DOUTTGL */
    696. 

  696. #define _GPIO_P_DOUTTGL_DOUTTGL_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_P_DOUTTGL */
    697. 

  697. #define GPIO_P_DOUTTGL_DOUTTGL_DEFAULT                    (_GPIO_P_DOUTTGL_DOUTTGL_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTTGL */
    698. 

  698. 

  699. /* Bit fields for GPIO P_DIN */
    700. 

  700. #define _GPIO_P_DIN_RESETVALUE                            0x00000000UL                   /**< Default value for GPIO_P_DIN */
    701. 

  701. #define _GPIO_P_DIN_MASK                                  0x0000FFFFUL                   /**< Mask for GPIO_P_DIN */
    702. 

  702. #define _GPIO_P_DIN_DIN_SHIFT                             0                              /**< Shift value for GPIO_DIN */
    703. 

  703. #define _GPIO_P_DIN_DIN_MASK                              0xFFFFUL                       /**< Bit mask for GPIO_DIN */
    704. 

  704. #define _GPIO_P_DIN_DIN_DEFAULT                           0x00000000UL                   /**< Mode DEFAULT for GPIO_P_DIN */
    705. 

  705. #define GPIO_P_DIN_DIN_DEFAULT                            (_GPIO_P_DIN_DIN_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_DIN */
    706. 

  706. 

  707. /* Bit fields for GPIO P_PINLOCKN */
    708. 

  708. #define _GPIO_P_PINLOCKN_RESETVALUE                       0x0000FFFFUL                             /**< Default value for GPIO_P_PINLOCKN */
    709. 

  709. #define _GPIO_P_PINLOCKN_MASK                             0x0000FFFFUL                             /**< Mask for GPIO_P_PINLOCKN */
    710. 

  710. #define _GPIO_P_PINLOCKN_PINLOCKN_SHIFT                   0                                        /**< Shift value for GPIO_PINLOCKN */
    711. 

  711. #define _GPIO_P_PINLOCKN_PINLOCKN_MASK                    0xFFFFUL                                 /**< Bit mask for GPIO_PINLOCKN */
    712. 

  712. #define _GPIO_P_PINLOCKN_PINLOCKN_DEFAULT                 0x0000FFFFUL                             /**< Mode DEFAULT for GPIO_P_PINLOCKN */
    713. 

  713. #define GPIO_P_PINLOCKN_PINLOCKN_DEFAULT                  (_GPIO_P_PINLOCKN_PINLOCKN_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_P_PINLOCKN */
    714. 

  714. 

  715. /* Bit fields for GPIO EXTIPSELL */
    716. 

  716. #define _GPIO_EXTIPSELL_RESETVALUE                        0x00000000UL                              /**< Default value for GPIO_EXTIPSELL */
    717. 

  717. #define _GPIO_EXTIPSELL_MASK                              0x77777777UL                              /**< Mask for GPIO_EXTIPSELL */
    718. 

  718. #define _GPIO_EXTIPSELL_EXTIPSEL0_SHIFT                   0                                         /**< Shift value for GPIO_EXTIPSEL0 */
    719. 

  719. #define _GPIO_EXTIPSELL_EXTIPSEL0_MASK                    0x7UL                                     /**< Bit mask for GPIO_EXTIPSEL0 */
    720. 

  720. #define _GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    721. 

  721. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    722. 

  722. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    723. 

  723. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    724. 

  724. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    725. 

  725. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    726. 

  726. #define _GPIO_EXTIPSELL_EXTIPSEL0_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    727. 

  727. #define GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT << 0)  /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    728. 

  728. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTA << 0)    /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    729. 

  729. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTB << 0)    /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    730. 

  730. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTC << 0)    /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    731. 

  731. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTD << 0)    /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    732. 

  732. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTE << 0)    /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    733. 

  733. #define GPIO_EXTIPSELL_EXTIPSEL0_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL0_PORTF << 0)    /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    734. 

  734. #define _GPIO_EXTIPSELL_EXTIPSEL1_SHIFT                   4                                         /**< Shift value for GPIO_EXTIPSEL1 */
    735. 

  735. #define _GPIO_EXTIPSELL_EXTIPSEL1_MASK                    0x70UL                                    /**< Bit mask for GPIO_EXTIPSEL1 */
    736. 

  736. #define _GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    737. 

  737. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    738. 

  738. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    739. 

  739. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    740. 

  740. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    741. 

  741. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    742. 

  742. #define _GPIO_EXTIPSELL_EXTIPSEL1_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    743. 

  743. #define GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT << 4)  /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    744. 

  744. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTA << 4)    /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    745. 

  745. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTB << 4)    /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    746. 

  746. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTC << 4)    /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    747. 

  747. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTD << 4)    /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    748. 

  748. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTE << 4)    /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    749. 

  749. #define GPIO_EXTIPSELL_EXTIPSEL1_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL1_PORTF << 4)    /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    750. 

  750. #define _GPIO_EXTIPSELL_EXTIPSEL2_SHIFT                   8                                         /**< Shift value for GPIO_EXTIPSEL2 */
    751. 

  751. #define _GPIO_EXTIPSELL_EXTIPSEL2_MASK                    0x700UL                                   /**< Bit mask for GPIO_EXTIPSEL2 */
    752. 

  752. #define _GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    753. 

  753. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    754. 

  754. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    755. 

  755. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    756. 

  756. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    757. 

  757. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    758. 

  758. #define _GPIO_EXTIPSELL_EXTIPSEL2_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    759. 

  759. #define GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT << 8)  /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    760. 

  760. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTA << 8)    /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    761. 

  761. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTB << 8)    /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    762. 

  762. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTC << 8)    /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    763. 

  763. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTD << 8)    /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    764. 

  764. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTE << 8)    /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    765. 

  765. #define GPIO_EXTIPSELL_EXTIPSEL2_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL2_PORTF << 8)    /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    766. 

  766. #define _GPIO_EXTIPSELL_EXTIPSEL3_SHIFT                   12                                        /**< Shift value for GPIO_EXTIPSEL3 */
    767. 

  767. #define _GPIO_EXTIPSELL_EXTIPSEL3_MASK                    0x7000UL                                  /**< Bit mask for GPIO_EXTIPSEL3 */
    768. 

  768. #define _GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    769. 

  769. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    770. 

  770. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    771. 

  771. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    772. 

  772. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    773. 

  773. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    774. 

  774. #define _GPIO_EXTIPSELL_EXTIPSEL3_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    775. 

  775. #define GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT << 12) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    776. 

  776. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTA << 12)   /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    777. 

  777. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTB << 12)   /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    778. 

  778. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTC << 12)   /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    779. 

  779. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTD << 12)   /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    780. 

  780. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTE << 12)   /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    781. 

  781. #define GPIO_EXTIPSELL_EXTIPSEL3_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL3_PORTF << 12)   /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    782. 

  782. #define _GPIO_EXTIPSELL_EXTIPSEL4_SHIFT                   16                                        /**< Shift value for GPIO_EXTIPSEL4 */
    783. 

  783. #define _GPIO_EXTIPSELL_EXTIPSEL4_MASK                    0x70000UL                                 /**< Bit mask for GPIO_EXTIPSEL4 */
    784. 

  784. #define _GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    785. 

  785. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    786. 

  786. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    787. 

  787. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    788. 

  788. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    789. 

  789. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    790. 

  790. #define _GPIO_EXTIPSELL_EXTIPSEL4_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    791. 

  791. #define GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT << 16) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    792. 

  792. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTA << 16)   /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    793. 

  793. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTB << 16)   /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    794. 

  794. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTC << 16)   /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    795. 

  795. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTD << 16)   /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    796. 

  796. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTE << 16)   /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    797. 

  797. #define GPIO_EXTIPSELL_EXTIPSEL4_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL4_PORTF << 16)   /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    798. 

  798. #define _GPIO_EXTIPSELL_EXTIPSEL5_SHIFT                   20                                        /**< Shift value for GPIO_EXTIPSEL5 */
    799. 

  799. #define _GPIO_EXTIPSELL_EXTIPSEL5_MASK                    0x700000UL                                /**< Bit mask for GPIO_EXTIPSEL5 */
    800. 

  800. #define _GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    801. 

  801. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    802. 

  802. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    803. 

  803. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    804. 

  804. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    805. 

  805. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    806. 

  806. #define _GPIO_EXTIPSELL_EXTIPSEL5_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    807. 

  807. #define GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT << 20) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    808. 

  808. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTA << 20)   /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    809. 

  809. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTB << 20)   /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    810. 

  810. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTC << 20)   /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    811. 

  811. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTD << 20)   /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    812. 

  812. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTE << 20)   /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    813. 

  813. #define GPIO_EXTIPSELL_EXTIPSEL5_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL5_PORTF << 20)   /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    814. 

  814. #define _GPIO_EXTIPSELL_EXTIPSEL6_SHIFT                   24                                        /**< Shift value for GPIO_EXTIPSEL6 */
    815. 

  815. #define _GPIO_EXTIPSELL_EXTIPSEL6_MASK                    0x7000000UL                               /**< Bit mask for GPIO_EXTIPSEL6 */
    816. 

  816. #define _GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    817. 

  817. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    818. 

  818. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    819. 

  819. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    820. 

  820. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    821. 

  821. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    822. 

  822. #define _GPIO_EXTIPSELL_EXTIPSEL6_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    823. 

  823. #define GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT << 24) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    824. 

  824. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTA << 24)   /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    825. 

  825. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTB << 24)   /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    826. 

  826. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTC << 24)   /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    827. 

  827. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTD << 24)   /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    828. 

  828. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTE << 24)   /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    829. 

  829. #define GPIO_EXTIPSELL_EXTIPSEL6_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL6_PORTF << 24)   /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    830. 

  830. #define _GPIO_EXTIPSELL_EXTIPSEL7_SHIFT                   28                                        /**< Shift value for GPIO_EXTIPSEL7 */
    831. 

  831. #define _GPIO_EXTIPSELL_EXTIPSEL7_MASK                    0x70000000UL                              /**< Bit mask for GPIO_EXTIPSEL7 */
    832. 

  832. #define _GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT                 0x00000000UL                              /**< Mode DEFAULT for GPIO_EXTIPSELL */
    833. 

  833. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTA                   0x00000000UL                              /**< Mode PORTA for GPIO_EXTIPSELL */
    834. 

  834. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTB                   0x00000001UL                              /**< Mode PORTB for GPIO_EXTIPSELL */
    835. 

  835. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTC                   0x00000002UL                              /**< Mode PORTC for GPIO_EXTIPSELL */
    836. 

  836. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTD                   0x00000003UL                              /**< Mode PORTD for GPIO_EXTIPSELL */
    837. 

  837. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTE                   0x00000004UL                              /**< Mode PORTE for GPIO_EXTIPSELL */
    838. 

  838. #define _GPIO_EXTIPSELL_EXTIPSEL7_PORTF                   0x00000005UL                              /**< Mode PORTF for GPIO_EXTIPSELL */
    839. 

  839. #define GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT                  (_GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT << 28) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
    840. 

  840. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTA                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTA << 28)   /**< Shifted mode PORTA for GPIO_EXTIPSELL */
    841. 

  841. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTB                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTB << 28)   /**< Shifted mode PORTB for GPIO_EXTIPSELL */
    842. 

  842. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTC                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTC << 28)   /**< Shifted mode PORTC for GPIO_EXTIPSELL */
    843. 

  843. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTD                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTD << 28)   /**< Shifted mode PORTD for GPIO_EXTIPSELL */
    844. 

  844. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTE                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTE << 28)   /**< Shifted mode PORTE for GPIO_EXTIPSELL */
    845. 

  845. #define GPIO_EXTIPSELL_EXTIPSEL7_PORTF                    (_GPIO_EXTIPSELL_EXTIPSEL7_PORTF << 28)   /**< Shifted mode PORTF for GPIO_EXTIPSELL */
    846. 

  846. 

  847. /* Bit fields for GPIO EXTIPSELH */
    848. 

  848. #define _GPIO_EXTIPSELH_RESETVALUE                        0x00000000UL                               /**< Default value for GPIO_EXTIPSELH */
    849. 

  849. #define _GPIO_EXTIPSELH_MASK                              0x77777777UL                               /**< Mask for GPIO_EXTIPSELH */
    850. 

  850. #define _GPIO_EXTIPSELH_EXTIPSEL8_SHIFT                   0                                          /**< Shift value for GPIO_EXTIPSEL8 */
    851. 

  851. #define _GPIO_EXTIPSELH_EXTIPSEL8_MASK                    0x7UL                                      /**< Bit mask for GPIO_EXTIPSEL8 */
    852. 

  852. #define _GPIO_EXTIPSELH_EXTIPSEL8_DEFAULT                 0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    853. 

  853. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTA                   0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    854. 

  854. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTB                   0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    855. 

  855. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTC                   0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    856. 

  856. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTD                   0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    857. 

  857. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTE                   0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    858. 

  858. #define _GPIO_EXTIPSELH_EXTIPSEL8_PORTF                   0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    859. 

  859. #define GPIO_EXTIPSELH_EXTIPSEL8_DEFAULT                  (_GPIO_EXTIPSELH_EXTIPSEL8_DEFAULT << 0)   /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    860. 

  860. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTA                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTA << 0)     /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    861. 

  861. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTB                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTB << 0)     /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    862. 

  862. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTC                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTC << 0)     /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    863. 

  863. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTD                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTD << 0)     /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    864. 

  864. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTE                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTE << 0)     /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    865. 

  865. #define GPIO_EXTIPSELH_EXTIPSEL8_PORTF                    (_GPIO_EXTIPSELH_EXTIPSEL8_PORTF << 0)     /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    866. 

  866. #define _GPIO_EXTIPSELH_EXTIPSEL9_SHIFT                   4                                          /**< Shift value for GPIO_EXTIPSEL9 */
    867. 

  867. #define _GPIO_EXTIPSELH_EXTIPSEL9_MASK                    0x70UL                                     /**< Bit mask for GPIO_EXTIPSEL9 */
    868. 

  868. #define _GPIO_EXTIPSELH_EXTIPSEL9_DEFAULT                 0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    869. 

  869. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTA                   0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    870. 

  870. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTB                   0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    871. 

  871. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTC                   0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    872. 

  872. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTD                   0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    873. 

  873. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTE                   0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    874. 

  874. #define _GPIO_EXTIPSELH_EXTIPSEL9_PORTF                   0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    875. 

  875. #define GPIO_EXTIPSELH_EXTIPSEL9_DEFAULT                  (_GPIO_EXTIPSELH_EXTIPSEL9_DEFAULT << 4)   /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    876. 

  876. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTA                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTA << 4)     /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    877. 

  877. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTB                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTB << 4)     /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    878. 

  878. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTC                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTC << 4)     /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    879. 

  879. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTD                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTD << 4)     /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    880. 

  880. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTE                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTE << 4)     /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    881. 

  881. #define GPIO_EXTIPSELH_EXTIPSEL9_PORTF                    (_GPIO_EXTIPSELH_EXTIPSEL9_PORTF << 4)     /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    882. 

  882. #define _GPIO_EXTIPSELH_EXTIPSEL10_SHIFT                  8                                          /**< Shift value for GPIO_EXTIPSEL10 */
    883. 

  883. #define _GPIO_EXTIPSELH_EXTIPSEL10_MASK                   0x700UL                                    /**< Bit mask for GPIO_EXTIPSEL10 */
    884. 

  884. #define _GPIO_EXTIPSELH_EXTIPSEL10_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    885. 

  885. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    886. 

  886. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    887. 

  887. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    888. 

  888. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    889. 

  889. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    890. 

  890. #define _GPIO_EXTIPSELH_EXTIPSEL10_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    891. 

  891. #define GPIO_EXTIPSELH_EXTIPSEL10_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL10_DEFAULT << 8)  /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    892. 

  892. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTA << 8)    /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    893. 

  893. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTB << 8)    /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    894. 

  894. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTC << 8)    /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    895. 

  895. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTD << 8)    /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    896. 

  896. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTE << 8)    /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    897. 

  897. #define GPIO_EXTIPSELH_EXTIPSEL10_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL10_PORTF << 8)    /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    898. 

  898. #define _GPIO_EXTIPSELH_EXTIPSEL11_SHIFT                  12                                         /**< Shift value for GPIO_EXTIPSEL11 */
    899. 

  899. #define _GPIO_EXTIPSELH_EXTIPSEL11_MASK                   0x7000UL                                   /**< Bit mask for GPIO_EXTIPSEL11 */
    900. 

  900. #define _GPIO_EXTIPSELH_EXTIPSEL11_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    901. 

  901. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    902. 

  902. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    903. 

  903. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    904. 

  904. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    905. 

  905. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    906. 

  906. #define _GPIO_EXTIPSELH_EXTIPSEL11_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    907. 

  907. #define GPIO_EXTIPSELH_EXTIPSEL11_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL11_DEFAULT << 12) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    908. 

  908. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTA << 12)   /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    909. 

  909. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTB << 12)   /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    910. 

  910. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTC << 12)   /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    911. 

  911. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTD << 12)   /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    912. 

  912. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTE << 12)   /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    913. 

  913. #define GPIO_EXTIPSELH_EXTIPSEL11_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL11_PORTF << 12)   /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    914. 

  914. #define _GPIO_EXTIPSELH_EXTIPSEL12_SHIFT                  16                                         /**< Shift value for GPIO_EXTIPSEL12 */
    915. 

  915. #define _GPIO_EXTIPSELH_EXTIPSEL12_MASK                   0x70000UL                                  /**< Bit mask for GPIO_EXTIPSEL12 */
    916. 

  916. #define _GPIO_EXTIPSELH_EXTIPSEL12_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    917. 

  917. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    918. 

  918. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    919. 

  919. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    920. 

  920. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    921. 

  921. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    922. 

  922. #define _GPIO_EXTIPSELH_EXTIPSEL12_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    923. 

  923. #define GPIO_EXTIPSELH_EXTIPSEL12_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL12_DEFAULT << 16) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    924. 

  924. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTA << 16)   /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    925. 

  925. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTB << 16)   /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    926. 

  926. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTC << 16)   /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    927. 

  927. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTD << 16)   /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    928. 

  928. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTE << 16)   /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    929. 

  929. #define GPIO_EXTIPSELH_EXTIPSEL12_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL12_PORTF << 16)   /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    930. 

  930. #define _GPIO_EXTIPSELH_EXTIPSEL13_SHIFT                  20                                         /**< Shift value for GPIO_EXTIPSEL13 */
    931. 

  931. #define _GPIO_EXTIPSELH_EXTIPSEL13_MASK                   0x700000UL                                 /**< Bit mask for GPIO_EXTIPSEL13 */
    932. 

  932. #define _GPIO_EXTIPSELH_EXTIPSEL13_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    933. 

  933. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    934. 

  934. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    935. 

  935. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    936. 

  936. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    937. 

  937. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    938. 

  938. #define _GPIO_EXTIPSELH_EXTIPSEL13_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    939. 

  939. #define GPIO_EXTIPSELH_EXTIPSEL13_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL13_DEFAULT << 20) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    940. 

  940. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTA << 20)   /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    941. 

  941. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTB << 20)   /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    942. 

  942. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTC << 20)   /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    943. 

  943. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTD << 20)   /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    944. 

  944. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTE << 20)   /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    945. 

  945. #define GPIO_EXTIPSELH_EXTIPSEL13_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL13_PORTF << 20)   /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    946. 

  946. #define _GPIO_EXTIPSELH_EXTIPSEL14_SHIFT                  24                                         /**< Shift value for GPIO_EXTIPSEL14 */
    947. 

  947. #define _GPIO_EXTIPSELH_EXTIPSEL14_MASK                   0x7000000UL                                /**< Bit mask for GPIO_EXTIPSEL14 */
    948. 

  948. #define _GPIO_EXTIPSELH_EXTIPSEL14_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    949. 

  949. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    950. 

  950. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    951. 

  951. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    952. 

  952. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    953. 

  953. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    954. 

  954. #define _GPIO_EXTIPSELH_EXTIPSEL14_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    955. 

  955. #define GPIO_EXTIPSELH_EXTIPSEL14_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL14_DEFAULT << 24) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    956. 

  956. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTA << 24)   /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    957. 

  957. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTB << 24)   /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    958. 

  958. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTC << 24)   /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    959. 

  959. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTD << 24)   /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    960. 

  960. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTE << 24)   /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    961. 

  961. #define GPIO_EXTIPSELH_EXTIPSEL14_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL14_PORTF << 24)   /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    962. 

  962. #define _GPIO_EXTIPSELH_EXTIPSEL15_SHIFT                  28                                         /**< Shift value for GPIO_EXTIPSEL15 */
    963. 

  963. #define _GPIO_EXTIPSELH_EXTIPSEL15_MASK                   0x70000000UL                               /**< Bit mask for GPIO_EXTIPSEL15 */
    964. 

  964. #define _GPIO_EXTIPSELH_EXTIPSEL15_DEFAULT                0x00000000UL                               /**< Mode DEFAULT for GPIO_EXTIPSELH */
    965. 

  965. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTA                  0x00000000UL                               /**< Mode PORTA for GPIO_EXTIPSELH */
    966. 

  966. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTB                  0x00000001UL                               /**< Mode PORTB for GPIO_EXTIPSELH */
    967. 

  967. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTC                  0x00000002UL                               /**< Mode PORTC for GPIO_EXTIPSELH */
    968. 

  968. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTD                  0x00000003UL                               /**< Mode PORTD for GPIO_EXTIPSELH */
    969. 

  969. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTE                  0x00000004UL                               /**< Mode PORTE for GPIO_EXTIPSELH */
    970. 

  970. #define _GPIO_EXTIPSELH_EXTIPSEL15_PORTF                  0x00000005UL                               /**< Mode PORTF for GPIO_EXTIPSELH */
    971. 

  971. #define GPIO_EXTIPSELH_EXTIPSEL15_DEFAULT                 (_GPIO_EXTIPSELH_EXTIPSEL15_DEFAULT << 28) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
    972. 

  972. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTA                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTA << 28)   /**< Shifted mode PORTA for GPIO_EXTIPSELH */
    973. 

  973. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTB                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTB << 28)   /**< Shifted mode PORTB for GPIO_EXTIPSELH */
    974. 

  974. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTC                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTC << 28)   /**< Shifted mode PORTC for GPIO_EXTIPSELH */
    975. 

  975. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTD                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTD << 28)   /**< Shifted mode PORTD for GPIO_EXTIPSELH */
    976. 

  976. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTE                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTE << 28)   /**< Shifted mode PORTE for GPIO_EXTIPSELH */
    977. 

  977. #define GPIO_EXTIPSELH_EXTIPSEL15_PORTF                   (_GPIO_EXTIPSELH_EXTIPSEL15_PORTF << 28)   /**< Shifted mode PORTF for GPIO_EXTIPSELH */
    978. 

  978. 

  979. /* Bit fields for GPIO EXTIRISE */
    980. 

  980. #define _GPIO_EXTIRISE_RESETVALUE                         0x00000000UL                           /**< Default value for GPIO_EXTIRISE */
    981. 

  981. #define _GPIO_EXTIRISE_MASK                               0x0000FFFFUL                           /**< Mask for GPIO_EXTIRISE */
    982. 

  982. #define _GPIO_EXTIRISE_EXTIRISE_SHIFT                     0                                      /**< Shift value for GPIO_EXTIRISE */
    983. 

  983. #define _GPIO_EXTIRISE_EXTIRISE_MASK                      0xFFFFUL                               /**< Bit mask for GPIO_EXTIRISE */
    984. 

  984. #define _GPIO_EXTIRISE_EXTIRISE_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_EXTIRISE */
    985. 

  985. #define GPIO_EXTIRISE_EXTIRISE_DEFAULT                    (_GPIO_EXTIRISE_EXTIRISE_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_EXTIRISE */
    986. 

  986. 

  987. /* Bit fields for GPIO EXTIFALL */
    988. 

  988. #define _GPIO_EXTIFALL_RESETVALUE                         0x00000000UL                           /**< Default value for GPIO_EXTIFALL */
    989. 

  989. #define _GPIO_EXTIFALL_MASK                               0x0000FFFFUL                           /**< Mask for GPIO_EXTIFALL */
    990. 

  990. #define _GPIO_EXTIFALL_EXTIFALL_SHIFT                     0                                      /**< Shift value for GPIO_EXTIFALL */
    991. 

  991. #define _GPIO_EXTIFALL_EXTIFALL_MASK                      0xFFFFUL                               /**< Bit mask for GPIO_EXTIFALL */
    992. 

  992. #define _GPIO_EXTIFALL_EXTIFALL_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_EXTIFALL */
    993. 

  993. #define GPIO_EXTIFALL_EXTIFALL_DEFAULT                    (_GPIO_EXTIFALL_EXTIFALL_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_EXTIFALL */
    994. 

  994. 

  995. /* Bit fields for GPIO IEN */
    996. 

  996. #define _GPIO_IEN_RESETVALUE                              0x00000000UL                 /**< Default value for GPIO_IEN */
    997. 

  997. #define _GPIO_IEN_MASK                                    0x0000FFFFUL                 /**< Mask for GPIO_IEN */
    998. 

  998. #define _GPIO_IEN_EXT_SHIFT                               0                            /**< Shift value for GPIO_EXT */
    999. 

  999. #define _GPIO_IEN_EXT_MASK                                0xFFFFUL                     /**< Bit mask for GPIO_EXT */
    1000. 

  1000. #define _GPIO_IEN_EXT_DEFAULT                             0x00000000UL                 /**< Mode DEFAULT for GPIO_IEN */
    1001. 

  1001. #define GPIO_IEN_EXT_DEFAULT                              (_GPIO_IEN_EXT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_IEN */
    1002. 

  1002. 

  1003. /* Bit fields for GPIO IF */
    1004. 

  1004. #define _GPIO_IF_RESETVALUE                               0x00000000UL                /**< Default value for GPIO_IF */
    1005. 

  1005. #define _GPIO_IF_MASK                                     0x0000FFFFUL                /**< Mask for GPIO_IF */
    1006. 

  1006. #define _GPIO_IF_EXT_SHIFT                                0                           /**< Shift value for GPIO_EXT */
    1007. 

  1007. #define _GPIO_IF_EXT_MASK                                 0xFFFFUL                    /**< Bit mask for GPIO_EXT */
    1008. 

  1008. #define _GPIO_IF_EXT_DEFAULT                              0x00000000UL                /**< Mode DEFAULT for GPIO_IF */
    1009. 

  1009. #define GPIO_IF_EXT_DEFAULT                               (_GPIO_IF_EXT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_IF */
    1010. 

  1010. 

  1011. /* Bit fields for GPIO IFS */
    1012. 

  1012. #define _GPIO_IFS_RESETVALUE                              0x00000000UL                 /**< Default value for GPIO_IFS */
    1013. 

  1013. #define _GPIO_IFS_MASK                                    0x0000FFFFUL                 /**< Mask for GPIO_IFS */
    1014. 

  1014. #define _GPIO_IFS_EXT_SHIFT                               0                            /**< Shift value for GPIO_EXT */
    1015. 

  1015. #define _GPIO_IFS_EXT_MASK                                0xFFFFUL                     /**< Bit mask for GPIO_EXT */
    1016. 

  1016. #define _GPIO_IFS_EXT_DEFAULT                             0x00000000UL                 /**< Mode DEFAULT for GPIO_IFS */
    1017. 

  1017. #define GPIO_IFS_EXT_DEFAULT                              (_GPIO_IFS_EXT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_IFS */
    1018. 

  1018. 

  1019. /* Bit fields for GPIO IFC */
    1020. 

  1020. #define _GPIO_IFC_RESETVALUE                              0x00000000UL                 /**< Default value for GPIO_IFC */
    1021. 

  1021. #define _GPIO_IFC_MASK                                    0x0000FFFFUL                 /**< Mask for GPIO_IFC */
    1022. 

  1022. #define _GPIO_IFC_EXT_SHIFT                               0                            /**< Shift value for GPIO_EXT */
    1023. 

  1023. #define _GPIO_IFC_EXT_MASK                                0xFFFFUL                     /**< Bit mask for GPIO_EXT */
    1024. 

  1024. #define _GPIO_IFC_EXT_DEFAULT                             0x00000000UL                 /**< Mode DEFAULT for GPIO_IFC */
    1025. 

  1025. #define GPIO_IFC_EXT_DEFAULT                              (_GPIO_IFC_EXT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_IFC */
    1026. 

  1026. 

  1027. /* Bit fields for GPIO ROUTE */
    1028. 

  1028. #define _GPIO_ROUTE_RESETVALUE                            0x00000003UL                         /**< Default value for GPIO_ROUTE */
    1029. 

  1029. #define _GPIO_ROUTE_MASK                                  0x0301F307UL                         /**< Mask for GPIO_ROUTE */
    1030. 

  1030. #define GPIO_ROUTE_SWCLKPEN                               (0x1UL << 0)                         /**< Serial Wire Clock Pin Enable */
    1031. 

  1031. #define _GPIO_ROUTE_SWCLKPEN_SHIFT                        0                                    /**< Shift value for GPIO_SWCLKPEN */
    1032. 

  1032. #define _GPIO_ROUTE_SWCLKPEN_MASK                         0x1UL                                /**< Bit mask for GPIO_SWCLKPEN */
    1033. 

  1033. #define _GPIO_ROUTE_SWCLKPEN_DEFAULT                      0x00000001UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1034. 

  1034. #define GPIO_ROUTE_SWCLKPEN_DEFAULT                       (_GPIO_ROUTE_SWCLKPEN_DEFAULT << 0)  /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1035. 

  1035. #define GPIO_ROUTE_SWDIOPEN                               (0x1UL << 1)                         /**< Serial Wire Data Pin Enable */
    1036. 

  1036. #define _GPIO_ROUTE_SWDIOPEN_SHIFT                        1                                    /**< Shift value for GPIO_SWDIOPEN */
    1037. 

  1037. #define _GPIO_ROUTE_SWDIOPEN_MASK                         0x2UL                                /**< Bit mask for GPIO_SWDIOPEN */
    1038. 

  1038. #define _GPIO_ROUTE_SWDIOPEN_DEFAULT                      0x00000001UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1039. 

  1039. #define GPIO_ROUTE_SWDIOPEN_DEFAULT                       (_GPIO_ROUTE_SWDIOPEN_DEFAULT << 1)  /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1040. 

  1040. #define GPIO_ROUTE_SWOPEN                                 (0x1UL << 2)                         /**< Serial Wire Viewer Output Pin Enable */
    1041. 

  1041. #define _GPIO_ROUTE_SWOPEN_SHIFT                          2                                    /**< Shift value for GPIO_SWOPEN */
    1042. 

  1042. #define _GPIO_ROUTE_SWOPEN_MASK                           0x4UL                                /**< Bit mask for GPIO_SWOPEN */
    1043. 

  1043. #define _GPIO_ROUTE_SWOPEN_DEFAULT                        0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1044. 

  1044. #define GPIO_ROUTE_SWOPEN_DEFAULT                         (_GPIO_ROUTE_SWOPEN_DEFAULT << 2)    /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1045. 

  1045. #define _GPIO_ROUTE_SWLOCATION_SHIFT                      8                                    /**< Shift value for GPIO_SWLOCATION */
    1046. 

  1046. #define _GPIO_ROUTE_SWLOCATION_MASK                       0x300UL                              /**< Bit mask for GPIO_SWLOCATION */
    1047. 

  1047. #define _GPIO_ROUTE_SWLOCATION_LOC0                       0x00000000UL                         /**< Mode LOC0 for GPIO_ROUTE */
    1048. 

  1048. #define _GPIO_ROUTE_SWLOCATION_LOC1                       0x00000001UL                         /**< Mode LOC1 for GPIO_ROUTE */
    1049. 

  1049. #define _GPIO_ROUTE_SWLOCATION_LOC2                       0x00000002UL                         /**< Mode LOC2 for GPIO_ROUTE */
    1050. 

  1050. #define _GPIO_ROUTE_SWLOCATION_LOC3                       0x00000003UL                         /**< Mode LOC3 for GPIO_ROUTE */
    1051. 

  1051. #define GPIO_ROUTE_SWLOCATION_LOC0                        (_GPIO_ROUTE_SWLOCATION_LOC0 << 8)   /**< Shifted mode LOC0 for GPIO_ROUTE */
    1052. 

  1052. #define GPIO_ROUTE_SWLOCATION_LOC1                        (_GPIO_ROUTE_SWLOCATION_LOC1 << 8)   /**< Shifted mode LOC1 for GPIO_ROUTE */
    1053. 

  1053. #define GPIO_ROUTE_SWLOCATION_LOC2                        (_GPIO_ROUTE_SWLOCATION_LOC2 << 8)   /**< Shifted mode LOC2 for GPIO_ROUTE */
    1054. 

  1054. #define GPIO_ROUTE_SWLOCATION_LOC3                        (_GPIO_ROUTE_SWLOCATION_LOC3 << 8)   /**< Shifted mode LOC3 for GPIO_ROUTE */
    1055. 

  1055. #define GPIO_ROUTE_TCLKPEN                                (0x1UL << 12)                        /**< ETM Trace Clock Pin Enable */
    1056. 

  1056. #define _GPIO_ROUTE_TCLKPEN_SHIFT                         12                                   /**< Shift value for GPIO_TCLKPEN */
    1057. 

  1057. #define _GPIO_ROUTE_TCLKPEN_MASK                          0x1000UL                             /**< Bit mask for GPIO_TCLKPEN */
    1058. 

  1058. #define _GPIO_ROUTE_TCLKPEN_DEFAULT                       0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1059. 

  1059. #define GPIO_ROUTE_TCLKPEN_DEFAULT                        (_GPIO_ROUTE_TCLKPEN_DEFAULT << 12)  /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1060. 

  1060. #define GPIO_ROUTE_TD0PEN                                 (0x1UL << 13)                        /**< ETM Trace Data Pin Enable */
    1061. 

  1061. #define _GPIO_ROUTE_TD0PEN_SHIFT                          13                                   /**< Shift value for GPIO_TD0PEN */
    1062. 

  1062. #define _GPIO_ROUTE_TD0PEN_MASK                           0x2000UL                             /**< Bit mask for GPIO_TD0PEN */
    1063. 

  1063. #define _GPIO_ROUTE_TD0PEN_DEFAULT                        0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1064. 

  1064. #define GPIO_ROUTE_TD0PEN_DEFAULT                         (_GPIO_ROUTE_TD0PEN_DEFAULT << 13)   /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1065. 

  1065. #define GPIO_ROUTE_TD1PEN                                 (0x1UL << 14)                        /**< ETM Trace Data Pin Enable */
    1066. 

  1066. #define _GPIO_ROUTE_TD1PEN_SHIFT                          14                                   /**< Shift value for GPIO_TD1PEN */
    1067. 

  1067. #define _GPIO_ROUTE_TD1PEN_MASK                           0x4000UL                             /**< Bit mask for GPIO_TD1PEN */
    1068. 

  1068. #define _GPIO_ROUTE_TD1PEN_DEFAULT                        0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1069. 

  1069. #define GPIO_ROUTE_TD1PEN_DEFAULT                         (_GPIO_ROUTE_TD1PEN_DEFAULT << 14)   /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1070. 

  1070. #define GPIO_ROUTE_TD2PEN                                 (0x1UL << 15)                        /**< ETM Trace Data Pin Enable */
    1071. 

  1071. #define _GPIO_ROUTE_TD2PEN_SHIFT                          15                                   /**< Shift value for GPIO_TD2PEN */
    1072. 

  1072. #define _GPIO_ROUTE_TD2PEN_MASK                           0x8000UL                             /**< Bit mask for GPIO_TD2PEN */
    1073. 

  1073. #define _GPIO_ROUTE_TD2PEN_DEFAULT                        0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1074. 

  1074. #define GPIO_ROUTE_TD2PEN_DEFAULT                         (_GPIO_ROUTE_TD2PEN_DEFAULT << 15)   /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1075. 

  1075. #define GPIO_ROUTE_TD3PEN                                 (0x1UL << 16)                        /**< ETM Trace Data Pin Enable */
    1076. 

  1076. #define _GPIO_ROUTE_TD3PEN_SHIFT                          16                                   /**< Shift value for GPIO_TD3PEN */
    1077. 

  1077. #define _GPIO_ROUTE_TD3PEN_MASK                           0x10000UL                            /**< Bit mask for GPIO_TD3PEN */
    1078. 

  1078. #define _GPIO_ROUTE_TD3PEN_DEFAULT                        0x00000000UL                         /**< Mode DEFAULT for GPIO_ROUTE */
    1079. 

  1079. #define GPIO_ROUTE_TD3PEN_DEFAULT                         (_GPIO_ROUTE_TD3PEN_DEFAULT << 16)   /**< Shifted mode DEFAULT for GPIO_ROUTE */
    1080. 

  1080. #define _GPIO_ROUTE_ETMLOCATION_SHIFT                     24                                   /**< Shift value for GPIO_ETMLOCATION */
    1081. 

  1081. #define _GPIO_ROUTE_ETMLOCATION_MASK                      0x3000000UL                          /**< Bit mask for GPIO_ETMLOCATION */
    1082. 

  1082. #define _GPIO_ROUTE_ETMLOCATION_LOC0                      0x00000000UL                         /**< Mode LOC0 for GPIO_ROUTE */
    1083. 

  1083. #define _GPIO_ROUTE_ETMLOCATION_LOC1                      0x00000001UL                         /**< Mode LOC1 for GPIO_ROUTE */
    1084. 

  1084. #define _GPIO_ROUTE_ETMLOCATION_LOC2                      0x00000002UL                         /**< Mode LOC2 for GPIO_ROUTE */
    1085. 

  1085. #define _GPIO_ROUTE_ETMLOCATION_LOC3                      0x00000003UL                         /**< Mode LOC3 for GPIO_ROUTE */
    1086. 

  1086. #define GPIO_ROUTE_ETMLOCATION_LOC0                       (_GPIO_ROUTE_ETMLOCATION_LOC0 << 24) /**< Shifted mode LOC0 for GPIO_ROUTE */
    1087. 

  1087. #define GPIO_ROUTE_ETMLOCATION_LOC1                       (_GPIO_ROUTE_ETMLOCATION_LOC1 << 24) /**< Shifted mode LOC1 for GPIO_ROUTE */
    1088. 

  1088. #define GPIO_ROUTE_ETMLOCATION_LOC2                       (_GPIO_ROUTE_ETMLOCATION_LOC2 << 24) /**< Shifted mode LOC2 for GPIO_ROUTE */
    1089. 

  1089. #define GPIO_ROUTE_ETMLOCATION_LOC3                       (_GPIO_ROUTE_ETMLOCATION_LOC3 << 24) /**< Shifted mode LOC3 for GPIO_ROUTE */
    1090. 

  1090. 

  1091. /* Bit fields for GPIO INSENSE */
    1092. 

  1092. #define _GPIO_INSENSE_RESETVALUE                          0x00000003UL                     /**< Default value for GPIO_INSENSE */
    1093. 

  1093. #define _GPIO_INSENSE_MASK                                0x00000003UL                     /**< Mask for GPIO_INSENSE */
    1094. 

  1094. #define GPIO_INSENSE_INT                                  (0x1UL << 0)                     /**< Interrupt Sense Enable */
    1095. 

  1095. #define _GPIO_INSENSE_INT_SHIFT                           0                                /**< Shift value for GPIO_INT */
    1096. 

  1096. #define _GPIO_INSENSE_INT_MASK                            0x1UL                            /**< Bit mask for GPIO_INT */
    1097. 

  1097. #define _GPIO_INSENSE_INT_DEFAULT                         0x00000001UL                     /**< Mode DEFAULT for GPIO_INSENSE */
    1098. 

  1098. #define GPIO_INSENSE_INT_DEFAULT                          (_GPIO_INSENSE_INT_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_INSENSE */
    1099. 

  1099. #define GPIO_INSENSE_PRS                                  (0x1UL << 1)                     /**< PRS Sense Enable */
    1100. 

  1100. #define _GPIO_INSENSE_PRS_SHIFT                           1                                /**< Shift value for GPIO_PRS */
    1101. 

  1101. #define _GPIO_INSENSE_PRS_MASK                            0x2UL                            /**< Bit mask for GPIO_PRS */
    1102. 

  1102. #define _GPIO_INSENSE_PRS_DEFAULT                         0x00000001UL                     /**< Mode DEFAULT for GPIO_INSENSE */
    1103. 

  1103. #define GPIO_INSENSE_PRS_DEFAULT                          (_GPIO_INSENSE_PRS_DEFAULT << 1) /**< Shifted mode DEFAULT for GPIO_INSENSE */
    1104. 

  1104. 

  1105. /* Bit fields for GPIO LOCK */
    1106. 

  1106. #define _GPIO_LOCK_RESETVALUE                             0x00000000UL                       /**< Default value for GPIO_LOCK */
    1107. 

  1107. #define _GPIO_LOCK_MASK                                   0x0000FFFFUL                       /**< Mask for GPIO_LOCK */
    1108. 

  1108. #define _GPIO_LOCK_LOCKKEY_SHIFT                          0                                  /**< Shift value for GPIO_LOCKKEY */
    1109. 

  1109. #define _GPIO_LOCK_LOCKKEY_MASK                           0xFFFFUL                           /**< Bit mask for GPIO_LOCKKEY */
    1110. 

  1110. #define _GPIO_LOCK_LOCKKEY_DEFAULT                        0x00000000UL                       /**< Mode DEFAULT for GPIO_LOCK */
    1111. 

  1111. #define _GPIO_LOCK_LOCKKEY_LOCK                           0x00000000UL                       /**< Mode LOCK for GPIO_LOCK */
    1112. 

  1112. #define _GPIO_LOCK_LOCKKEY_UNLOCKED                       0x00000000UL                       /**< Mode UNLOCKED for GPIO_LOCK */
    1113. 

  1113. #define _GPIO_LOCK_LOCKKEY_LOCKED                         0x00000001UL                       /**< Mode LOCKED for GPIO_LOCK */
    1114. 

  1114. #define _GPIO_LOCK_LOCKKEY_UNLOCK                         0x0000A534UL                       /**< Mode UNLOCK for GPIO_LOCK */
    1115. 

  1115. #define GPIO_LOCK_LOCKKEY_DEFAULT                         (_GPIO_LOCK_LOCKKEY_DEFAULT << 0)  /**< Shifted mode DEFAULT for GPIO_LOCK */
    1116. 

  1116. #define GPIO_LOCK_LOCKKEY_LOCK                            (_GPIO_LOCK_LOCKKEY_LOCK << 0)     /**< Shifted mode LOCK for GPIO_LOCK */
    1117. 

  1117. #define GPIO_LOCK_LOCKKEY_UNLOCKED                        (_GPIO_LOCK_LOCKKEY_UNLOCKED << 0) /**< Shifted mode UNLOCKED for GPIO_LOCK */
    1118. 

  1118. #define GPIO_LOCK_LOCKKEY_LOCKED                          (_GPIO_LOCK_LOCKKEY_LOCKED << 0)   /**< Shifted mode LOCKED for GPIO_LOCK */
    1119. 

  1119. #define GPIO_LOCK_LOCKKEY_UNLOCK                          (_GPIO_LOCK_LOCKKEY_UNLOCK << 0)   /**< Shifted mode UNLOCK for GPIO_LOCK */
    1120. 

  1120. 

  1121. /* Bit fields for GPIO CTRL */
    1122. 

  1122. #define _GPIO_CTRL_RESETVALUE                             0x00000000UL                     /**< Default value for GPIO_CTRL */
    1123. 

  1123. #define _GPIO_CTRL_MASK                                   0x00000001UL                     /**< Mask for GPIO_CTRL */
    1124. 

  1124. #define GPIO_CTRL_EM4RET                                  (0x1UL << 0)                     /**< Enable EM4 retention */
    1125. 

  1125. #define _GPIO_CTRL_EM4RET_SHIFT                           0                                /**< Shift value for GPIO_EM4RET */
    1126. 

  1126. #define _GPIO_CTRL_EM4RET_MASK                            0x1UL                            /**< Bit mask for GPIO_EM4RET */
    1127. 

  1127. #define _GPIO_CTRL_EM4RET_DEFAULT                         0x00000000UL                     /**< Mode DEFAULT for GPIO_CTRL */
    1128. 

  1128. #define GPIO_CTRL_EM4RET_DEFAULT                          (_GPIO_CTRL_EM4RET_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_CTRL */
    1129. 

  1129. 

  1130. /* Bit fields for GPIO CMD */
    1131. 

  1131. #define _GPIO_CMD_RESETVALUE                              0x00000000UL                      /**< Default value for GPIO_CMD */
    1132. 

  1132. #define _GPIO_CMD_MASK                                    0x00000001UL                      /**< Mask for GPIO_CMD */
    1133. 

  1133. #define GPIO_CMD_EM4WUCLR                                 (0x1UL << 0)                      /**< EM4 Wake-up clear */
    1134. 

  1134. #define _GPIO_CMD_EM4WUCLR_SHIFT                          0                                 /**< Shift value for GPIO_EM4WUCLR */
    1135. 

  1135. #define _GPIO_CMD_EM4WUCLR_MASK                           0x1UL                             /**< Bit mask for GPIO_EM4WUCLR */
    1136. 

  1136. #define _GPIO_CMD_EM4WUCLR_DEFAULT                        0x00000000UL                      /**< Mode DEFAULT for GPIO_CMD */
    1137. 

  1137. #define GPIO_CMD_EM4WUCLR_DEFAULT                         (_GPIO_CMD_EM4WUCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_CMD */
    1138. 

  1138. 

  1139. /* Bit fields for GPIO EM4WUEN */
    1140. 

  1140. #define _GPIO_EM4WUEN_RESETVALUE                          0x00000000UL                         /**< Default value for GPIO_EM4WUEN */
    1141. 

  1141. #define _GPIO_EM4WUEN_MASK                                0x0000003FUL                         /**< Mask for GPIO_EM4WUEN */
    1142. 

  1142. #define _GPIO_EM4WUEN_EM4WUEN_SHIFT                       0                                    /**< Shift value for GPIO_EM4WUEN */
    1143. 

  1143. #define _GPIO_EM4WUEN_EM4WUEN_MASK                        0x3FUL                               /**< Bit mask for GPIO_EM4WUEN */
    1144. 

  1144. #define _GPIO_EM4WUEN_EM4WUEN_DEFAULT                     0x00000000UL                         /**< Mode DEFAULT for GPIO_EM4WUEN */
    1145. 

  1145. #define _GPIO_EM4WUEN_EM4WUEN_A0                          0x00000001UL                         /**< Mode A0 for GPIO_EM4WUEN */
    1146. 

  1146. #define _GPIO_EM4WUEN_EM4WUEN_A6                          0x00000002UL                         /**< Mode A6 for GPIO_EM4WUEN */
    1147. 

  1147. #define _GPIO_EM4WUEN_EM4WUEN_C9                          0x00000004UL                         /**< Mode C9 for GPIO_EM4WUEN */
    1148. 

  1148. #define _GPIO_EM4WUEN_EM4WUEN_F1                          0x00000008UL                         /**< Mode F1 for GPIO_EM4WUEN */
    1149. 

  1149. #define _GPIO_EM4WUEN_EM4WUEN_F2                          0x00000010UL                         /**< Mode F2 for GPIO_EM4WUEN */
    1150. 

  1150. #define _GPIO_EM4WUEN_EM4WUEN_E13                         0x00000020UL                         /**< Mode E13 for GPIO_EM4WUEN */
    1151. 

  1151. #define GPIO_EM4WUEN_EM4WUEN_DEFAULT                      (_GPIO_EM4WUEN_EM4WUEN_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_EM4WUEN */
    1152. 

  1152. #define GPIO_EM4WUEN_EM4WUEN_A0                           (_GPIO_EM4WUEN_EM4WUEN_A0 << 0)      /**< Shifted mode A0 for GPIO_EM4WUEN */
    1153. 

  1153. #define GPIO_EM4WUEN_EM4WUEN_A6                           (_GPIO_EM4WUEN_EM4WUEN_A6 << 0)      /**< Shifted mode A6 for GPIO_EM4WUEN */
    1154. 

  1154. #define GPIO_EM4WUEN_EM4WUEN_C9                           (_GPIO_EM4WUEN_EM4WUEN_C9 << 0)      /**< Shifted mode C9 for GPIO_EM4WUEN */
    1155. 

  1155. #define GPIO_EM4WUEN_EM4WUEN_F1                           (_GPIO_EM4WUEN_EM4WUEN_F1 << 0)      /**< Shifted mode F1 for GPIO_EM4WUEN */
    1156. 

  1156. #define GPIO_EM4WUEN_EM4WUEN_F2                           (_GPIO_EM4WUEN_EM4WUEN_F2 << 0)      /**< Shifted mode F2 for GPIO_EM4WUEN */
    1157. 

  1157. #define GPIO_EM4WUEN_EM4WUEN_E13                          (_GPIO_EM4WUEN_EM4WUEN_E13 << 0)     /**< Shifted mode E13 for GPIO_EM4WUEN */
    1158. 

  1158. 

  1159. /* Bit fields for GPIO EM4WUPOL */
    1160. 

  1160. #define _GPIO_EM4WUPOL_RESETVALUE                         0x00000000UL                           /**< Default value for GPIO_EM4WUPOL */
    1161. 

  1161. #define _GPIO_EM4WUPOL_MASK                               0x0000003FUL                           /**< Mask for GPIO_EM4WUPOL */
    1162. 

  1162. #define _GPIO_EM4WUPOL_EM4WUPOL_SHIFT                     0                                      /**< Shift value for GPIO_EM4WUPOL */
    1163. 

  1163. #define _GPIO_EM4WUPOL_EM4WUPOL_MASK                      0x3FUL                                 /**< Bit mask for GPIO_EM4WUPOL */
    1164. 

  1164. #define _GPIO_EM4WUPOL_EM4WUPOL_DEFAULT                   0x00000000UL                           /**< Mode DEFAULT for GPIO_EM4WUPOL */
    1165. 

  1165. #define _GPIO_EM4WUPOL_EM4WUPOL_A0                        0x00000001UL                           /**< Mode A0 for GPIO_EM4WUPOL */
    1166. 

  1166. #define _GPIO_EM4WUPOL_EM4WUPOL_A6                        0x00000002UL                           /**< Mode A6 for GPIO_EM4WUPOL */
    1167. 

  1167. #define _GPIO_EM4WUPOL_EM4WUPOL_C9                        0x00000004UL                           /**< Mode C9 for GPIO_EM4WUPOL */
    1168. 

  1168. #define _GPIO_EM4WUPOL_EM4WUPOL_F1                        0x00000008UL                           /**< Mode F1 for GPIO_EM4WUPOL */
    1169. 

  1169. #define _GPIO_EM4WUPOL_EM4WUPOL_F2                        0x00000010UL                           /**< Mode F2 for GPIO_EM4WUPOL */
    1170. 

  1170. #define _GPIO_EM4WUPOL_EM4WUPOL_E13                       0x00000020UL                           /**< Mode E13 for GPIO_EM4WUPOL */
    1171. 

  1171. #define GPIO_EM4WUPOL_EM4WUPOL_DEFAULT                    (_GPIO_EM4WUPOL_EM4WUPOL_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_EM4WUPOL */
    1172. 

  1172. #define GPIO_EM4WUPOL_EM4WUPOL_A0                         (_GPIO_EM4WUPOL_EM4WUPOL_A0 << 0)      /**< Shifted mode A0 for GPIO_EM4WUPOL */
    1173. 

  1173. #define GPIO_EM4WUPOL_EM4WUPOL_A6                         (_GPIO_EM4WUPOL_EM4WUPOL_A6 << 0)      /**< Shifted mode A6 for GPIO_EM4WUPOL */
    1174. 

  1174. #define GPIO_EM4WUPOL_EM4WUPOL_C9                         (_GPIO_EM4WUPOL_EM4WUPOL_C9 << 0)      /**< Shifted mode C9 for GPIO_EM4WUPOL */
    1175. 

  1175. #define GPIO_EM4WUPOL_EM4WUPOL_F1                         (_GPIO_EM4WUPOL_EM4WUPOL_F1 << 0)      /**< Shifted mode F1 for GPIO_EM4WUPOL */
    1176. 

  1176. #define GPIO_EM4WUPOL_EM4WUPOL_F2                         (_GPIO_EM4WUPOL_EM4WUPOL_F2 << 0)      /**< Shifted mode F2 for GPIO_EM4WUPOL */
    1177. 

  1177. #define GPIO_EM4WUPOL_EM4WUPOL_E13                        (_GPIO_EM4WUPOL_EM4WUPOL_E13 << 0)     /**< Shifted mode E13 for GPIO_EM4WUPOL */
    1178. 

  1178. 

  1179. /* Bit fields for GPIO EM4WUCAUSE */
    1180. 

  1180. #define _GPIO_EM4WUCAUSE_RESETVALUE                       0x00000000UL                               /**< Default value for GPIO_EM4WUCAUSE */
    1181. 

  1181. #define _GPIO_EM4WUCAUSE_MASK                             0x0000003FUL                               /**< Mask for GPIO_EM4WUCAUSE */
    1182. 

  1182. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_SHIFT                 0                                          /**< Shift value for GPIO_EM4WUCAUSE */
    1183. 

  1183. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_MASK                  0x3FUL                                     /**< Bit mask for GPIO_EM4WUCAUSE */
    1184. 

  1184. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_DEFAULT               0x00000000UL                               /**< Mode DEFAULT for GPIO_EM4WUCAUSE */
    1185. 

  1185. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_A0                    0x00000001UL                               /**< Mode A0 for GPIO_EM4WUCAUSE */
    1186. 

  1186. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_A6                    0x00000002UL                               /**< Mode A6 for GPIO_EM4WUCAUSE */
    1187. 

  1187. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_C9                    0x00000004UL                               /**< Mode C9 for GPIO_EM4WUCAUSE */
    1188. 

  1188. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_F1                    0x00000008UL                               /**< Mode F1 for GPIO_EM4WUCAUSE */
    1189. 

  1189. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_F2                    0x00000010UL                               /**< Mode F2 for GPIO_EM4WUCAUSE */
    1190. 

  1190. #define _GPIO_EM4WUCAUSE_EM4WUCAUSE_E13                   0x00000020UL                               /**< Mode E13 for GPIO_EM4WUCAUSE */
    1191. 

  1191. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_DEFAULT                (_GPIO_EM4WUCAUSE_EM4WUCAUSE_DEFAULT << 0) /**< Shifted mode DEFAULT for GPIO_EM4WUCAUSE */
    1192. 

  1192. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_A0                     (_GPIO_EM4WUCAUSE_EM4WUCAUSE_A0 << 0)      /**< Shifted mode A0 for GPIO_EM4WUCAUSE */
    1193. 

  1193. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_A6                     (_GPIO_EM4WUCAUSE_EM4WUCAUSE_A6 << 0)      /**< Shifted mode A6 for GPIO_EM4WUCAUSE */
    1194. 

  1194. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_C9                     (_GPIO_EM4WUCAUSE_EM4WUCAUSE_C9 << 0)      /**< Shifted mode C9 for GPIO_EM4WUCAUSE */
    1195. 

  1195. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_F1                     (_GPIO_EM4WUCAUSE_EM4WUCAUSE_F1 << 0)      /**< Shifted mode F1 for GPIO_EM4WUCAUSE */
    1196. 

  1196. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_F2                     (_GPIO_EM4WUCAUSE_EM4WUCAUSE_F2 << 0)      /**< Shifted mode F2 for GPIO_EM4WUCAUSE */
    1197. 

  1197. #define GPIO_EM4WUCAUSE_EM4WUCAUSE_E13                    (_GPIO_EM4WUCAUSE_EM4WUCAUSE_E13 << 0)     /**< Shifted mode E13 for GPIO_EM4WUCAUSE */
    1198. 

  1198. 

  1199. /** @} End of group EFM32GG_GPIO */
    1200. 

  1200. 

  1201.