stm32f4xx_hal_spdifrx.c 42 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_spdifrx.c
  4. * @author MCD Application Team
  5. * @version V1.6.0
  6. * @date 04-November-2016
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the SPDIFRX audio interface:
  9. * + Initialization and Configuration
  10. * + Data transfers functions
  11. * + DMA transfers management
  12. * + Interrupts and flags management
  13. @verbatim
  14. ===============================================================================
  15. ##### How to use this driver #####
  16. ===============================================================================
  17. [..]
  18. The SPDIFRX HAL driver can be used as follow:
  19. (#) Declare SPDIFRX_HandleTypeDef handle structure.
  20. (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
  21. (##) Enable the SPDIFRX interface clock.
  22. (##) SPDIFRX pins configuration:
  23. (+++) Enable the clock for the SPDIFRX GPIOs.
  24. (+++) Configure these SPDIFRX pins as alternate function pull-up.
  25. (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
  26. (+++) Configure the SPDIFRX interrupt priority.
  27. (+++) Enable the NVIC SPDIFRX IRQ handle.
  28. (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
  29. (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
  30. (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
  31. (+++) Enable the DMAx interface clock.
  32. (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
  33. (+++) Configure the DMA Channel.
  34. (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
  35. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  36. DMA CtrlRx/DataRx channel.
  37. (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
  38. using HAL_SPDIFRX_Init() function.
  39. -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
  40. __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
  41. -@- Make sure that ck_spdif clock is configured.
  42. (#) Three operation modes are available within this driver :
  43. *** Polling mode for reception operation (for debug purpose) ***
  44. ================================================================
  45. [..]
  46. (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
  47. (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
  48. *** Interrupt mode for reception operation ***
  49. =========================================
  50. [..]
  51. (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
  52. (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
  53. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  54. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  55. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  56. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  57. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  58. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  59. *** DMA mode for reception operation ***
  60. ========================================
  61. [..]
  62. (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
  63. (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
  64. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  66. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  67. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  68. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  69. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  70. (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
  71. *** SPDIFRX HAL driver macros list ***
  72. =============================================
  73. [..]
  74. Below the list of most used macros in SPDIFRX HAL driver.
  75. (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
  76. (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
  77. (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
  78. (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
  79. (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
  80. (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
  81. [..]
  82. (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
  83. @endverbatim
  84. ******************************************************************************
  85. * @attention
  86. *
  87. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  88. *
  89. * Redistribution and use in source and binary forms, with or without modification,
  90. * are permitted provided that the following conditions are met:
  91. * 1. Redistributions of source code must retain the above copyright notice,
  92. * this list of conditions and the following disclaimer.
  93. * 2. Redistributions in binary form must reproduce the above copyright notice,
  94. * this list of conditions and the following disclaimer in the documentation
  95. * and/or other materials provided with the distribution.
  96. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  97. * may be used to endorse or promote products derived from this software
  98. * without specific prior written permission.
  99. *
  100. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  101. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  102. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  103. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  104. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  105. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  106. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  107. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  108. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  109. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  110. *
  111. ******************************************************************************
  112. */
  113. /* Includes ------------------------------------------------------------------*/
  114. #include "stm32f4xx_hal.h"
  115. /** @addtogroup STM32F4xx_HAL_Driver
  116. * @{
  117. */
  118. /** @defgroup SPDIFRX SPDIFRX
  119. * @brief SPDIFRX HAL module driver
  120. * @{
  121. */
  122. #ifdef HAL_SPDIFRX_MODULE_ENABLED
  123. #if defined(STM32F446xx)
  124. /* Private typedef -----------------------------------------------------------*/
  125. /* Private define ------------------------------------------------------------*/
  126. #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
  127. /* Private macro -------------------------------------------------------------*/
  128. /* Private variables ---------------------------------------------------------*/
  129. /* Private function prototypes -----------------------------------------------*/
  130. /** @addtogroup SPDIFRX_Private_Functions
  131. * @{
  132. */
  133. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
  134. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  135. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
  136. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
  137. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
  138. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  139. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  140. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  141. /**
  142. * @}
  143. */
  144. /* Exported functions ---------------------------------------------------------*/
  145. /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
  146. * @{
  147. */
  148. /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
  149. * @brief Initialization and Configuration functions
  150. *
  151. @verbatim
  152. ===============================================================================
  153. ##### Initialization and de-initialization functions #####
  154. ===============================================================================
  155. [..] This subsection provides a set of functions allowing to initialize and
  156. de-initialize the SPDIFRX peripheral:
  157. (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
  158. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  159. (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
  160. the selected configuration:
  161. (++) Input Selection (IN0, IN1,...)
  162. (++) Maximum allowed re-tries during synchronization phase
  163. (++) Wait for activity on SPDIF selected input
  164. (++) Channel status selection (from channel A or B)
  165. (++) Data format (LSB, MSB, ...)
  166. (++) Stereo mode
  167. (++) User bits masking (PT,C,U,V,...)
  168. (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
  169. of the selected SPDIFRXx peripheral.
  170. @endverbatim
  171. * @{
  172. */
  173. /**
  174. * @brief Initializes the SPDIFRX according to the specified parameters
  175. * in the SPDIFRX_InitTypeDef and create the associated handle.
  176. * @param hspdif: SPDIFRX handle
  177. * @retval HAL status
  178. */
  179. HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
  180. {
  181. uint32_t tmpreg = 0U;
  182. /* Check the SPDIFRX handle allocation */
  183. if(hspdif == NULL)
  184. {
  185. return HAL_ERROR;
  186. }
  187. /* Check the SPDIFRX parameters */
  188. assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
  189. assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
  190. assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
  191. assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
  192. assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
  193. assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
  194. assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
  195. assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
  196. assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
  197. assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
  198. if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
  199. {
  200. /* Allocate lock resource and initialize it */
  201. hspdif->Lock = HAL_UNLOCKED;
  202. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  203. HAL_SPDIFRX_MspInit(hspdif);
  204. }
  205. /* SPDIFRX peripheral state is BUSY*/
  206. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  207. /* Disable SPDIFRX interface (IDLE State) */
  208. __HAL_SPDIFRX_IDLE(hspdif);
  209. /* Reset the old SPDIFRX CR configuration */
  210. tmpreg = hspdif->Instance->CR;
  211. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  212. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
  213. SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
  214. SPDIFRX_CR_INSEL);
  215. /* Sets the new configuration of the SPDIFRX peripheral */
  216. tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
  217. hspdif->Init.InputSelection |
  218. hspdif->Init.Retries |
  219. hspdif->Init.WaitForActivity |
  220. hspdif->Init.ChannelSelection |
  221. hspdif->Init.DataFormat |
  222. hspdif->Init.PreambleTypeMask |
  223. hspdif->Init.ChannelStatusMask |
  224. hspdif->Init.ValidityBitMask |
  225. hspdif->Init.ParityErrorMask);
  226. hspdif->Instance->CR = tmpreg;
  227. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  228. /* SPDIFRX peripheral state is READY*/
  229. hspdif->State = HAL_SPDIFRX_STATE_READY;
  230. return HAL_OK;
  231. }
  232. /**
  233. * @brief DeInitializes the SPDIFRX peripheral
  234. * @param hspdif: SPDIFRX handle
  235. * @retval HAL status
  236. */
  237. HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
  238. {
  239. /* Check the SPDIFRX handle allocation */
  240. if(hspdif == NULL)
  241. {
  242. return HAL_ERROR;
  243. }
  244. /* Check the parameters */
  245. assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
  246. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  247. /* Disable SPDIFRX interface (IDLE state) */
  248. __HAL_SPDIFRX_IDLE(hspdif);
  249. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  250. HAL_SPDIFRX_MspDeInit(hspdif);
  251. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  252. /* SPDIFRX peripheral state is RESET*/
  253. hspdif->State = HAL_SPDIFRX_STATE_RESET;
  254. /* Release Lock */
  255. __HAL_UNLOCK(hspdif);
  256. return HAL_OK;
  257. }
  258. /**
  259. * @brief SPDIFRX MSP Init
  260. * @param hspdif: SPDIFRX handle
  261. * @retval None
  262. */
  263. __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
  264. {
  265. /* Prevent unused argument(s) compilation warning */
  266. UNUSED(hspdif);
  267. /* NOTE : This function Should not be modified, when the callback is needed,
  268. the HAL_SPDIFRX_MspInit could be implemented in the user file
  269. */
  270. }
  271. /**
  272. * @brief SPDIFRX MSP DeInit
  273. * @param hspdif: SPDIFRX handle
  274. * @retval None
  275. */
  276. __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
  277. {
  278. /* Prevent unused argument(s) compilation warning */
  279. UNUSED(hspdif);
  280. /* NOTE : This function Should not be modified, when the callback is needed,
  281. the HAL_SPDIFRX_MspDeInit could be implemented in the user file
  282. */
  283. }
  284. /**
  285. * @brief Sets the SPDIFRX dtat format according to the specified parameters
  286. * in the SPDIFRX_InitTypeDef.
  287. * @param hspdif: SPDIFRX handle
  288. * @param sDataFormat: SPDIFRX data format
  289. * @retval HAL status
  290. */
  291. HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
  292. {
  293. uint32_t tmpreg = 0U;
  294. /* Check the SPDIFRX handle allocation */
  295. if(hspdif == NULL)
  296. {
  297. return HAL_ERROR;
  298. }
  299. /* Check the SPDIFRX parameters */
  300. assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
  301. assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
  302. assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
  303. assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
  304. assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
  305. assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
  306. /* Reset the old SPDIFRX CR configuration */
  307. tmpreg = hspdif->Instance->CR;
  308. if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
  309. (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
  310. ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
  311. {
  312. return HAL_ERROR;
  313. }
  314. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  315. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
  316. /* Sets the new configuration of the SPDIFRX peripheral */
  317. tmpreg |= ((uint16_t) sDataFormat.StereoMode |
  318. sDataFormat.DataFormat |
  319. sDataFormat.PreambleTypeMask |
  320. sDataFormat.ChannelStatusMask |
  321. sDataFormat.ValidityBitMask |
  322. sDataFormat.ParityErrorMask);
  323. hspdif->Instance->CR = tmpreg;
  324. return HAL_OK;
  325. }
  326. /**
  327. * @}
  328. */
  329. /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
  330. * @brief Data transfers functions
  331. *
  332. @verbatim
  333. ===============================================================================
  334. ##### IO operation functions #####
  335. ===============================================================================
  336. [..]
  337. This subsection provides a set of functions allowing to manage the SPDIFRX data
  338. transfers.
  339. (#) There is two mode of transfer:
  340. (++) Blocking mode : The communication is performed in the polling mode.
  341. The status of all data processing is returned by the same function
  342. after finishing transfer.
  343. (++) No-Blocking mode : The communication is performed using Interrupts
  344. or DMA. These functions return the status of the transfer start-up.
  345. The end of the data processing will be indicated through the
  346. dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
  347. using DMA mode.
  348. (#) Blocking mode functions are :
  349. (++) HAL_SPDIFRX_ReceiveDataFlow()
  350. (++) HAL_SPDIFRX_ReceiveControlFlow()
  351. (+@) Do not use blocking mode to receive both control and data flow at the same time.
  352. (#) No-Blocking mode functions with Interrupt are :
  353. (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
  354. (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
  355. (#) No-Blocking mode functions with DMA are :
  356. (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
  357. (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
  358. (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
  359. (++) HAL_SPDIFRX_RxCpltCallback()
  360. (++) HAL_SPDIFRX_ErrorCallback()
  361. @endverbatim
  362. * @{
  363. */
  364. /**
  365. * @brief Receives an amount of data (Data Flow) in blocking mode.
  366. * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
  367. * the configuration information for SPDIFRX module.
  368. * @param pData: Pointer to data buffer
  369. * @param Size: Amount of data to be received
  370. * @param Timeout: Timeout duration
  371. * @retval HAL status
  372. */
  373. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  374. {
  375. if((pData == NULL ) || (Size == 0U))
  376. {
  377. return HAL_ERROR;
  378. }
  379. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  380. {
  381. /* Process Locked */
  382. __HAL_LOCK(hspdif);
  383. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  384. /* Start synchronisation */
  385. __HAL_SPDIFRX_SYNC(hspdif);
  386. /* Wait until SYNCD flag is set */
  387. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  388. {
  389. return HAL_TIMEOUT;
  390. }
  391. /* Start reception */
  392. __HAL_SPDIFRX_RCV(hspdif);
  393. /* Receive data flow */
  394. while(Size > 0U)
  395. {
  396. /* Wait until RXNE flag is set */
  397. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  398. {
  399. return HAL_TIMEOUT;
  400. }
  401. (*pData++) = hspdif->Instance->DR;
  402. Size--;
  403. }
  404. /* SPDIFRX ready */
  405. hspdif->State = HAL_SPDIFRX_STATE_READY;
  406. /* Process Unlocked */
  407. __HAL_UNLOCK(hspdif);
  408. return HAL_OK;
  409. }
  410. else
  411. {
  412. return HAL_BUSY;
  413. }
  414. }
  415. /**
  416. * @brief Receives an amount of data (Control Flow) in blocking mode.
  417. * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
  418. * the configuration information for SPDIFRX module.
  419. * @param pData: Pointer to data buffer
  420. * @param Size: Amount of data to be received
  421. * @param Timeout: Timeout duration
  422. * @retval HAL status
  423. */
  424. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  425. {
  426. if((pData == NULL ) || (Size == 0U))
  427. {
  428. return HAL_ERROR;
  429. }
  430. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  431. {
  432. /* Process Locked */
  433. __HAL_LOCK(hspdif);
  434. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  435. /* Start synchronization */
  436. __HAL_SPDIFRX_SYNC(hspdif);
  437. /* Wait until SYNCD flag is set */
  438. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  439. {
  440. return HAL_TIMEOUT;
  441. }
  442. /* Start reception */
  443. __HAL_SPDIFRX_RCV(hspdif);
  444. /* Receive control flow */
  445. while(Size > 0U)
  446. {
  447. /* Wait until CSRNE flag is set */
  448. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
  449. {
  450. return HAL_TIMEOUT;
  451. }
  452. (*pData++) = hspdif->Instance->CSR;
  453. Size--;
  454. }
  455. /* SPDIFRX ready */
  456. hspdif->State = HAL_SPDIFRX_STATE_READY;
  457. /* Process Unlocked */
  458. __HAL_UNLOCK(hspdif);
  459. return HAL_OK;
  460. }
  461. else
  462. {
  463. return HAL_BUSY;
  464. }
  465. }
  466. /**
  467. * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
  468. * @param hspdif: SPDIFRX handle
  469. * @param pData: a 32-bit pointer to the Receive data buffer.
  470. * @param Size: number of data sample to be received .
  471. * @retval HAL status
  472. */
  473. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  474. {
  475. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  476. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  477. {
  478. if((pData == NULL) || (Size == 0U))
  479. {
  480. return HAL_ERROR;
  481. }
  482. /* Process Locked */
  483. __HAL_LOCK(hspdif);
  484. hspdif->pRxBuffPtr = pData;
  485. hspdif->RxXferSize = Size;
  486. hspdif->RxXferCount = Size;
  487. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  488. /* Check if a receive process is ongoing or not */
  489. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  490. /* Enable the SPDIFRX PE Error Interrupt */
  491. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  492. /* Enable the SPDIFRX OVR Error Interrupt */
  493. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  494. /* Process Unlocked */
  495. __HAL_UNLOCK(hspdif);
  496. /* Enable the SPDIFRX RXNE interrupt */
  497. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  498. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  499. {
  500. /* Start synchronization */
  501. __HAL_SPDIFRX_SYNC(hspdif);
  502. /* Wait until SYNCD flag is set */
  503. do
  504. {
  505. if (count-- == 0)
  506. {
  507. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  508. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  509. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  510. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  511. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  512. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  513. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  514. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  515. hspdif->State= HAL_SPDIFRX_STATE_READY;
  516. /* Process Unlocked */
  517. __HAL_UNLOCK(hspdif);
  518. return HAL_TIMEOUT;
  519. }
  520. }
  521. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  522. /* Start reception */
  523. __HAL_SPDIFRX_RCV(hspdif);
  524. }
  525. return HAL_OK;
  526. }
  527. else
  528. {
  529. return HAL_BUSY;
  530. }
  531. }
  532. /**
  533. * @brief Receive an amount of data (Control Flow) with Interrupt
  534. * @param hspdif: SPDIFRX handle
  535. * @param pData: a 32-bit pointer to the Receive data buffer.
  536. * @param Size: number of data sample (Control Flow) to be received :
  537. * @retval HAL status
  538. */
  539. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  540. {
  541. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  542. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  543. {
  544. if((pData == NULL ) || (Size == 0U))
  545. {
  546. return HAL_ERROR;
  547. }
  548. /* Process Locked */
  549. __HAL_LOCK(hspdif);
  550. hspdif->pCsBuffPtr = pData;
  551. hspdif->CsXferSize = Size;
  552. hspdif->CsXferCount = Size;
  553. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  554. /* Check if a receive process is ongoing or not */
  555. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  556. /* Enable the SPDIFRX PE Error Interrupt */
  557. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  558. /* Enable the SPDIFRX OVR Error Interrupt */
  559. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  560. /* Process Unlocked */
  561. __HAL_UNLOCK(hspdif);
  562. /* Enable the SPDIFRX CSRNE interrupt */
  563. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  564. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  565. {
  566. /* Start synchronization */
  567. __HAL_SPDIFRX_SYNC(hspdif);
  568. /* Wait until SYNCD flag is set */
  569. do
  570. {
  571. if (count-- == 0)
  572. {
  573. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  574. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  575. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  576. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  577. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  578. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  579. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  580. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  581. hspdif->State= HAL_SPDIFRX_STATE_READY;
  582. /* Process Unlocked */
  583. __HAL_UNLOCK(hspdif);
  584. return HAL_TIMEOUT;
  585. }
  586. }
  587. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  588. /* Start reception */
  589. __HAL_SPDIFRX_RCV(hspdif);
  590. }
  591. return HAL_OK;
  592. }
  593. else
  594. {
  595. return HAL_BUSY;
  596. }
  597. }
  598. /**
  599. * @brief Receive an amount of data (Data Flow) mode with DMA
  600. * @param hspdif: SPDIFRX handle
  601. * @param pData: a 32-bit pointer to the Receive data buffer.
  602. * @param Size: number of data sample to be received :
  603. * @retval HAL status
  604. */
  605. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  606. {
  607. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  608. if((pData == NULL) || (Size == 0U))
  609. {
  610. return HAL_ERROR;
  611. }
  612. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  613. {
  614. hspdif->pRxBuffPtr = pData;
  615. hspdif->RxXferSize = Size;
  616. hspdif->RxXferCount = Size;
  617. /* Process Locked */
  618. __HAL_LOCK(hspdif);
  619. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  620. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  621. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  622. hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
  623. /* Set the SPDIFRX Rx DMA transfer complete callback */
  624. hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
  625. /* Set the DMA error callback */
  626. hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
  627. /* Enable the DMA request */
  628. HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
  629. /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
  630. hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
  631. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  632. {
  633. /* Start synchronization */
  634. __HAL_SPDIFRX_SYNC(hspdif);
  635. /* Wait until SYNCD flag is set */
  636. do
  637. {
  638. if (count-- == 0)
  639. {
  640. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  641. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  642. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  643. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  644. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  645. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  646. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  647. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  648. hspdif->State= HAL_SPDIFRX_STATE_READY;
  649. /* Process Unlocked */
  650. __HAL_UNLOCK(hspdif);
  651. return HAL_TIMEOUT;
  652. }
  653. }
  654. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  655. /* Start reception */
  656. __HAL_SPDIFRX_RCV(hspdif);
  657. }
  658. /* Process Unlocked */
  659. __HAL_UNLOCK(hspdif);
  660. return HAL_OK;
  661. }
  662. else
  663. {
  664. return HAL_BUSY;
  665. }
  666. }
  667. /**
  668. * @brief Receive an amount of data (Control Flow) with DMA
  669. * @param hspdif: SPDIFRX handle
  670. * @param pData: a 32-bit pointer to the Receive data buffer.
  671. * @param Size: number of data (Control Flow) sample to be received :
  672. * @retval HAL status
  673. */
  674. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  675. {
  676. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  677. if((pData == NULL) || (Size == 0U))
  678. {
  679. return HAL_ERROR;
  680. }
  681. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  682. {
  683. hspdif->pCsBuffPtr = pData;
  684. hspdif->CsXferSize = Size;
  685. hspdif->CsXferCount = Size;
  686. /* Process Locked */
  687. __HAL_LOCK(hspdif);
  688. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  689. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  690. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  691. hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
  692. /* Set the SPDIFRX Rx DMA transfer complete callback */
  693. hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
  694. /* Set the DMA error callback */
  695. hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
  696. /* Enable the DMA request */
  697. HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
  698. /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
  699. hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
  700. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  701. {
  702. /* Start synchronization */
  703. __HAL_SPDIFRX_SYNC(hspdif);
  704. /* Wait until SYNCD flag is set */
  705. do
  706. {
  707. if (count-- == 0)
  708. {
  709. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  710. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  711. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  712. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  713. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  714. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  715. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  716. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  717. hspdif->State= HAL_SPDIFRX_STATE_READY;
  718. /* Process Unlocked */
  719. __HAL_UNLOCK(hspdif);
  720. return HAL_TIMEOUT;
  721. }
  722. }
  723. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  724. /* Start reception */
  725. __HAL_SPDIFRX_RCV(hspdif);
  726. }
  727. /* Process Unlocked */
  728. __HAL_UNLOCK(hspdif);
  729. return HAL_OK;
  730. }
  731. else
  732. {
  733. return HAL_BUSY;
  734. }
  735. }
  736. /**
  737. * @brief stop the audio stream receive from the Media.
  738. * @param hspdif: SPDIFRX handle
  739. * @retval None
  740. */
  741. HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
  742. {
  743. /* Process Locked */
  744. __HAL_LOCK(hspdif);
  745. /* Disable the SPDIFRX DMA requests */
  746. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  747. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  748. /* Disable the SPDIFRX DMA channel */
  749. __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
  750. __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
  751. /* Disable SPDIFRX peripheral */
  752. __HAL_SPDIFRX_IDLE(hspdif);
  753. hspdif->State = HAL_SPDIFRX_STATE_READY;
  754. /* Process Unlocked */
  755. __HAL_UNLOCK(hspdif);
  756. return HAL_OK;
  757. }
  758. /**
  759. * @brief This function handles SPDIFRX interrupt request.
  760. * @param hspdif: SPDIFRX handle
  761. * @retval HAL status
  762. */
  763. void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
  764. {
  765. /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
  766. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
  767. {
  768. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
  769. SPDIFRX_ReceiveDataFlow_IT(hspdif);
  770. }
  771. /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
  772. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
  773. {
  774. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
  775. SPDIFRX_ReceiveControlFlow_IT(hspdif);
  776. }
  777. /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
  778. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
  779. {
  780. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
  781. /* Change the SPDIFRX error code */
  782. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
  783. /* the transfer is not stopped */
  784. HAL_SPDIFRX_ErrorCallback(hspdif);
  785. }
  786. /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
  787. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
  788. {
  789. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
  790. /* Change the SPDIFRX error code */
  791. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
  792. /* the transfer is not stopped */
  793. HAL_SPDIFRX_ErrorCallback(hspdif);
  794. }
  795. }
  796. /**
  797. * @brief Rx Transfer (Data flow) half completed callbacks
  798. * @param hspdif: SPDIFRX handle
  799. * @retval None
  800. */
  801. __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  802. {
  803. /* Prevent unused argument(s) compilation warning */
  804. UNUSED(hspdif);
  805. /* NOTE : This function Should not be modified, when the callback is needed,
  806. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  807. */
  808. }
  809. /**
  810. * @brief Rx Transfer (Data flow) completed callbacks
  811. * @param hspdif: SPDIFRX handle
  812. * @retval None
  813. */
  814. __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  815. {
  816. /* Prevent unused argument(s) compilation warning */
  817. UNUSED(hspdif);
  818. /* NOTE : This function Should not be modified, when the callback is needed,
  819. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  820. */
  821. }
  822. /**
  823. * @brief Rx (Control flow) Transfer half completed callbacks
  824. * @param hspdif: SPDIFRX handle
  825. * @retval None
  826. */
  827. __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  828. {
  829. /* Prevent unused argument(s) compilation warning */
  830. UNUSED(hspdif);
  831. /* NOTE : This function Should not be modified, when the callback is needed,
  832. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  833. */
  834. }
  835. /**
  836. * @brief Rx Transfer (Control flow) completed callbacks
  837. * @param hspdif: SPDIFRX handle
  838. * @retval None
  839. */
  840. __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  841. {
  842. /* Prevent unused argument(s) compilation warning */
  843. UNUSED(hspdif);
  844. /* NOTE : This function Should not be modified, when the callback is needed,
  845. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  846. */
  847. }
  848. /**
  849. * @brief SPDIFRX error callbacks
  850. * @param hspdif: SPDIFRX handle
  851. * @retval None
  852. */
  853. __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
  854. {
  855. /* Prevent unused argument(s) compilation warning */
  856. UNUSED(hspdif);
  857. /* NOTE : This function Should not be modified, when the callback is needed,
  858. the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
  859. */
  860. }
  861. /**
  862. * @}
  863. */
  864. /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
  865. * @brief Peripheral State functions
  866. *
  867. @verbatim
  868. ===============================================================================
  869. ##### Peripheral State and Errors functions #####
  870. ===============================================================================
  871. [..]
  872. This subsection permit to get in run-time the status of the peripheral
  873. and the data flow.
  874. @endverbatim
  875. * @{
  876. */
  877. /**
  878. * @brief Return the SPDIFRX state
  879. * @param hspdif : SPDIFRX handle
  880. * @retval HAL state
  881. */
  882. HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
  883. {
  884. return hspdif->State;
  885. }
  886. /**
  887. * @brief Return the SPDIFRX error code
  888. * @param hspdif : SPDIFRX handle
  889. * @retval SPDIFRX Error Code
  890. */
  891. uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
  892. {
  893. return hspdif->ErrorCode;
  894. }
  895. /**
  896. * @}
  897. */
  898. /**
  899. * @brief DMA SPDIFRX receive process (Data flow) complete callback
  900. * @param hdma : DMA handle
  901. * @retval None
  902. */
  903. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
  904. {
  905. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  906. /* Disable Rx DMA Request */
  907. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  908. hspdif->RxXferCount = 0U;
  909. hspdif->State = HAL_SPDIFRX_STATE_READY;
  910. HAL_SPDIFRX_RxCpltCallback(hspdif);
  911. }
  912. /**
  913. * @brief DMA SPDIFRX receive process (Data flow) half complete callback
  914. * @param hdma : DMA handle
  915. * @retval None
  916. */
  917. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  918. {
  919. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  920. HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
  921. }
  922. /**
  923. * @brief DMA SPDIFRX receive process (Control flow) complete callback
  924. * @param hdma : DMA handle
  925. * @retval None
  926. */
  927. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
  928. {
  929. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  930. /* Disable Cb DMA Request */
  931. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  932. hspdif->CsXferCount = 0U;
  933. hspdif->State = HAL_SPDIFRX_STATE_READY;
  934. HAL_SPDIFRX_CxCpltCallback(hspdif);
  935. }
  936. /**
  937. * @brief DMA SPDIFRX receive process (Control flow) half complete callback
  938. * @param hdma : DMA handle
  939. * @retval None
  940. */
  941. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
  942. {
  943. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  944. HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
  945. }
  946. /**
  947. * @brief DMA SPDIFRX communication error callback
  948. * @param hdma : DMA handle
  949. * @retval None
  950. */
  951. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
  952. {
  953. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  954. /* Disable Rx and Cb DMA Request */
  955. hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
  956. hspdif->RxXferCount = 0U;
  957. hspdif->State= HAL_SPDIFRX_STATE_READY;
  958. /* Set the error code and execute error callback*/
  959. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
  960. HAL_SPDIFRX_ErrorCallback(hspdif);
  961. }
  962. /**
  963. * @brief Receive an amount of data (Data Flow) with Interrupt
  964. * @param hspdif: SPDIFRX handle
  965. * @retval None
  966. */
  967. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  968. {
  969. /* Receive data */
  970. (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
  971. hspdif->RxXferCount--;
  972. if(hspdif->RxXferCount == 0U)
  973. {
  974. /* Disable RXNE/PE and OVR interrupts */
  975. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
  976. hspdif->State = HAL_SPDIFRX_STATE_READY;
  977. /* Process Unlocked */
  978. __HAL_UNLOCK(hspdif);
  979. HAL_SPDIFRX_RxCpltCallback(hspdif);
  980. }
  981. }
  982. /**
  983. * @brief Receive an amount of data (Control Flow) with Interrupt
  984. * @param hspdif: SPDIFRX handle
  985. * @retval None
  986. */
  987. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  988. {
  989. /* Receive data */
  990. (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
  991. hspdif->CsXferCount--;
  992. if(hspdif->CsXferCount == 0U)
  993. {
  994. /* Disable CSRNE interrupt */
  995. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  996. hspdif->State = HAL_SPDIFRX_STATE_READY;
  997. /* Process Unlocked */
  998. __HAL_UNLOCK(hspdif);
  999. HAL_SPDIFRX_CxCpltCallback(hspdif);
  1000. }
  1001. }
  1002. /**
  1003. * @brief This function handles SPDIFRX Communication Timeout.
  1004. * @param hspdif: SPDIFRX handle
  1005. * @param Flag: Flag checked
  1006. * @param Status: Value of the flag expected
  1007. * @param Timeout: Duration of the timeout
  1008. * @retval HAL status
  1009. */
  1010. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1011. {
  1012. uint32_t tickstart = 0U;
  1013. /* Get tick */
  1014. tickstart = HAL_GetTick();
  1015. /* Wait until flag is set */
  1016. if(Status == RESET)
  1017. {
  1018. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
  1019. {
  1020. /* Check for the Timeout */
  1021. if(Timeout != HAL_MAX_DELAY)
  1022. {
  1023. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1024. {
  1025. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  1026. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  1027. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  1028. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  1029. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  1030. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  1031. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  1032. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  1033. hspdif->State= HAL_SPDIFRX_STATE_READY;
  1034. /* Process Unlocked */
  1035. __HAL_UNLOCK(hspdif);
  1036. return HAL_TIMEOUT;
  1037. }
  1038. }
  1039. }
  1040. }
  1041. else
  1042. {
  1043. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
  1044. {
  1045. /* Check for the Timeout */
  1046. if(Timeout != HAL_MAX_DELAY)
  1047. {
  1048. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1049. {
  1050. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  1051. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  1052. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  1053. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  1054. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  1055. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  1056. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  1057. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  1058. hspdif->State= HAL_SPDIFRX_STATE_READY;
  1059. /* Process Unlocked */
  1060. __HAL_UNLOCK(hspdif);
  1061. return HAL_TIMEOUT;
  1062. }
  1063. }
  1064. }
  1065. }
  1066. return HAL_OK;
  1067. }
  1068. /**
  1069. * @}
  1070. */
  1071. #endif /* STM32F446xx */
  1072. #endif /* HAL_SPDIFRX_MODULE_ENABLED */
  1073. /**
  1074. * @}
  1075. */
  1076. /**
  1077. * @}
  1078. */
  1079. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/