stm32f4xx_hal_i2c.c 165 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.6.0
  6. * @date 04-November-2016
  7. * @brief I2C HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral State, Mode and Error functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. The I2C HAL driver can be used as follows:
  20. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  21. I2C_HandleTypeDef hi2c;
  22. (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
  23. (##) Enable the I2Cx interface clock
  24. (##) I2C pins configuration
  25. (+++) Enable the clock for the I2C GPIOs
  26. (+++) Configure I2C pins as alternate function open-drain
  27. (##) NVIC configuration if you need to use interrupt process
  28. (+++) Configure the I2Cx interrupt priority
  29. (+++) Enable the NVIC I2C IRQ Channel
  30. (##) DMA Configuration if you need to use DMA process
  31. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
  32. (+++) Enable the DMAx interface clock using
  33. (+++) Configure the DMA handle parameters
  34. (+++) Configure the DMA Tx or Rx Stream
  35. (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  36. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  37. the DMA Tx or Rx Stream
  38. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  39. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  40. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  41. (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
  42. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  43. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  44. *** Polling mode IO operation ***
  45. =================================
  46. [..]
  47. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  48. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  49. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  50. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  51. *** Polling mode IO MEM operation ***
  52. =====================================
  53. [..]
  54. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  55. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  56. *** Interrupt mode IO operation ***
  57. ===================================
  58. [..]
  59. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  60. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  61. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  62. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  63. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  64. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  65. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  66. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  67. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  68. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  69. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  70. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  71. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  72. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  73. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  74. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  75. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  76. *** Interrupt mode IO sequential operation ***
  77. ==============================================
  78. [..]
  79. (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  80. when a direction change during transfer
  81. [..]
  82. (+) A specific option field manage the different steps of a sequential transfer
  83. (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
  84. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  85. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  86. and data to transfer without a final stop condition
  87. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  88. and with new data to transfer if the direction change or manage only the new data to transfer
  89. if no direction change and without a final stop condition in both cases
  90. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  91. and with new data to transfer if the direction change or manage only the new data to transfer
  92. if no direction change and with a final stop condition in both cases
  93. (+) Differents sequential I2C interfaces are listed below:
  94. (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
  95. (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
  96. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
  97. (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
  98. (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
  99. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
  100. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  101. (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  102. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  103. (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
  104. (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
  105. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  106. (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
  107. add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
  108. (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
  109. (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
  110. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
  111. (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
  112. (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
  113. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
  114. (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  115. add his own code by customization of function pointer HAL_I2C_ErrorCallback()
  116. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  117. (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  118. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  119. *** Interrupt mode IO MEM operation ***
  120. =======================================
  121. [..]
  122. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  123. HAL_I2C_Mem_Write_IT()
  124. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  125. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  126. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  127. HAL_I2C_Mem_Read_IT()
  128. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  129. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  130. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  131. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  132. *** DMA mode IO operation ***
  133. ==============================
  134. [..]
  135. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  136. HAL_I2C_Master_Transmit_DMA()
  137. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  138. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  139. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  140. HAL_I2C_Master_Receive_DMA()
  141. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  142. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  143. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  144. HAL_I2C_Slave_Transmit_DMA()
  145. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  146. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  147. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  148. HAL_I2C_Slave_Receive_DMA()
  149. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  150. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  151. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  152. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  153. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  154. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  155. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  156. *** DMA mode IO MEM operation ***
  157. =================================
  158. [..]
  159. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  160. HAL_I2C_Mem_Write_DMA()
  161. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  162. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  163. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  164. HAL_I2C_Mem_Read_DMA()
  165. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  166. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  167. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  168. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  169. *** I2C HAL driver macros list ***
  170. ==================================
  171. [..]
  172. Below the list of most used macros in I2C HAL driver.
  173. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  174. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  175. (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
  176. (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
  177. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  178. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  179. [..]
  180. (@) You can refer to the I2C HAL driver header file for more useful macros
  181. @endverbatim
  182. ******************************************************************************
  183. * @attention
  184. *
  185. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  186. *
  187. * Redistribution and use in source and binary forms, with or without modification,
  188. * are permitted provided that the following conditions are met:
  189. * 1. Redistributions of source code must retain the above copyright notice,
  190. * this list of conditions and the following disclaimer.
  191. * 2. Redistributions in binary form must reproduce the above copyright notice,
  192. * this list of conditions and the following disclaimer in the documentation
  193. * and/or other materials provided with the distribution.
  194. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  195. * may be used to endorse or promote products derived from this software
  196. * without specific prior written permission.
  197. *
  198. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  199. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  200. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  201. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  202. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  203. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  204. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  205. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  206. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  207. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  208. *
  209. ******************************************************************************
  210. */
  211. /* Includes ------------------------------------------------------------------*/
  212. #include "stm32f4xx_hal.h"
  213. /** @addtogroup STM32F4xx_HAL_Driver
  214. * @{
  215. */
  216. /** @defgroup I2C I2C
  217. * @brief I2C HAL module driver
  218. * @{
  219. */
  220. #ifdef HAL_I2C_MODULE_ENABLED
  221. /* Private typedef -----------------------------------------------------------*/
  222. /* Private define ------------------------------------------------------------*/
  223. /** @addtogroup I2C_Private_Define
  224. * @{
  225. */
  226. #define I2C_TIMEOUT_FLAG ((uint32_t)35U) /*!< Timeout 35 ms */
  227. #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /*!< Timeout 25 ms */
  228. #define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /*!< XferOptions default value */
  229. /* Private define for @ref PreviousState usage */
  230. #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
  231. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  232. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  233. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  234. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  235. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  236. /**
  237. * @}
  238. */
  239. /* Private macro -------------------------------------------------------------*/
  240. /* Private variables ---------------------------------------------------------*/
  241. /* Private function prototypes -----------------------------------------------*/
  242. /** @addtogroup I2C_Private_Functions
  243. * @{
  244. */
  245. /* Private functions to handle DMA transfer */
  246. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  247. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  248. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  249. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  250. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  251. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  252. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  253. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  254. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  255. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  256. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  257. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  258. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  259. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  260. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  261. /* Private functions for I2C transfer IRQ handler */
  262. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  263. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  264. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  265. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  266. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  267. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  268. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  269. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  270. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  271. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  272. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  273. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  274. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  275. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  276. /**
  277. * @}
  278. */
  279. /* Exported functions --------------------------------------------------------*/
  280. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  281. * @{
  282. */
  283. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  284. * @brief Initialization and Configuration functions
  285. *
  286. @verbatim
  287. ===============================================================================
  288. ##### Initialization and de-initialization functions #####
  289. ===============================================================================
  290. [..] This subsection provides a set of functions allowing to initialize and
  291. de-initialize the I2Cx peripheral:
  292. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  293. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  294. (+) Call the function HAL_I2C_Init() to configure the selected device with
  295. the selected configuration:
  296. (++) Communication Speed
  297. (++) Duty cycle
  298. (++) Addressing mode
  299. (++) Own Address 1
  300. (++) Dual Addressing mode
  301. (++) Own Address 2
  302. (++) General call mode
  303. (++) Nostretch mode
  304. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  305. of the selected I2Cx peripheral.
  306. @endverbatim
  307. * @{
  308. */
  309. /**
  310. * @brief Initializes the I2C according to the specified parameters
  311. * in the I2C_InitTypeDef and create the associated handle.
  312. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  313. * the configuration information for I2C module
  314. * @retval HAL status
  315. */
  316. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  317. {
  318. uint32_t freqrange = 0U;
  319. uint32_t pclk1 = 0U;
  320. /* Check the I2C handle allocation */
  321. if(hi2c == NULL)
  322. {
  323. return HAL_ERROR;
  324. }
  325. /* Check the parameters */
  326. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  327. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  328. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  329. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  330. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  331. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  332. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  333. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  334. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  335. if(hi2c->State == HAL_I2C_STATE_RESET)
  336. {
  337. /* Allocate lock resource and initialize it */
  338. hi2c->Lock = HAL_UNLOCKED;
  339. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  340. HAL_I2C_MspInit(hi2c);
  341. }
  342. hi2c->State = HAL_I2C_STATE_BUSY;
  343. /* Disable the selected I2C peripheral */
  344. __HAL_I2C_DISABLE(hi2c);
  345. /* Get PCLK1 frequency */
  346. pclk1 = HAL_RCC_GetPCLK1Freq();
  347. /* Calculate frequency range */
  348. freqrange = I2C_FREQRANGE(pclk1);
  349. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  350. /* Configure I2Cx: Frequency range */
  351. hi2c->Instance->CR2 = freqrange;
  352. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  353. /* Configure I2Cx: Rise Time */
  354. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  355. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  356. /* Configure I2Cx: Speed */
  357. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  358. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  359. /* Configure I2Cx: Generalcall and NoStretch mode */
  360. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  361. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  362. /* Configure I2Cx: Own Address1 and addressing mode */
  363. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  364. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  365. /* Configure I2Cx: Dual mode and Own Address2 */
  366. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  367. /* Enable the selected I2C peripheral */
  368. __HAL_I2C_ENABLE(hi2c);
  369. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  370. hi2c->State = HAL_I2C_STATE_READY;
  371. hi2c->PreviousState = I2C_STATE_NONE;
  372. hi2c->Mode = HAL_I2C_MODE_NONE;
  373. return HAL_OK;
  374. }
  375. /**
  376. * @brief DeInitializes the I2C peripheral.
  377. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  378. * the configuration information for I2C module
  379. * @retval HAL status
  380. */
  381. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  382. {
  383. /* Check the I2C handle allocation */
  384. if(hi2c == NULL)
  385. {
  386. return HAL_ERROR;
  387. }
  388. /* Check the parameters */
  389. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  390. hi2c->State = HAL_I2C_STATE_BUSY;
  391. /* Disable the I2C Peripheral Clock */
  392. __HAL_I2C_DISABLE(hi2c);
  393. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  394. HAL_I2C_MspDeInit(hi2c);
  395. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  396. hi2c->State = HAL_I2C_STATE_RESET;
  397. hi2c->PreviousState = I2C_STATE_NONE;
  398. hi2c->Mode = HAL_I2C_MODE_NONE;
  399. /* Release Lock */
  400. __HAL_UNLOCK(hi2c);
  401. return HAL_OK;
  402. }
  403. /**
  404. * @brief I2C MSP Init.
  405. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  406. * the configuration information for I2C module
  407. * @retval None
  408. */
  409. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  410. {
  411. /* Prevent unused argument(s) compilation warning */
  412. UNUSED(hi2c);
  413. /* NOTE : This function Should not be modified, when the callback is needed,
  414. the HAL_I2C_MspInit could be implemented in the user file
  415. */
  416. }
  417. /**
  418. * @brief I2C MSP DeInit
  419. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  420. * the configuration information for I2C module
  421. * @retval None
  422. */
  423. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  424. {
  425. /* Prevent unused argument(s) compilation warning */
  426. UNUSED(hi2c);
  427. /* NOTE : This function Should not be modified, when the callback is needed,
  428. the HAL_I2C_MspDeInit could be implemented in the user file
  429. */
  430. }
  431. /**
  432. * @}
  433. */
  434. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  435. * @brief Data transfers functions
  436. *
  437. @verbatim
  438. ===============================================================================
  439. ##### IO operation functions #####
  440. ===============================================================================
  441. [..]
  442. This subsection provides a set of functions allowing to manage the I2C data
  443. transfers.
  444. (#) There are two modes of transfer:
  445. (++) Blocking mode : The communication is performed in the polling mode.
  446. The status of all data processing is returned by the same function
  447. after finishing transfer.
  448. (++) No-Blocking mode : The communication is performed using Interrupts
  449. or DMA. These functions return the status of the transfer startup.
  450. The end of the data processing will be indicated through the
  451. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  452. using DMA mode.
  453. (#) Blocking mode functions are :
  454. (++) HAL_I2C_Master_Transmit()
  455. (++) HAL_I2C_Master_Receive()
  456. (++) HAL_I2C_Slave_Transmit()
  457. (++) HAL_I2C_Slave_Receive()
  458. (++) HAL_I2C_Mem_Write()
  459. (++) HAL_I2C_Mem_Read()
  460. (++) HAL_I2C_IsDeviceReady()
  461. (#) No-Blocking mode functions with Interrupt are :
  462. (++) HAL_I2C_Master_Transmit_IT()
  463. (++) HAL_I2C_Master_Receive_IT()
  464. (++) HAL_I2C_Slave_Transmit_IT()
  465. (++) HAL_I2C_Slave_Receive_IT()
  466. (++) HAL_I2C_Master_Sequential_Transmit_IT()
  467. (++) HAL_I2C_Master_Sequential_Receive_IT()
  468. (++) HAL_I2C_Slave_Sequential_Transmit_IT()
  469. (++) HAL_I2C_Slave_Sequential_Receive_IT()
  470. (++) HAL_I2C_Mem_Write_IT()
  471. (++) HAL_I2C_Mem_Read_IT()
  472. (#) No-Blocking mode functions with DMA are :
  473. (++) HAL_I2C_Master_Transmit_DMA()
  474. (++) HAL_I2C_Master_Receive_DMA()
  475. (++) HAL_I2C_Slave_Transmit_DMA()
  476. (++) HAL_I2C_Slave_Receive_DMA()
  477. (++) HAL_I2C_Mem_Write_DMA()
  478. (++) HAL_I2C_Mem_Read_DMA()
  479. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  480. (++) HAL_I2C_MemTxCpltCallback()
  481. (++) HAL_I2C_MemRxCpltCallback()
  482. (++) HAL_I2C_MasterTxCpltCallback()
  483. (++) HAL_I2C_MasterRxCpltCallback()
  484. (++) HAL_I2C_SlaveTxCpltCallback()
  485. (++) HAL_I2C_SlaveRxCpltCallback()
  486. (++) HAL_I2C_ErrorCallback()
  487. (++) HAL_I2C_AbortCpltCallback()
  488. @endverbatim
  489. * @{
  490. */
  491. /**
  492. * @brief Transmits in master mode an amount of data in blocking mode.
  493. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  494. * the configuration information for the specified I2C.
  495. * @param DevAddress Target device address: The device 7 bits address value
  496. * in datasheet must be shift at right before call interface
  497. * @param pData Pointer to data buffer
  498. * @param Size Amount of data to be sent
  499. * @param Timeout Timeout duration
  500. * @retval HAL status
  501. */
  502. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  503. {
  504. uint32_t tickstart = 0x00U;
  505. /* Init tickstart for timeout management*/
  506. tickstart = HAL_GetTick();
  507. if(hi2c->State == HAL_I2C_STATE_READY)
  508. {
  509. /* Wait until BUSY flag is reset */
  510. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  511. {
  512. return HAL_BUSY;
  513. }
  514. /* Process Locked */
  515. __HAL_LOCK(hi2c);
  516. /* Check if the I2C is already enabled */
  517. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  518. {
  519. /* Enable I2C peripheral */
  520. __HAL_I2C_ENABLE(hi2c);
  521. }
  522. /* Disable Pos */
  523. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  524. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  525. hi2c->Mode = HAL_I2C_MODE_MASTER;
  526. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  527. /* Prepare transfer parameters */
  528. hi2c->pBuffPtr = pData;
  529. hi2c->XferCount = Size;
  530. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  531. hi2c->XferSize = hi2c->XferCount;
  532. /* Send Slave Address */
  533. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  534. {
  535. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  536. {
  537. /* Process Unlocked */
  538. __HAL_UNLOCK(hi2c);
  539. return HAL_ERROR;
  540. }
  541. else
  542. {
  543. /* Process Unlocked */
  544. __HAL_UNLOCK(hi2c);
  545. return HAL_TIMEOUT;
  546. }
  547. }
  548. /* Clear ADDR flag */
  549. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  550. while(hi2c->XferSize > 0U)
  551. {
  552. /* Wait until TXE flag is set */
  553. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  554. {
  555. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  556. {
  557. /* Generate Stop */
  558. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  559. return HAL_ERROR;
  560. }
  561. else
  562. {
  563. return HAL_TIMEOUT;
  564. }
  565. }
  566. /* Write data to DR */
  567. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  568. hi2c->XferCount--;
  569. hi2c->XferSize--;
  570. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  571. {
  572. /* Write data to DR */
  573. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  574. hi2c->XferCount--;
  575. hi2c->XferSize--;
  576. }
  577. /* Wait until BTF flag is set */
  578. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  579. {
  580. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  581. {
  582. /* Generate Stop */
  583. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  584. return HAL_ERROR;
  585. }
  586. else
  587. {
  588. return HAL_TIMEOUT;
  589. }
  590. }
  591. }
  592. /* Generate Stop */
  593. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  594. hi2c->State = HAL_I2C_STATE_READY;
  595. hi2c->Mode = HAL_I2C_MODE_NONE;
  596. /* Process Unlocked */
  597. __HAL_UNLOCK(hi2c);
  598. return HAL_OK;
  599. }
  600. else
  601. {
  602. return HAL_BUSY;
  603. }
  604. }
  605. /**
  606. * @brief Receives in master mode an amount of data in blocking mode.
  607. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  608. * the configuration information for the specified I2C.
  609. * @param DevAddress Target device address: The device 7 bits address value
  610. * in datasheet must be shift at right before call interface
  611. * @param pData Pointer to data buffer
  612. * @param Size Amount of data to be sent
  613. * @param Timeout Timeout duration
  614. * @retval HAL status
  615. */
  616. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  617. {
  618. uint32_t tickstart = 0x00U;
  619. /* Init tickstart for timeout management*/
  620. tickstart = HAL_GetTick();
  621. if(hi2c->State == HAL_I2C_STATE_READY)
  622. {
  623. /* Wait until BUSY flag is reset */
  624. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  625. {
  626. return HAL_BUSY;
  627. }
  628. /* Process Locked */
  629. __HAL_LOCK(hi2c);
  630. /* Check if the I2C is already enabled */
  631. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  632. {
  633. /* Enable I2C peripheral */
  634. __HAL_I2C_ENABLE(hi2c);
  635. }
  636. /* Disable Pos */
  637. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  638. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  639. hi2c->Mode = HAL_I2C_MODE_MASTER;
  640. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  641. /* Prepare transfer parameters */
  642. hi2c->pBuffPtr = pData;
  643. hi2c->XferCount = Size;
  644. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  645. hi2c->XferSize = hi2c->XferCount;
  646. /* Send Slave Address */
  647. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  648. {
  649. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  650. {
  651. /* Process Unlocked */
  652. __HAL_UNLOCK(hi2c);
  653. return HAL_ERROR;
  654. }
  655. else
  656. {
  657. /* Process Unlocked */
  658. __HAL_UNLOCK(hi2c);
  659. return HAL_TIMEOUT;
  660. }
  661. }
  662. if(hi2c->XferSize == 0U)
  663. {
  664. /* Clear ADDR flag */
  665. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  666. /* Generate Stop */
  667. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  668. }
  669. else if(hi2c->XferSize == 1U)
  670. {
  671. /* Disable Acknowledge */
  672. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  673. /* Clear ADDR flag */
  674. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  675. /* Generate Stop */
  676. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  677. }
  678. else if(hi2c->XferSize == 2U)
  679. {
  680. /* Disable Acknowledge */
  681. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  682. /* Enable Pos */
  683. hi2c->Instance->CR1 |= I2C_CR1_POS;
  684. /* Clear ADDR flag */
  685. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  686. }
  687. else
  688. {
  689. /* Enable Acknowledge */
  690. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  691. /* Clear ADDR flag */
  692. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  693. }
  694. while(hi2c->XferSize > 0U)
  695. {
  696. if(hi2c->XferSize <= 3U)
  697. {
  698. /* One byte */
  699. if(hi2c->XferSize == 1U)
  700. {
  701. /* Wait until RXNE flag is set */
  702. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  703. {
  704. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  705. {
  706. return HAL_TIMEOUT;
  707. }
  708. else
  709. {
  710. return HAL_ERROR;
  711. }
  712. }
  713. /* Read data from DR */
  714. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  715. hi2c->XferSize--;
  716. hi2c->XferCount--;
  717. }
  718. /* Two bytes */
  719. else if(hi2c->XferSize == 2U)
  720. {
  721. /* Wait until BTF flag is set */
  722. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  723. {
  724. return HAL_TIMEOUT;
  725. }
  726. /* Generate Stop */
  727. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  728. /* Read data from DR */
  729. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  730. hi2c->XferSize--;
  731. hi2c->XferCount--;
  732. /* Read data from DR */
  733. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  734. hi2c->XferSize--;
  735. hi2c->XferCount--;
  736. }
  737. /* 3 Last bytes */
  738. else
  739. {
  740. /* Wait until BTF flag is set */
  741. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  742. {
  743. return HAL_TIMEOUT;
  744. }
  745. /* Disable Acknowledge */
  746. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  747. /* Read data from DR */
  748. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  749. hi2c->XferSize--;
  750. hi2c->XferCount--;
  751. /* Wait until BTF flag is set */
  752. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  753. {
  754. return HAL_TIMEOUT;
  755. }
  756. /* Generate Stop */
  757. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  758. /* Read data from DR */
  759. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  760. hi2c->XferSize--;
  761. hi2c->XferCount--;
  762. /* Read data from DR */
  763. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  764. hi2c->XferSize--;
  765. hi2c->XferCount--;
  766. }
  767. }
  768. else
  769. {
  770. /* Wait until RXNE flag is set */
  771. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  772. {
  773. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  774. {
  775. return HAL_TIMEOUT;
  776. }
  777. else
  778. {
  779. return HAL_ERROR;
  780. }
  781. }
  782. /* Read data from DR */
  783. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  784. hi2c->XferSize--;
  785. hi2c->XferCount--;
  786. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  787. {
  788. /* Read data from DR */
  789. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  790. hi2c->XferSize--;
  791. hi2c->XferCount--;
  792. }
  793. }
  794. }
  795. hi2c->State = HAL_I2C_STATE_READY;
  796. hi2c->Mode = HAL_I2C_MODE_NONE;
  797. /* Process Unlocked */
  798. __HAL_UNLOCK(hi2c);
  799. return HAL_OK;
  800. }
  801. else
  802. {
  803. return HAL_BUSY;
  804. }
  805. }
  806. /**
  807. * @brief Transmits in slave mode an amount of data in blocking mode.
  808. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  809. * the configuration information for the specified I2C.
  810. * @param pData Pointer to data buffer
  811. * @param Size Amount of data to be sent
  812. * @param Timeout Timeout duration
  813. * @retval HAL status
  814. */
  815. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  816. {
  817. uint32_t tickstart = 0x00U;
  818. /* Init tickstart for timeout management*/
  819. tickstart = HAL_GetTick();
  820. if(hi2c->State == HAL_I2C_STATE_READY)
  821. {
  822. if((pData == NULL) || (Size == 0U))
  823. {
  824. return HAL_ERROR;
  825. }
  826. /* Process Locked */
  827. __HAL_LOCK(hi2c);
  828. /* Check if the I2C is already enabled */
  829. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  830. {
  831. /* Enable I2C peripheral */
  832. __HAL_I2C_ENABLE(hi2c);
  833. }
  834. /* Disable Pos */
  835. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  836. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  837. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  838. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  839. /* Prepare transfer parameters */
  840. hi2c->pBuffPtr = pData;
  841. hi2c->XferCount = Size;
  842. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  843. hi2c->XferSize = hi2c->XferCount;
  844. /* Enable Address Acknowledge */
  845. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  846. /* Wait until ADDR flag is set */
  847. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  848. {
  849. return HAL_TIMEOUT;
  850. }
  851. /* Clear ADDR flag */
  852. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  853. /* If 10bit addressing mode is selected */
  854. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  855. {
  856. /* Wait until ADDR flag is set */
  857. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  858. {
  859. return HAL_TIMEOUT;
  860. }
  861. /* Clear ADDR flag */
  862. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  863. }
  864. while(hi2c->XferSize > 0U)
  865. {
  866. /* Wait until TXE flag is set */
  867. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  868. {
  869. /* Disable Address Acknowledge */
  870. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  871. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  872. {
  873. return HAL_ERROR;
  874. }
  875. else
  876. {
  877. return HAL_TIMEOUT;
  878. }
  879. }
  880. /* Write data to DR */
  881. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  882. hi2c->XferCount--;
  883. hi2c->XferSize--;
  884. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  885. {
  886. /* Write data to DR */
  887. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  888. hi2c->XferCount--;
  889. hi2c->XferSize--;
  890. }
  891. }
  892. /* Wait until AF flag is set */
  893. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  894. {
  895. return HAL_TIMEOUT;
  896. }
  897. /* Clear AF flag */
  898. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  899. /* Disable Address Acknowledge */
  900. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  901. hi2c->State = HAL_I2C_STATE_READY;
  902. hi2c->Mode = HAL_I2C_MODE_NONE;
  903. /* Process Unlocked */
  904. __HAL_UNLOCK(hi2c);
  905. return HAL_OK;
  906. }
  907. else
  908. {
  909. return HAL_BUSY;
  910. }
  911. }
  912. /**
  913. * @brief Receive in slave mode an amount of data in blocking mode
  914. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  915. * the configuration information for the specified I2C.
  916. * @param pData Pointer to data buffer
  917. * @param Size Amount of data to be sent
  918. * @param Timeout Timeout duration
  919. * @retval HAL status
  920. */
  921. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  922. {
  923. uint32_t tickstart = 0x00U;
  924. /* Init tickstart for timeout management*/
  925. tickstart = HAL_GetTick();
  926. if(hi2c->State == HAL_I2C_STATE_READY)
  927. {
  928. if((pData == NULL) || (Size == 0U))
  929. {
  930. return HAL_ERROR;
  931. }
  932. /* Process Locked */
  933. __HAL_LOCK(hi2c);
  934. /* Check if the I2C is already enabled */
  935. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  936. {
  937. /* Enable I2C peripheral */
  938. __HAL_I2C_ENABLE(hi2c);
  939. }
  940. /* Disable Pos */
  941. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  942. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  943. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  944. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  945. /* Prepare transfer parameters */
  946. hi2c->pBuffPtr = pData;
  947. hi2c->XferCount = Size;
  948. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  949. hi2c->XferSize = hi2c->XferCount;
  950. /* Enable Address Acknowledge */
  951. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  952. /* Wait until ADDR flag is set */
  953. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  954. {
  955. return HAL_TIMEOUT;
  956. }
  957. /* Clear ADDR flag */
  958. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  959. while(hi2c->XferSize > 0U)
  960. {
  961. /* Wait until RXNE flag is set */
  962. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  963. {
  964. /* Disable Address Acknowledge */
  965. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  966. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  967. {
  968. return HAL_TIMEOUT;
  969. }
  970. else
  971. {
  972. return HAL_ERROR;
  973. }
  974. }
  975. /* Read data from DR */
  976. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  977. hi2c->XferSize--;
  978. hi2c->XferCount--;
  979. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  980. {
  981. /* Read data from DR */
  982. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  983. hi2c->XferSize--;
  984. hi2c->XferCount--;
  985. }
  986. }
  987. /* Wait until STOP flag is set */
  988. if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  989. {
  990. /* Disable Address Acknowledge */
  991. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  992. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  993. {
  994. return HAL_ERROR;
  995. }
  996. else
  997. {
  998. return HAL_TIMEOUT;
  999. }
  1000. }
  1001. /* Clear STOP flag */
  1002. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1003. /* Disable Address Acknowledge */
  1004. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1005. hi2c->State = HAL_I2C_STATE_READY;
  1006. hi2c->Mode = HAL_I2C_MODE_NONE;
  1007. /* Process Unlocked */
  1008. __HAL_UNLOCK(hi2c);
  1009. return HAL_OK;
  1010. }
  1011. else
  1012. {
  1013. return HAL_BUSY;
  1014. }
  1015. }
  1016. /**
  1017. * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1018. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1019. * the configuration information for the specified I2C.
  1020. * @param DevAddress Target device address: The device 7 bits address value
  1021. * in datasheet must be shift at right before call interface
  1022. * @param pData Pointer to data buffer
  1023. * @param Size Amount of data to be sent
  1024. * @retval HAL status
  1025. */
  1026. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1027. {
  1028. __IO uint32_t count = 0U;
  1029. if(hi2c->State == HAL_I2C_STATE_READY)
  1030. {
  1031. /* Wait until BUSY flag is reset */
  1032. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1033. do
  1034. {
  1035. if(count-- == 0U)
  1036. {
  1037. hi2c->PreviousState = I2C_STATE_NONE;
  1038. hi2c->State= HAL_I2C_STATE_READY;
  1039. /* Process Unlocked */
  1040. __HAL_UNLOCK(hi2c);
  1041. return HAL_TIMEOUT;
  1042. }
  1043. }
  1044. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1045. /* Process Locked */
  1046. __HAL_LOCK(hi2c);
  1047. /* Check if the I2C is already enabled */
  1048. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1049. {
  1050. /* Enable I2C peripheral */
  1051. __HAL_I2C_ENABLE(hi2c);
  1052. }
  1053. /* Disable Pos */
  1054. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1055. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1056. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1057. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1058. /* Prepare transfer parameters */
  1059. hi2c->pBuffPtr = pData;
  1060. hi2c->XferCount = Size;
  1061. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1062. hi2c->XferSize = hi2c->XferCount;
  1063. hi2c->Devaddress = DevAddress;
  1064. /* Generate Start */
  1065. hi2c->Instance->CR1 |= I2C_CR1_START;
  1066. /* Process Unlocked */
  1067. __HAL_UNLOCK(hi2c);
  1068. /* Note : The I2C interrupts must be enabled after unlocking current process
  1069. to avoid the risk of I2C interrupt handle execution before current
  1070. process unlock */
  1071. /* Enable EVT, BUF and ERR interrupt */
  1072. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1073. return HAL_OK;
  1074. }
  1075. else
  1076. {
  1077. return HAL_BUSY;
  1078. }
  1079. }
  1080. /**
  1081. * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
  1082. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1083. * the configuration information for the specified I2C.
  1084. * @param DevAddress Target device address: The device 7 bits address value
  1085. * in datasheet must be shift at right before call interface
  1086. * @param pData Pointer to data buffer
  1087. * @param Size Amount of data to be sent
  1088. * @retval HAL status
  1089. */
  1090. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1091. {
  1092. __IO uint32_t count = 0U;
  1093. if(hi2c->State == HAL_I2C_STATE_READY)
  1094. {
  1095. /* Wait until BUSY flag is reset */
  1096. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1097. do
  1098. {
  1099. if(count-- == 0U)
  1100. {
  1101. hi2c->PreviousState = I2C_STATE_NONE;
  1102. hi2c->State= HAL_I2C_STATE_READY;
  1103. /* Process Unlocked */
  1104. __HAL_UNLOCK(hi2c);
  1105. return HAL_TIMEOUT;
  1106. }
  1107. }
  1108. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1109. /* Process Locked */
  1110. __HAL_LOCK(hi2c);
  1111. /* Check if the I2C is already enabled */
  1112. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1113. {
  1114. /* Enable I2C peripheral */
  1115. __HAL_I2C_ENABLE(hi2c);
  1116. }
  1117. /* Disable Pos */
  1118. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1119. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1120. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1121. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1122. /* Prepare transfer parameters */
  1123. hi2c->pBuffPtr = pData;
  1124. hi2c->XferCount = Size;
  1125. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1126. hi2c->XferSize = hi2c->XferCount;
  1127. hi2c->Devaddress = DevAddress;
  1128. /* Enable Acknowledge */
  1129. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1130. /* Generate Start */
  1131. hi2c->Instance->CR1 |= I2C_CR1_START;
  1132. /* Process Unlocked */
  1133. __HAL_UNLOCK(hi2c);
  1134. /* Note : The I2C interrupts must be enabled after unlocking current process
  1135. to avoid the risk of I2C interrupt handle execution before current
  1136. process unlock */
  1137. /* Enable EVT, BUF and ERR interrupt */
  1138. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1139. return HAL_OK;
  1140. }
  1141. else
  1142. {
  1143. return HAL_BUSY;
  1144. }
  1145. }
  1146. /**
  1147. * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
  1148. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1149. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1150. * the configuration information for the specified I2C.
  1151. * @param DevAddress Target device address: The device 7 bits address value
  1152. * in datasheet must be shift at right before call interface
  1153. * @param pData Pointer to data buffer
  1154. * @param Size Amount of data to be sent
  1155. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1156. * @retval HAL status
  1157. */
  1158. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1159. {
  1160. __IO uint32_t Prev_State = 0x00U;
  1161. __IO uint32_t count = 0x00U;
  1162. /* Check the parameters */
  1163. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1164. if(hi2c->State == HAL_I2C_STATE_READY)
  1165. {
  1166. /* Check Busy Flag only if FIRST call of Master interface */
  1167. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1168. {
  1169. /* Wait until BUSY flag is reset */
  1170. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1171. do
  1172. {
  1173. if(count-- == 0U)
  1174. {
  1175. hi2c->PreviousState = I2C_STATE_NONE;
  1176. hi2c->State= HAL_I2C_STATE_READY;
  1177. /* Process Unlocked */
  1178. __HAL_UNLOCK(hi2c);
  1179. return HAL_TIMEOUT;
  1180. }
  1181. }
  1182. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1183. }
  1184. /* Process Locked */
  1185. __HAL_LOCK(hi2c);
  1186. /* Check if the I2C is already enabled */
  1187. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1188. {
  1189. /* Enable I2C peripheral */
  1190. __HAL_I2C_ENABLE(hi2c);
  1191. }
  1192. /* Disable Pos */
  1193. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1194. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1195. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1196. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1197. /* Prepare transfer parameters */
  1198. hi2c->pBuffPtr = pData;
  1199. hi2c->XferCount = Size;
  1200. hi2c->XferOptions = XferOptions;
  1201. hi2c->XferSize = hi2c->XferCount;
  1202. hi2c->Devaddress = DevAddress;
  1203. Prev_State = hi2c->PreviousState;
  1204. /* Generate Start */
  1205. if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
  1206. {
  1207. /* Generate Start condition if first transfer */
  1208. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1209. {
  1210. /* Generate Start */
  1211. hi2c->Instance->CR1 |= I2C_CR1_START;
  1212. }
  1213. else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
  1214. {
  1215. /* Generate ReStart */
  1216. hi2c->Instance->CR1 |= I2C_CR1_START;
  1217. }
  1218. }
  1219. /* Process Unlocked */
  1220. __HAL_UNLOCK(hi2c);
  1221. /* Note : The I2C interrupts must be enabled after unlocking current process
  1222. to avoid the risk of I2C interrupt handle execution before current
  1223. process unlock */
  1224. /* Enable EVT, BUF and ERR interrupt */
  1225. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1226. return HAL_OK;
  1227. }
  1228. else
  1229. {
  1230. return HAL_BUSY;
  1231. }
  1232. }
  1233. /**
  1234. * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
  1235. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1236. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1237. * the configuration information for the specified I2C.
  1238. * @param DevAddress Target device address: The device 7 bits address value
  1239. * in datasheet must be shift at right before call interface
  1240. * @param pData Pointer to data buffer
  1241. * @param Size Amount of data to be sent
  1242. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1243. * @retval HAL status
  1244. */
  1245. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1246. {
  1247. __IO uint32_t count = 0U;
  1248. /* Check the parameters */
  1249. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1250. if(hi2c->State == HAL_I2C_STATE_READY)
  1251. {
  1252. /* Check Busy Flag only if FIRST call of Master interface */
  1253. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1254. {
  1255. /* Wait until BUSY flag is reset */
  1256. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1257. do
  1258. {
  1259. if(count-- == 0U)
  1260. {
  1261. hi2c->PreviousState = I2C_STATE_NONE;
  1262. hi2c->State= HAL_I2C_STATE_READY;
  1263. /* Process Unlocked */
  1264. __HAL_UNLOCK(hi2c);
  1265. return HAL_TIMEOUT;
  1266. }
  1267. }
  1268. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1269. }
  1270. /* Process Locked */
  1271. __HAL_LOCK(hi2c);
  1272. /* Check if the I2C is already enabled */
  1273. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1274. {
  1275. /* Enable I2C peripheral */
  1276. __HAL_I2C_ENABLE(hi2c);
  1277. }
  1278. /* Disable Pos */
  1279. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1280. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1281. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1282. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1283. /* Prepare transfer parameters */
  1284. hi2c->pBuffPtr = pData;
  1285. hi2c->XferCount = Size;
  1286. hi2c->XferOptions = XferOptions;
  1287. hi2c->XferSize = hi2c->XferCount;
  1288. hi2c->Devaddress = DevAddress;
  1289. if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
  1290. {
  1291. /* Generate Start condition if first transfer */
  1292. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
  1293. {
  1294. /* Enable Acknowledge */
  1295. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1296. /* Generate Start */
  1297. hi2c->Instance->CR1 |= I2C_CR1_START;
  1298. }
  1299. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  1300. {
  1301. /* Enable Acknowledge */
  1302. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1303. /* Generate ReStart */
  1304. hi2c->Instance->CR1 |= I2C_CR1_START;
  1305. }
  1306. }
  1307. /* Process Unlocked */
  1308. __HAL_UNLOCK(hi2c);
  1309. /* Note : The I2C interrupts must be enabled after unlocking current process
  1310. to avoid the risk of I2C interrupt handle execution before current
  1311. process unlock */
  1312. /* Enable EVT, BUF and ERR interrupt */
  1313. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1314. return HAL_OK;
  1315. }
  1316. else
  1317. {
  1318. return HAL_BUSY;
  1319. }
  1320. }
  1321. /**
  1322. * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1323. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1324. * the configuration information for the specified I2C.
  1325. * @param pData Pointer to data buffer
  1326. * @param Size Amount of data to be sent
  1327. * @retval HAL status
  1328. */
  1329. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1330. {
  1331. __IO uint32_t count = 0U;
  1332. if(hi2c->State == HAL_I2C_STATE_READY)
  1333. {
  1334. if((pData == NULL) || (Size == 0U))
  1335. {
  1336. return HAL_ERROR;
  1337. }
  1338. /* Wait until BUSY flag is reset */
  1339. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1340. do
  1341. {
  1342. if(count-- == 0U)
  1343. {
  1344. hi2c->PreviousState = I2C_STATE_NONE;
  1345. hi2c->State= HAL_I2C_STATE_READY;
  1346. /* Process Unlocked */
  1347. __HAL_UNLOCK(hi2c);
  1348. return HAL_TIMEOUT;
  1349. }
  1350. }
  1351. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1352. /* Process Locked */
  1353. __HAL_LOCK(hi2c);
  1354. /* Check if the I2C is already enabled */
  1355. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1356. {
  1357. /* Enable I2C peripheral */
  1358. __HAL_I2C_ENABLE(hi2c);
  1359. }
  1360. /* Disable Pos */
  1361. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1362. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1363. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1364. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1365. /* Prepare transfer parameters */
  1366. hi2c->pBuffPtr = pData;
  1367. hi2c->XferCount = Size;
  1368. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1369. hi2c->XferSize = hi2c->XferCount;
  1370. /* Enable Address Acknowledge */
  1371. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1372. /* Process Unlocked */
  1373. __HAL_UNLOCK(hi2c);
  1374. /* Note : The I2C interrupts must be enabled after unlocking current process
  1375. to avoid the risk of I2C interrupt handle execution before current
  1376. process unlock */
  1377. /* Enable EVT, BUF and ERR interrupt */
  1378. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1379. return HAL_OK;
  1380. }
  1381. else
  1382. {
  1383. return HAL_BUSY;
  1384. }
  1385. }
  1386. /**
  1387. * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1388. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1389. * the configuration information for the specified I2C.
  1390. * @param pData Pointer to data buffer
  1391. * @param Size Amount of data to be sent
  1392. * @retval HAL status
  1393. */
  1394. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1395. {
  1396. __IO uint32_t count = 0U;
  1397. if(hi2c->State == HAL_I2C_STATE_READY)
  1398. {
  1399. if((pData == NULL) || (Size == 0U))
  1400. {
  1401. return HAL_ERROR;
  1402. }
  1403. /* Wait until BUSY flag is reset */
  1404. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1405. do
  1406. {
  1407. if(count-- == 0U)
  1408. {
  1409. hi2c->PreviousState = I2C_STATE_NONE;
  1410. hi2c->State= HAL_I2C_STATE_READY;
  1411. /* Process Unlocked */
  1412. __HAL_UNLOCK(hi2c);
  1413. return HAL_TIMEOUT;
  1414. }
  1415. }
  1416. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1417. /* Process Locked */
  1418. __HAL_LOCK(hi2c);
  1419. /* Check if the I2C is already enabled */
  1420. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1421. {
  1422. /* Enable I2C peripheral */
  1423. __HAL_I2C_ENABLE(hi2c);
  1424. }
  1425. /* Disable Pos */
  1426. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1427. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1428. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1429. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1430. /* Prepare transfer parameters */
  1431. hi2c->pBuffPtr = pData;
  1432. hi2c->XferSize = Size;
  1433. hi2c->XferCount = Size;
  1434. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1435. /* Enable Address Acknowledge */
  1436. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1437. /* Process Unlocked */
  1438. __HAL_UNLOCK(hi2c);
  1439. /* Note : The I2C interrupts must be enabled after unlocking current process
  1440. to avoid the risk of I2C interrupt handle execution before current
  1441. process unlock */
  1442. /* Enable EVT, BUF and ERR interrupt */
  1443. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1444. return HAL_OK;
  1445. }
  1446. else
  1447. {
  1448. return HAL_BUSY;
  1449. }
  1450. }
  1451. /**
  1452. * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1453. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1454. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1455. * the configuration information for I2C module
  1456. * @param pData Pointer to data buffer
  1457. * @param Size Amount of data to be sent
  1458. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1459. * @retval HAL status
  1460. */
  1461. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1462. {
  1463. /* Check the parameters */
  1464. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1465. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1466. {
  1467. if((pData == NULL) || (Size == 0U))
  1468. {
  1469. return HAL_ERROR;
  1470. }
  1471. /* Process Locked */
  1472. __HAL_LOCK(hi2c);
  1473. /* Check if the I2C is already enabled */
  1474. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1475. {
  1476. /* Enable I2C peripheral */
  1477. __HAL_I2C_ENABLE(hi2c);
  1478. }
  1479. /* Disable Pos */
  1480. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1481. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  1482. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1483. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1484. /* Prepare transfer parameters */
  1485. hi2c->pBuffPtr = pData;
  1486. hi2c->XferCount = Size;
  1487. hi2c->XferOptions = XferOptions;
  1488. hi2c->XferSize = hi2c->XferCount;
  1489. /* Clear ADDR flag */
  1490. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1491. /* Process Unlocked */
  1492. __HAL_UNLOCK(hi2c);
  1493. /* Note : The I2C interrupts must be enabled after unlocking current process
  1494. to avoid the risk of I2C interrupt handle execution before current
  1495. process unlock */
  1496. /* Enable EVT, BUF and ERR interrupt */
  1497. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1498. return HAL_OK;
  1499. }
  1500. else
  1501. {
  1502. return HAL_BUSY;
  1503. }
  1504. }
  1505. /**
  1506. * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  1507. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1508. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1509. * the configuration information for the specified I2C.
  1510. * @param pData Pointer to data buffer
  1511. * @param Size Amount of data to be sent
  1512. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1513. * @retval HAL status
  1514. */
  1515. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1516. {
  1517. /* Check the parameters */
  1518. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1519. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1520. {
  1521. if((pData == NULL) || (Size == 0U))
  1522. {
  1523. return HAL_ERROR;
  1524. }
  1525. /* Process Locked */
  1526. __HAL_LOCK(hi2c);
  1527. /* Check if the I2C is already enabled */
  1528. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1529. {
  1530. /* Enable I2C peripheral */
  1531. __HAL_I2C_ENABLE(hi2c);
  1532. }
  1533. /* Disable Pos */
  1534. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1535. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  1536. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1537. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1538. /* Prepare transfer parameters */
  1539. hi2c->pBuffPtr = pData;
  1540. hi2c->XferCount = Size;
  1541. hi2c->XferOptions = XferOptions;
  1542. hi2c->XferSize = hi2c->XferCount;
  1543. /* Clear ADDR flag */
  1544. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1545. /* Process Unlocked */
  1546. __HAL_UNLOCK(hi2c);
  1547. /* Note : The I2C interrupts must be enabled after unlocking current process
  1548. to avoid the risk of I2C interrupt handle execution before current
  1549. process unlock */
  1550. /* Enable EVT, BUF and ERR interrupt */
  1551. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1552. return HAL_OK;
  1553. }
  1554. else
  1555. {
  1556. return HAL_BUSY;
  1557. }
  1558. }
  1559. /**
  1560. * @brief Enable the Address listen mode with Interrupt.
  1561. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1562. * the configuration information for the specified I2C.
  1563. * @retval HAL status
  1564. */
  1565. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  1566. {
  1567. if(hi2c->State == HAL_I2C_STATE_READY)
  1568. {
  1569. hi2c->State = HAL_I2C_STATE_LISTEN;
  1570. /* Check if the I2C is already enabled */
  1571. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1572. {
  1573. /* Enable I2C peripheral */
  1574. __HAL_I2C_ENABLE(hi2c);
  1575. }
  1576. /* Enable Address Acknowledge */
  1577. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1578. /* Enable EVT and ERR interrupt */
  1579. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1580. return HAL_OK;
  1581. }
  1582. else
  1583. {
  1584. return HAL_BUSY;
  1585. }
  1586. }
  1587. /**
  1588. * @brief Disable the Address listen mode with Interrupt.
  1589. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1590. * the configuration information for the specified I2C.
  1591. * @retval HAL status
  1592. */
  1593. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  1594. {
  1595. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  1596. uint32_t tmp;
  1597. /* Disable Address listen mode only if a transfer is not ongoing */
  1598. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1599. {
  1600. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  1601. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  1602. hi2c->State = HAL_I2C_STATE_READY;
  1603. hi2c->Mode = HAL_I2C_MODE_NONE;
  1604. /* Disable Address Acknowledge */
  1605. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1606. /* Disable EVT and ERR interrupt */
  1607. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1608. return HAL_OK;
  1609. }
  1610. else
  1611. {
  1612. return HAL_BUSY;
  1613. }
  1614. }
  1615. /**
  1616. * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
  1617. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1618. * the configuration information for the specified I2C.
  1619. * @param DevAddress Target device address: The device 7 bits address value
  1620. * in datasheet must be shift at right before call interface
  1621. * @param pData Pointer to data buffer
  1622. * @param Size Amount of data to be sent
  1623. * @retval HAL status
  1624. */
  1625. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1626. {
  1627. __IO uint32_t count = 0U;
  1628. if(hi2c->State == HAL_I2C_STATE_READY)
  1629. {
  1630. /* Wait until BUSY flag is reset */
  1631. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1632. do
  1633. {
  1634. if(count-- == 0U)
  1635. {
  1636. hi2c->PreviousState = I2C_STATE_NONE;
  1637. hi2c->State= HAL_I2C_STATE_READY;
  1638. /* Process Unlocked */
  1639. __HAL_UNLOCK(hi2c);
  1640. return HAL_TIMEOUT;
  1641. }
  1642. }
  1643. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1644. /* Process Locked */
  1645. __HAL_LOCK(hi2c);
  1646. /* Check if the I2C is already enabled */
  1647. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1648. {
  1649. /* Enable I2C peripheral */
  1650. __HAL_I2C_ENABLE(hi2c);
  1651. }
  1652. /* Disable Pos */
  1653. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1654. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1655. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1656. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1657. /* Prepare transfer parameters */
  1658. hi2c->pBuffPtr = pData;
  1659. hi2c->XferCount = Size;
  1660. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1661. hi2c->XferSize = hi2c->XferCount;
  1662. hi2c->Devaddress = DevAddress;
  1663. if(hi2c->XferSize > 0U)
  1664. {
  1665. /* Set the I2C DMA transfer complete callback */
  1666. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1667. /* Set the DMA error callback */
  1668. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1669. /* Set the unused DMA callbacks to NULL */
  1670. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1671. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1672. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1673. hi2c->hdmatx->XferAbortCallback = NULL;
  1674. /* Enable the DMA Stream */
  1675. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1676. /* Enable Acknowledge */
  1677. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1678. /* Generate Start */
  1679. hi2c->Instance->CR1 |= I2C_CR1_START;
  1680. /* Process Unlocked */
  1681. __HAL_UNLOCK(hi2c);
  1682. /* Note : The I2C interrupts must be enabled after unlocking current process
  1683. to avoid the risk of I2C interrupt handle execution before current
  1684. process unlock */
  1685. /* Enable EVT and ERR interrupt */
  1686. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1687. /* Enable DMA Request */
  1688. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1689. }
  1690. else
  1691. {
  1692. /* Enable Acknowledge */
  1693. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1694. /* Generate Start */
  1695. hi2c->Instance->CR1 |= I2C_CR1_START;
  1696. /* Process Unlocked */
  1697. __HAL_UNLOCK(hi2c);
  1698. /* Note : The I2C interrupts must be enabled after unlocking current process
  1699. to avoid the risk of I2C interrupt handle execution before current
  1700. process unlock */
  1701. /* Enable EVT, BUF and ERR interrupt */
  1702. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1703. }
  1704. return HAL_OK;
  1705. }
  1706. else
  1707. {
  1708. return HAL_BUSY;
  1709. }
  1710. }
  1711. /**
  1712. * @brief Receive in master mode an amount of data in non-blocking mode with DMA
  1713. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1714. * the configuration information for the specified I2C.
  1715. * @param DevAddress Target device address: The device 7 bits address value
  1716. * in datasheet must be shift at right before call interface
  1717. * @param pData Pointer to data buffer
  1718. * @param Size Amount of data to be sent
  1719. * @retval HAL status
  1720. */
  1721. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1722. {
  1723. __IO uint32_t count = 0U;
  1724. if(hi2c->State == HAL_I2C_STATE_READY)
  1725. {
  1726. /* Wait until BUSY flag is reset */
  1727. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1728. do
  1729. {
  1730. if(count-- == 0U)
  1731. {
  1732. hi2c->PreviousState = I2C_STATE_NONE;
  1733. hi2c->State= HAL_I2C_STATE_READY;
  1734. /* Process Unlocked */
  1735. __HAL_UNLOCK(hi2c);
  1736. return HAL_TIMEOUT;
  1737. }
  1738. }
  1739. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1740. /* Process Locked */
  1741. __HAL_LOCK(hi2c);
  1742. /* Check if the I2C is already enabled */
  1743. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1744. {
  1745. /* Enable I2C peripheral */
  1746. __HAL_I2C_ENABLE(hi2c);
  1747. }
  1748. /* Disable Pos */
  1749. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1750. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1751. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1752. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1753. /* Prepare transfer parameters */
  1754. hi2c->pBuffPtr = pData;
  1755. hi2c->XferCount = Size;
  1756. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1757. hi2c->XferSize = hi2c->XferCount;
  1758. hi2c->Devaddress = DevAddress;
  1759. if(hi2c->XferSize > 0U)
  1760. {
  1761. /* Set the I2C DMA transfer complete callback */
  1762. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1763. /* Set the DMA error callback */
  1764. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1765. /* Set the unused DMA callbacks to NULL */
  1766. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1767. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1768. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1769. hi2c->hdmarx->XferAbortCallback = NULL;
  1770. /* Enable the DMA Stream */
  1771. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1772. /* Enable Acknowledge */
  1773. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1774. /* Generate Start */
  1775. hi2c->Instance->CR1 |= I2C_CR1_START;
  1776. /* Process Unlocked */
  1777. __HAL_UNLOCK(hi2c);
  1778. /* Note : The I2C interrupts must be enabled after unlocking current process
  1779. to avoid the risk of I2C interrupt handle execution before current
  1780. process unlock */
  1781. /* Enable EVT and ERR interrupt */
  1782. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1783. /* Enable DMA Request */
  1784. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1785. }
  1786. else
  1787. {
  1788. /* Enable Acknowledge */
  1789. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1790. /* Generate Start */
  1791. hi2c->Instance->CR1 |= I2C_CR1_START;
  1792. /* Process Unlocked */
  1793. __HAL_UNLOCK(hi2c);
  1794. /* Note : The I2C interrupts must be enabled after unlocking current process
  1795. to avoid the risk of I2C interrupt handle execution before current
  1796. process unlock */
  1797. /* Enable EVT, BUF and ERR interrupt */
  1798. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1799. }
  1800. return HAL_OK;
  1801. }
  1802. else
  1803. {
  1804. return HAL_BUSY;
  1805. }
  1806. }
  1807. /**
  1808. * @brief Abort a master I2C process communication with Interrupt.
  1809. * @note This abort can be called only if state is ready
  1810. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1811. * the configuration information for the specified I2C.
  1812. * @param DevAddress Target device address: The device 7 bits address value
  1813. * in datasheet must be shift at right before call interface
  1814. * @retval HAL status
  1815. */
  1816. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  1817. {
  1818. /* Abort Master transfer during Receive or Transmit process */
  1819. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  1820. {
  1821. /* Process Locked */
  1822. __HAL_LOCK(hi2c);
  1823. hi2c->PreviousState = I2C_STATE_NONE;
  1824. hi2c->State = HAL_I2C_STATE_ABORT;
  1825. /* Disable Acknowledge */
  1826. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1827. /* Generate Stop */
  1828. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1829. hi2c->XferCount = 0U;
  1830. /* Disable EVT, BUF and ERR interrupt */
  1831. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1832. /* Process Unlocked */
  1833. __HAL_UNLOCK(hi2c);
  1834. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1835. I2C_ITError(hi2c);
  1836. return HAL_OK;
  1837. }
  1838. else
  1839. {
  1840. /* Wrong usage of abort function */
  1841. /* This function should be used only in case of abort monitored by master device */
  1842. return HAL_ERROR;
  1843. }
  1844. }
  1845. /**
  1846. * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
  1847. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1848. * the configuration information for the specified I2C.
  1849. * @param pData Pointer to data buffer
  1850. * @param Size Amount of data to be sent
  1851. * @retval HAL status
  1852. */
  1853. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1854. {
  1855. __IO uint32_t count = 0U;
  1856. if(hi2c->State == HAL_I2C_STATE_READY)
  1857. {
  1858. if((pData == NULL) || (Size == 0U))
  1859. {
  1860. return HAL_ERROR;
  1861. }
  1862. /* Wait until BUSY flag is reset */
  1863. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1864. do
  1865. {
  1866. if(count-- == 0U)
  1867. {
  1868. hi2c->PreviousState = I2C_STATE_NONE;
  1869. hi2c->State= HAL_I2C_STATE_READY;
  1870. /* Process Unlocked */
  1871. __HAL_UNLOCK(hi2c);
  1872. return HAL_TIMEOUT;
  1873. }
  1874. }
  1875. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1876. /* Process Locked */
  1877. __HAL_LOCK(hi2c);
  1878. /* Check if the I2C is already enabled */
  1879. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1880. {
  1881. /* Enable I2C peripheral */
  1882. __HAL_I2C_ENABLE(hi2c);
  1883. }
  1884. /* Disable Pos */
  1885. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1886. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1887. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1888. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1889. /* Prepare transfer parameters */
  1890. hi2c->pBuffPtr = pData;
  1891. hi2c->XferCount = Size;
  1892. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1893. hi2c->XferSize = hi2c->XferCount;
  1894. /* Set the I2C DMA transfer complete callback */
  1895. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1896. /* Set the DMA error callback */
  1897. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1898. /* Set the unused DMA callbacks to NULL */
  1899. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1900. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1901. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1902. hi2c->hdmatx->XferAbortCallback = NULL;
  1903. /* Enable the DMA Stream */
  1904. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1905. /* Enable Address Acknowledge */
  1906. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1907. /* Process Unlocked */
  1908. __HAL_UNLOCK(hi2c);
  1909. /* Note : The I2C interrupts must be enabled after unlocking current process
  1910. to avoid the risk of I2C interrupt handle execution before current
  1911. process unlock */
  1912. /* Enable EVT and ERR interrupt */
  1913. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1914. /* Enable DMA Request */
  1915. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1916. return HAL_OK;
  1917. }
  1918. else
  1919. {
  1920. return HAL_BUSY;
  1921. }
  1922. }
  1923. /**
  1924. * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
  1925. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1926. * the configuration information for the specified I2C.
  1927. * @param pData Pointer to data buffer
  1928. * @param Size Amount of data to be sent
  1929. * @retval HAL status
  1930. */
  1931. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1932. {
  1933. __IO uint32_t count = 0U;
  1934. if(hi2c->State == HAL_I2C_STATE_READY)
  1935. {
  1936. if((pData == NULL) || (Size == 0U))
  1937. {
  1938. return HAL_ERROR;
  1939. }
  1940. /* Wait until BUSY flag is reset */
  1941. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1942. do
  1943. {
  1944. if(count-- == 0U)
  1945. {
  1946. hi2c->PreviousState = I2C_STATE_NONE;
  1947. hi2c->State= HAL_I2C_STATE_READY;
  1948. /* Process Unlocked */
  1949. __HAL_UNLOCK(hi2c);
  1950. return HAL_TIMEOUT;
  1951. }
  1952. }
  1953. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1954. /* Process Locked */
  1955. __HAL_LOCK(hi2c);
  1956. /* Check if the I2C is already enabled */
  1957. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1958. {
  1959. /* Enable I2C peripheral */
  1960. __HAL_I2C_ENABLE(hi2c);
  1961. }
  1962. /* Disable Pos */
  1963. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1964. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1965. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1966. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1967. /* Prepare transfer parameters */
  1968. hi2c->pBuffPtr = pData;
  1969. hi2c->XferCount = Size;
  1970. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1971. hi2c->XferSize = hi2c->XferCount;
  1972. /* Set the I2C DMA transfer complete callback */
  1973. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1974. /* Set the DMA error callback */
  1975. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1976. /* Set the unused DMA callbacks to NULL */
  1977. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1978. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1979. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1980. hi2c->hdmarx->XferAbortCallback = NULL;
  1981. /* Enable the DMA Stream */
  1982. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1983. /* Enable Address Acknowledge */
  1984. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1985. /* Process Unlocked */
  1986. __HAL_UNLOCK(hi2c);
  1987. /* Note : The I2C interrupts must be enabled after unlocking current process
  1988. to avoid the risk of I2C interrupt handle execution before current
  1989. process unlock */
  1990. /* Enable EVT and ERR interrupt */
  1991. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1992. /* Enable DMA Request */
  1993. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1994. return HAL_OK;
  1995. }
  1996. else
  1997. {
  1998. return HAL_BUSY;
  1999. }
  2000. }
  2001. /**
  2002. * @brief Write an amount of data in blocking mode to a specific memory address
  2003. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2004. * the configuration information for the specified I2C.
  2005. * @param DevAddress Target device address
  2006. * @param MemAddress Internal memory address
  2007. * @param MemAddSize Size of internal memory address
  2008. * @param pData Pointer to data buffer
  2009. * @param Size Amount of data to be sent
  2010. * @param Timeout Timeout duration
  2011. * @retval HAL status
  2012. */
  2013. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2014. {
  2015. uint32_t tickstart = 0x00U;
  2016. /* Init tickstart for timeout management*/
  2017. tickstart = HAL_GetTick();
  2018. /* Check the parameters */
  2019. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2020. if(hi2c->State == HAL_I2C_STATE_READY)
  2021. {
  2022. /* Wait until BUSY flag is reset */
  2023. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2024. {
  2025. return HAL_BUSY;
  2026. }
  2027. /* Process Locked */
  2028. __HAL_LOCK(hi2c);
  2029. /* Check if the I2C is already enabled */
  2030. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2031. {
  2032. /* Enable I2C peripheral */
  2033. __HAL_I2C_ENABLE(hi2c);
  2034. }
  2035. /* Disable Pos */
  2036. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2037. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2038. hi2c->Mode = HAL_I2C_MODE_MEM;
  2039. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2040. /* Prepare transfer parameters */
  2041. hi2c->pBuffPtr = pData;
  2042. hi2c->XferCount = Size;
  2043. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2044. hi2c->XferSize = hi2c->XferCount;
  2045. /* Send Slave Address and Memory Address */
  2046. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2047. {
  2048. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2049. {
  2050. /* Process Unlocked */
  2051. __HAL_UNLOCK(hi2c);
  2052. return HAL_ERROR;
  2053. }
  2054. else
  2055. {
  2056. /* Process Unlocked */
  2057. __HAL_UNLOCK(hi2c);
  2058. return HAL_TIMEOUT;
  2059. }
  2060. }
  2061. while(hi2c->XferSize > 0U)
  2062. {
  2063. /* Wait until TXE flag is set */
  2064. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2065. {
  2066. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2067. {
  2068. /* Generate Stop */
  2069. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2070. return HAL_ERROR;
  2071. }
  2072. else
  2073. {
  2074. return HAL_TIMEOUT;
  2075. }
  2076. }
  2077. /* Write data to DR */
  2078. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2079. hi2c->XferSize--;
  2080. hi2c->XferCount--;
  2081. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2082. {
  2083. /* Write data to DR */
  2084. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2085. hi2c->XferSize--;
  2086. hi2c->XferCount--;
  2087. }
  2088. }
  2089. /* Wait until BTF flag is set */
  2090. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2091. {
  2092. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2093. {
  2094. /* Generate Stop */
  2095. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2096. return HAL_ERROR;
  2097. }
  2098. else
  2099. {
  2100. return HAL_TIMEOUT;
  2101. }
  2102. }
  2103. /* Generate Stop */
  2104. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2105. hi2c->State = HAL_I2C_STATE_READY;
  2106. hi2c->Mode = HAL_I2C_MODE_NONE;
  2107. /* Process Unlocked */
  2108. __HAL_UNLOCK(hi2c);
  2109. return HAL_OK;
  2110. }
  2111. else
  2112. {
  2113. return HAL_BUSY;
  2114. }
  2115. }
  2116. /**
  2117. * @brief Read an amount of data in blocking mode from a specific memory address
  2118. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2119. * the configuration information for the specified I2C.
  2120. * @param DevAddress Target device address
  2121. * @param MemAddress Internal memory address
  2122. * @param MemAddSize Size of internal memory address
  2123. * @param pData Pointer to data buffer
  2124. * @param Size Amount of data to be sent
  2125. * @param Timeout Timeout duration
  2126. * @retval HAL status
  2127. */
  2128. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2129. {
  2130. uint32_t tickstart = 0x00U;
  2131. /* Init tickstart for timeout management*/
  2132. tickstart = HAL_GetTick();
  2133. /* Check the parameters */
  2134. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2135. if(hi2c->State == HAL_I2C_STATE_READY)
  2136. {
  2137. /* Wait until BUSY flag is reset */
  2138. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2139. {
  2140. return HAL_BUSY;
  2141. }
  2142. /* Process Locked */
  2143. __HAL_LOCK(hi2c);
  2144. /* Check if the I2C is already enabled */
  2145. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2146. {
  2147. /* Enable I2C peripheral */
  2148. __HAL_I2C_ENABLE(hi2c);
  2149. }
  2150. /* Disable Pos */
  2151. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2152. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2153. hi2c->Mode = HAL_I2C_MODE_MEM;
  2154. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2155. /* Prepare transfer parameters */
  2156. hi2c->pBuffPtr = pData;
  2157. hi2c->XferCount = Size;
  2158. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2159. hi2c->XferSize = hi2c->XferCount;
  2160. /* Send Slave Address and Memory Address */
  2161. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2162. {
  2163. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2164. {
  2165. /* Process Unlocked */
  2166. __HAL_UNLOCK(hi2c);
  2167. return HAL_ERROR;
  2168. }
  2169. else
  2170. {
  2171. /* Process Unlocked */
  2172. __HAL_UNLOCK(hi2c);
  2173. return HAL_TIMEOUT;
  2174. }
  2175. }
  2176. if(hi2c->XferSize == 0U)
  2177. {
  2178. /* Clear ADDR flag */
  2179. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2180. /* Generate Stop */
  2181. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2182. }
  2183. else if(hi2c->XferSize == 1U)
  2184. {
  2185. /* Disable Acknowledge */
  2186. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2187. /* Clear ADDR flag */
  2188. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2189. /* Generate Stop */
  2190. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2191. }
  2192. else if(hi2c->XferSize == 2U)
  2193. {
  2194. /* Disable Acknowledge */
  2195. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2196. /* Enable Pos */
  2197. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2198. /* Clear ADDR flag */
  2199. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2200. }
  2201. else
  2202. {
  2203. /* Clear ADDR flag */
  2204. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2205. }
  2206. while(hi2c->XferSize > 0U)
  2207. {
  2208. if(hi2c->XferSize <= 3U)
  2209. {
  2210. /* One byte */
  2211. if(hi2c->XferSize== 1U)
  2212. {
  2213. /* Wait until RXNE flag is set */
  2214. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2215. {
  2216. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2217. {
  2218. return HAL_TIMEOUT;
  2219. }
  2220. else
  2221. {
  2222. return HAL_ERROR;
  2223. }
  2224. }
  2225. /* Read data from DR */
  2226. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2227. hi2c->XferSize--;
  2228. hi2c->XferCount--;
  2229. }
  2230. /* Two bytes */
  2231. else if(Size == 2U)
  2232. {
  2233. /* Wait until BTF flag is set */
  2234. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2235. {
  2236. return HAL_TIMEOUT;
  2237. }
  2238. /* Generate Stop */
  2239. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2240. /* Read data from DR */
  2241. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2242. hi2c->XferSize--;
  2243. hi2c->XferCount--;
  2244. /* Read data from DR */
  2245. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2246. hi2c->XferSize--;
  2247. hi2c->XferCount--;
  2248. }
  2249. /* 3 Last bytes */
  2250. else
  2251. {
  2252. /* Wait until BTF flag is set */
  2253. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2254. {
  2255. return HAL_TIMEOUT;
  2256. }
  2257. /* Disable Acknowledge */
  2258. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2259. /* Read data from DR */
  2260. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2261. hi2c->XferSize--;
  2262. hi2c->XferCount--;
  2263. /* Wait until BTF flag is set */
  2264. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2265. {
  2266. return HAL_TIMEOUT;
  2267. }
  2268. /* Generate Stop */
  2269. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2270. /* Read data from DR */
  2271. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2272. hi2c->XferSize--;
  2273. hi2c->XferCount--;
  2274. /* Read data from DR */
  2275. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2276. hi2c->XferSize--;
  2277. hi2c->XferCount--;
  2278. }
  2279. }
  2280. else
  2281. {
  2282. /* Wait until RXNE flag is set */
  2283. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2284. {
  2285. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2286. {
  2287. return HAL_TIMEOUT;
  2288. }
  2289. else
  2290. {
  2291. return HAL_ERROR;
  2292. }
  2293. }
  2294. /* Read data from DR */
  2295. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2296. hi2c->XferSize--;
  2297. hi2c->XferCount--;
  2298. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2299. {
  2300. /* Read data from DR */
  2301. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2302. hi2c->XferSize--;
  2303. hi2c->XferCount--;
  2304. }
  2305. }
  2306. }
  2307. hi2c->State = HAL_I2C_STATE_READY;
  2308. hi2c->Mode = HAL_I2C_MODE_NONE;
  2309. /* Process Unlocked */
  2310. __HAL_UNLOCK(hi2c);
  2311. return HAL_OK;
  2312. }
  2313. else
  2314. {
  2315. return HAL_BUSY;
  2316. }
  2317. }
  2318. /**
  2319. * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2320. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2321. * the configuration information for the specified I2C.
  2322. * @param DevAddress Target device address
  2323. * @param MemAddress Internal memory address
  2324. * @param MemAddSize Size of internal memory address
  2325. * @param pData Pointer to data buffer
  2326. * @param Size Amount of data to be sent
  2327. * @retval HAL status
  2328. */
  2329. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2330. {
  2331. __IO uint32_t count = 0U;
  2332. /* Check the parameters */
  2333. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2334. if(hi2c->State == HAL_I2C_STATE_READY)
  2335. {
  2336. /* Wait until BUSY flag is reset */
  2337. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2338. do
  2339. {
  2340. if(count-- == 0U)
  2341. {
  2342. hi2c->PreviousState = I2C_STATE_NONE;
  2343. hi2c->State= HAL_I2C_STATE_READY;
  2344. /* Process Unlocked */
  2345. __HAL_UNLOCK(hi2c);
  2346. return HAL_TIMEOUT;
  2347. }
  2348. }
  2349. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2350. /* Process Locked */
  2351. __HAL_LOCK(hi2c);
  2352. /* Check if the I2C is already enabled */
  2353. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2354. {
  2355. /* Enable I2C peripheral */
  2356. __HAL_I2C_ENABLE(hi2c);
  2357. }
  2358. /* Disable Pos */
  2359. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2360. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2361. hi2c->Mode = HAL_I2C_MODE_MEM;
  2362. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2363. /* Prepare transfer parameters */
  2364. hi2c->pBuffPtr = pData;
  2365. hi2c->XferSize = Size;
  2366. hi2c->XferCount = Size;
  2367. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2368. hi2c->Devaddress = DevAddress;
  2369. hi2c->Memaddress = MemAddress;
  2370. hi2c->MemaddSize = MemAddSize;
  2371. hi2c->EventCount = 0U;
  2372. /* Generate Start */
  2373. hi2c->Instance->CR1 |= I2C_CR1_START;
  2374. /* Process Unlocked */
  2375. __HAL_UNLOCK(hi2c);
  2376. /* Note : The I2C interrupts must be enabled after unlocking current process
  2377. to avoid the risk of I2C interrupt handle execution before current
  2378. process unlock */
  2379. /* Enable EVT, BUF and ERR interrupt */
  2380. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2381. return HAL_OK;
  2382. }
  2383. else
  2384. {
  2385. return HAL_BUSY;
  2386. }
  2387. }
  2388. /**
  2389. * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2390. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2391. * the configuration information for the specified I2C.
  2392. * @param DevAddress Target device address
  2393. * @param MemAddress Internal memory address
  2394. * @param MemAddSize Size of internal memory address
  2395. * @param pData Pointer to data buffer
  2396. * @param Size Amount of data to be sent
  2397. * @retval HAL status
  2398. */
  2399. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2400. {
  2401. __IO uint32_t count = 0U;
  2402. /* Check the parameters */
  2403. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2404. if(hi2c->State == HAL_I2C_STATE_READY)
  2405. {
  2406. /* Wait until BUSY flag is reset */
  2407. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2408. do
  2409. {
  2410. if(count-- == 0U)
  2411. {
  2412. hi2c->PreviousState = I2C_STATE_NONE;
  2413. hi2c->State= HAL_I2C_STATE_READY;
  2414. /* Process Unlocked */
  2415. __HAL_UNLOCK(hi2c);
  2416. return HAL_TIMEOUT;
  2417. }
  2418. }
  2419. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2420. /* Process Locked */
  2421. __HAL_LOCK(hi2c);
  2422. /* Check if the I2C is already enabled */
  2423. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2424. {
  2425. /* Enable I2C peripheral */
  2426. __HAL_I2C_ENABLE(hi2c);
  2427. }
  2428. /* Disable Pos */
  2429. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2430. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2431. hi2c->Mode = HAL_I2C_MODE_MEM;
  2432. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2433. /* Prepare transfer parameters */
  2434. hi2c->pBuffPtr = pData;
  2435. hi2c->XferSize = Size;
  2436. hi2c->XferCount = Size;
  2437. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2438. hi2c->Devaddress = DevAddress;
  2439. hi2c->Memaddress = MemAddress;
  2440. hi2c->MemaddSize = MemAddSize;
  2441. hi2c->EventCount = 0U;
  2442. /* Enable Acknowledge */
  2443. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2444. /* Generate Start */
  2445. hi2c->Instance->CR1 |= I2C_CR1_START;
  2446. /* Process Unlocked */
  2447. __HAL_UNLOCK(hi2c);
  2448. if(hi2c->XferSize > 0U)
  2449. {
  2450. /* Note : The I2C interrupts must be enabled after unlocking current process
  2451. to avoid the risk of I2C interrupt handle execution before current
  2452. process unlock */
  2453. /* Enable EVT, BUF and ERR interrupt */
  2454. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2455. }
  2456. return HAL_OK;
  2457. }
  2458. else
  2459. {
  2460. return HAL_BUSY;
  2461. }
  2462. }
  2463. /**
  2464. * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
  2465. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2466. * the configuration information for the specified I2C.
  2467. * @param DevAddress Target device address
  2468. * @param MemAddress Internal memory address
  2469. * @param MemAddSize Size of internal memory address
  2470. * @param pData Pointer to data buffer
  2471. * @param Size Amount of data to be sent
  2472. * @retval HAL status
  2473. */
  2474. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2475. {
  2476. __IO uint32_t count = 0U;
  2477. uint32_t tickstart = 0x00U;
  2478. /* Init tickstart for timeout management*/
  2479. tickstart = HAL_GetTick();
  2480. /* Check the parameters */
  2481. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2482. if(hi2c->State == HAL_I2C_STATE_READY)
  2483. {
  2484. /* Wait until BUSY flag is reset */
  2485. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2486. do
  2487. {
  2488. if(count-- == 0U)
  2489. {
  2490. hi2c->PreviousState = I2C_STATE_NONE;
  2491. hi2c->State= HAL_I2C_STATE_READY;
  2492. /* Process Unlocked */
  2493. __HAL_UNLOCK(hi2c);
  2494. return HAL_TIMEOUT;
  2495. }
  2496. }
  2497. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2498. /* Process Locked */
  2499. __HAL_LOCK(hi2c);
  2500. /* Check if the I2C is already enabled */
  2501. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2502. {
  2503. /* Enable I2C peripheral */
  2504. __HAL_I2C_ENABLE(hi2c);
  2505. }
  2506. /* Disable Pos */
  2507. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2508. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2509. hi2c->Mode = HAL_I2C_MODE_MEM;
  2510. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2511. /* Prepare transfer parameters */
  2512. hi2c->pBuffPtr = pData;
  2513. hi2c->XferSize = Size;
  2514. hi2c->XferCount = Size;
  2515. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2516. if(hi2c->XferSize > 0U)
  2517. {
  2518. /* Set the I2C DMA transfer complete callback */
  2519. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2520. /* Set the DMA error callback */
  2521. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2522. /* Set the unused DMA callbacks to NULL */
  2523. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2524. hi2c->hdmatx->XferM1CpltCallback = NULL;
  2525. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  2526. hi2c->hdmatx->XferAbortCallback = NULL;
  2527. /* Enable the DMA Stream */
  2528. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2529. /* Send Slave Address and Memory Address */
  2530. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2531. {
  2532. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2533. {
  2534. /* Process Unlocked */
  2535. __HAL_UNLOCK(hi2c);
  2536. return HAL_ERROR;
  2537. }
  2538. else
  2539. {
  2540. /* Process Unlocked */
  2541. __HAL_UNLOCK(hi2c);
  2542. return HAL_TIMEOUT;
  2543. }
  2544. }
  2545. /* Clear ADDR flag */
  2546. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2547. /* Process Unlocked */
  2548. __HAL_UNLOCK(hi2c);
  2549. /* Note : The I2C interrupts must be enabled after unlocking current process
  2550. to avoid the risk of I2C interrupt handle execution before current
  2551. process unlock */
  2552. /* Enable ERR interrupt */
  2553. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2554. /* Enable DMA Request */
  2555. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2556. }
  2557. return HAL_OK;
  2558. }
  2559. else
  2560. {
  2561. return HAL_BUSY;
  2562. }
  2563. }
  2564. /**
  2565. * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  2566. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2567. * the configuration information for the specified I2C.
  2568. * @param DevAddress Target device address
  2569. * @param MemAddress Internal memory address
  2570. * @param MemAddSize Size of internal memory address
  2571. * @param pData Pointer to data buffer
  2572. * @param Size Amount of data to be read
  2573. * @retval HAL status
  2574. */
  2575. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2576. {
  2577. uint32_t tickstart = 0x00U;
  2578. /* Init tickstart for timeout management*/
  2579. tickstart = HAL_GetTick();
  2580. __IO uint32_t count = 0U;
  2581. /* Check the parameters */
  2582. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2583. if(hi2c->State == HAL_I2C_STATE_READY)
  2584. {
  2585. /* Wait until BUSY flag is reset */
  2586. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2587. do
  2588. {
  2589. if(count-- == 0U)
  2590. {
  2591. hi2c->PreviousState = I2C_STATE_NONE;
  2592. hi2c->State= HAL_I2C_STATE_READY;
  2593. /* Process Unlocked */
  2594. __HAL_UNLOCK(hi2c);
  2595. return HAL_TIMEOUT;
  2596. }
  2597. }
  2598. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2599. /* Process Locked */
  2600. __HAL_LOCK(hi2c);
  2601. /* Check if the I2C is already enabled */
  2602. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2603. {
  2604. /* Enable I2C peripheral */
  2605. __HAL_I2C_ENABLE(hi2c);
  2606. }
  2607. /* Disable Pos */
  2608. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2609. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2610. hi2c->Mode = HAL_I2C_MODE_MEM;
  2611. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2612. /* Prepare transfer parameters */
  2613. hi2c->pBuffPtr = pData;
  2614. hi2c->XferCount = Size;
  2615. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2616. hi2c->XferSize = hi2c->XferCount;
  2617. if(hi2c->XferSize > 0U)
  2618. {
  2619. /* Set the I2C DMA transfer complete callback */
  2620. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2621. /* Set the DMA error callback */
  2622. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2623. /* Set the unused DMA callbacks to NULL */
  2624. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2625. hi2c->hdmarx->XferM1CpltCallback = NULL;
  2626. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  2627. hi2c->hdmarx->XferAbortCallback = NULL;
  2628. /* Enable the DMA Stream */
  2629. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2630. /* Send Slave Address and Memory Address */
  2631. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2632. {
  2633. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2634. {
  2635. /* Process Unlocked */
  2636. __HAL_UNLOCK(hi2c);
  2637. return HAL_ERROR;
  2638. }
  2639. else
  2640. {
  2641. /* Process Unlocked */
  2642. __HAL_UNLOCK(hi2c);
  2643. return HAL_TIMEOUT;
  2644. }
  2645. }
  2646. if(Size == 1U)
  2647. {
  2648. /* Disable Acknowledge */
  2649. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2650. }
  2651. else
  2652. {
  2653. /* Enable Last DMA bit */
  2654. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2655. }
  2656. /* Clear ADDR flag */
  2657. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2658. /* Process Unlocked */
  2659. __HAL_UNLOCK(hi2c);
  2660. /* Note : The I2C interrupts must be enabled after unlocking current process
  2661. to avoid the risk of I2C interrupt handle execution before current
  2662. process unlock */
  2663. /* Enable ERR interrupt */
  2664. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2665. /* Enable DMA Request */
  2666. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2667. }
  2668. else
  2669. {
  2670. /* Send Slave Address and Memory Address */
  2671. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2672. {
  2673. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2674. {
  2675. /* Process Unlocked */
  2676. __HAL_UNLOCK(hi2c);
  2677. return HAL_ERROR;
  2678. }
  2679. else
  2680. {
  2681. /* Process Unlocked */
  2682. __HAL_UNLOCK(hi2c);
  2683. return HAL_TIMEOUT;
  2684. }
  2685. }
  2686. /* Clear ADDR flag */
  2687. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2688. /* Generate Stop */
  2689. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2690. hi2c->State = HAL_I2C_STATE_READY;
  2691. /* Process Unlocked */
  2692. __HAL_UNLOCK(hi2c);
  2693. }
  2694. return HAL_OK;
  2695. }
  2696. else
  2697. {
  2698. return HAL_BUSY;
  2699. }
  2700. }
  2701. /**
  2702. * @brief Checks if target device is ready for communication.
  2703. * @note This function is used with Memory devices
  2704. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2705. * the configuration information for the specified I2C.
  2706. * @param DevAddress Target device address
  2707. * @param Trials Number of trials
  2708. * @param Timeout Timeout duration
  2709. * @retval HAL status
  2710. */
  2711. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2712. {
  2713. uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
  2714. /* Get tick */
  2715. tickstart = HAL_GetTick();
  2716. if(hi2c->State == HAL_I2C_STATE_READY)
  2717. {
  2718. /* Wait until BUSY flag is reset */
  2719. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2720. {
  2721. return HAL_BUSY;
  2722. }
  2723. /* Process Locked */
  2724. __HAL_LOCK(hi2c);
  2725. /* Check if the I2C is already enabled */
  2726. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2727. {
  2728. /* Enable I2C peripheral */
  2729. __HAL_I2C_ENABLE(hi2c);
  2730. }
  2731. /* Disable Pos */
  2732. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2733. hi2c->State = HAL_I2C_STATE_BUSY;
  2734. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2735. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2736. do
  2737. {
  2738. /* Generate Start */
  2739. hi2c->Instance->CR1 |= I2C_CR1_START;
  2740. /* Wait until SB flag is set */
  2741. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2742. {
  2743. return HAL_TIMEOUT;
  2744. }
  2745. /* Send slave address */
  2746. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2747. /* Wait until ADDR or AF flag are set */
  2748. /* Get tick */
  2749. tickstart = HAL_GetTick();
  2750. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2751. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2752. tmp3 = hi2c->State;
  2753. while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
  2754. {
  2755. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  2756. {
  2757. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2758. }
  2759. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2760. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2761. tmp3 = hi2c->State;
  2762. }
  2763. hi2c->State = HAL_I2C_STATE_READY;
  2764. /* Check if the ADDR flag has been set */
  2765. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2766. {
  2767. /* Generate Stop */
  2768. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2769. /* Clear ADDR Flag */
  2770. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2771. /* Wait until BUSY flag is reset */
  2772. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2773. {
  2774. return HAL_TIMEOUT;
  2775. }
  2776. hi2c->State = HAL_I2C_STATE_READY;
  2777. /* Process Unlocked */
  2778. __HAL_UNLOCK(hi2c);
  2779. return HAL_OK;
  2780. }
  2781. else
  2782. {
  2783. /* Generate Stop */
  2784. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2785. /* Clear AF Flag */
  2786. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2787. /* Wait until BUSY flag is reset */
  2788. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2789. {
  2790. return HAL_TIMEOUT;
  2791. }
  2792. }
  2793. }while(I2C_Trials++ < Trials);
  2794. hi2c->State = HAL_I2C_STATE_READY;
  2795. /* Process Unlocked */
  2796. __HAL_UNLOCK(hi2c);
  2797. return HAL_ERROR;
  2798. }
  2799. else
  2800. {
  2801. return HAL_BUSY;
  2802. }
  2803. }
  2804. /**
  2805. * @brief This function handles I2C event interrupt request.
  2806. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2807. * the configuration information for the specified I2C.
  2808. * @retval None
  2809. */
  2810. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2811. {
  2812. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2813. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2814. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2815. uint32_t CurrentMode = hi2c->Mode;
  2816. /* Master or Memory mode selected */
  2817. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2818. {
  2819. /* SB Set ----------------------------------------------------------------*/
  2820. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2821. {
  2822. I2C_Master_SB(hi2c);
  2823. }
  2824. /* ADD10 Set -------------------------------------------------------------*/
  2825. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2826. {
  2827. I2C_Master_ADD10(hi2c);
  2828. }
  2829. /* ADDR Set --------------------------------------------------------------*/
  2830. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2831. {
  2832. I2C_Master_ADDR(hi2c);
  2833. }
  2834. /* I2C in mode Transmitter -----------------------------------------------*/
  2835. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2836. {
  2837. /* TXE set and BTF reset -----------------------------------------------*/
  2838. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2839. {
  2840. I2C_MasterTransmit_TXE(hi2c);
  2841. }
  2842. /* BTF set -------------------------------------------------------------*/
  2843. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2844. {
  2845. I2C_MasterTransmit_BTF(hi2c);
  2846. }
  2847. }
  2848. /* I2C in mode Receiver --------------------------------------------------*/
  2849. else
  2850. {
  2851. /* RXNE set and BTF reset -----------------------------------------------*/
  2852. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2853. {
  2854. I2C_MasterReceive_RXNE(hi2c);
  2855. }
  2856. /* BTF set -------------------------------------------------------------*/
  2857. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2858. {
  2859. I2C_MasterReceive_BTF(hi2c);
  2860. }
  2861. }
  2862. }
  2863. /* Slave mode selected */
  2864. else
  2865. {
  2866. /* ADDR set --------------------------------------------------------------*/
  2867. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2868. {
  2869. I2C_Slave_ADDR(hi2c);
  2870. }
  2871. /* STOPF set --------------------------------------------------------------*/
  2872. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2873. {
  2874. I2C_Slave_STOPF(hi2c);
  2875. }
  2876. /* I2C in mode Transmitter -----------------------------------------------*/
  2877. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2878. {
  2879. /* TXE set and BTF reset -----------------------------------------------*/
  2880. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2881. {
  2882. I2C_SlaveTransmit_TXE(hi2c);
  2883. }
  2884. /* BTF set -------------------------------------------------------------*/
  2885. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2886. {
  2887. I2C_SlaveTransmit_BTF(hi2c);
  2888. }
  2889. }
  2890. /* I2C in mode Receiver --------------------------------------------------*/
  2891. else
  2892. {
  2893. /* RXNE set and BTF reset ----------------------------------------------*/
  2894. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2895. {
  2896. I2C_SlaveReceive_RXNE(hi2c);
  2897. }
  2898. /* BTF set -------------------------------------------------------------*/
  2899. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2900. {
  2901. I2C_SlaveReceive_BTF(hi2c);
  2902. }
  2903. }
  2904. }
  2905. }
  2906. /**
  2907. * @brief This function handles I2C error interrupt request.
  2908. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2909. * the configuration information for the specified I2C.
  2910. * @retval None
  2911. */
  2912. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2913. {
  2914. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
  2915. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2916. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2917. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2918. if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2919. {
  2920. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2921. /* Clear BERR flag */
  2922. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2923. }
  2924. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2925. if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2926. {
  2927. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2928. /* Clear ARLO flag */
  2929. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2930. }
  2931. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2932. if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2933. {
  2934. tmp1 = hi2c->Mode;
  2935. tmp2 = hi2c->XferCount;
  2936. tmp3 = hi2c->State;
  2937. tmp4 = hi2c->PreviousState;
  2938. if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2939. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2940. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2941. {
  2942. I2C_Slave_AF(hi2c);
  2943. }
  2944. else
  2945. {
  2946. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2947. /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  2948. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  2949. {
  2950. /* Generate Stop */
  2951. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2952. }
  2953. /* Clear AF flag */
  2954. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2955. }
  2956. }
  2957. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2958. if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2959. {
  2960. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  2961. /* Clear OVR flag */
  2962. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2963. }
  2964. /* Call the Error Callback in case of Error detected -----------------------*/
  2965. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2966. {
  2967. I2C_ITError(hi2c);
  2968. }
  2969. }
  2970. /**
  2971. * @brief Master Tx Transfer completed callback.
  2972. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2973. * the configuration information for the specified I2C.
  2974. * @retval None
  2975. */
  2976. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2977. {
  2978. /* Prevent unused argument(s) compilation warning */
  2979. UNUSED(hi2c);
  2980. /* NOTE : This function should not be modified, when the callback is needed,
  2981. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  2982. */
  2983. }
  2984. /**
  2985. * @brief Master Rx Transfer completed callback.
  2986. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2987. * the configuration information for the specified I2C.
  2988. * @retval None
  2989. */
  2990. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2991. {
  2992. /* Prevent unused argument(s) compilation warning */
  2993. UNUSED(hi2c);
  2994. /* NOTE : This function should not be modified, when the callback is needed,
  2995. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  2996. */
  2997. }
  2998. /** @brief Slave Tx Transfer completed callback.
  2999. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3000. * the configuration information for the specified I2C.
  3001. * @retval None
  3002. */
  3003. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3004. {
  3005. /* Prevent unused argument(s) compilation warning */
  3006. UNUSED(hi2c);
  3007. /* NOTE : This function should not be modified, when the callback is needed,
  3008. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  3009. */
  3010. }
  3011. /**
  3012. * @brief Slave Rx Transfer completed callback.
  3013. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3014. * the configuration information for the specified I2C.
  3015. * @retval None
  3016. */
  3017. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3018. {
  3019. /* Prevent unused argument(s) compilation warning */
  3020. UNUSED(hi2c);
  3021. /* NOTE : This function should not be modified, when the callback is needed,
  3022. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  3023. */
  3024. }
  3025. /**
  3026. * @brief Slave Address Match callback.
  3027. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3028. * the configuration information for the specified I2C.
  3029. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
  3030. * @param AddrMatchCode Address Match Code
  3031. * @retval None
  3032. */
  3033. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  3034. {
  3035. /* Prevent unused argument(s) compilation warning */
  3036. UNUSED(hi2c);
  3037. UNUSED(TransferDirection);
  3038. UNUSED(AddrMatchCode);
  3039. /* NOTE : This function should not be modified, when the callback is needed,
  3040. the HAL_I2C_AddrCallback can be implemented in the user file
  3041. */
  3042. }
  3043. /**
  3044. * @brief Listen Complete callback.
  3045. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3046. * the configuration information for the specified I2C.
  3047. * @retval None
  3048. */
  3049. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  3050. {
  3051. /* Prevent unused argument(s) compilation warning */
  3052. UNUSED(hi2c);
  3053. /* NOTE : This function should not be modified, when the callback is needed,
  3054. the HAL_I2C_ListenCpltCallback can be implemented in the user file
  3055. */
  3056. }
  3057. /**
  3058. * @brief Memory Tx Transfer completed callback.
  3059. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3060. * the configuration information for the specified I2C.
  3061. * @retval None
  3062. */
  3063. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3064. {
  3065. /* Prevent unused argument(s) compilation warning */
  3066. UNUSED(hi2c);
  3067. /* NOTE : This function should not be modified, when the callback is needed,
  3068. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  3069. */
  3070. }
  3071. /**
  3072. * @brief Memory Rx Transfer completed callback.
  3073. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3074. * the configuration information for the specified I2C.
  3075. * @retval None
  3076. */
  3077. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3078. {
  3079. /* Prevent unused argument(s) compilation warning */
  3080. UNUSED(hi2c);
  3081. /* NOTE : This function should not be modified, when the callback is needed,
  3082. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  3083. */
  3084. }
  3085. /**
  3086. * @brief I2C error callback.
  3087. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3088. * the configuration information for the specified I2C.
  3089. * @retval None
  3090. */
  3091. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  3092. {
  3093. /* Prevent unused argument(s) compilation warning */
  3094. UNUSED(hi2c);
  3095. /* NOTE : This function should not be modified, when the callback is needed,
  3096. the HAL_I2C_ErrorCallback can be implemented in the user file
  3097. */
  3098. }
  3099. /**
  3100. * @brief I2C abort callback.
  3101. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3102. * the configuration information for the specified I2C.
  3103. * @retval None
  3104. */
  3105. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  3106. {
  3107. /* Prevent unused argument(s) compilation warning */
  3108. UNUSED(hi2c);
  3109. /* NOTE : This function should not be modified, when the callback is needed,
  3110. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  3111. */
  3112. }
  3113. /**
  3114. * @}
  3115. */
  3116. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  3117. * @brief Peripheral State and Errors functions
  3118. *
  3119. @verbatim
  3120. ===============================================================================
  3121. ##### Peripheral State, Mode and Error functions #####
  3122. ===============================================================================
  3123. [..]
  3124. This subsection permits to get in run-time the status of the peripheral
  3125. and the data flow.
  3126. @endverbatim
  3127. * @{
  3128. */
  3129. /**
  3130. * @brief Return the I2C handle state.
  3131. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3132. * the configuration information for the specified I2C.
  3133. * @retval HAL state
  3134. */
  3135. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  3136. {
  3137. /* Return I2C handle state */
  3138. return hi2c->State;
  3139. }
  3140. /**
  3141. * @brief Return the I2C Master, Slave, Memory or no mode.
  3142. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3143. * the configuration information for I2C module
  3144. * @retval HAL mode
  3145. */
  3146. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  3147. {
  3148. return hi2c->Mode;
  3149. }
  3150. /**
  3151. * @brief Return the I2C error code
  3152. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3153. * the configuration information for the specified I2C.
  3154. * @retval I2C Error Code
  3155. */
  3156. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  3157. {
  3158. return hi2c->ErrorCode;
  3159. }
  3160. /**
  3161. * @}
  3162. */
  3163. /**
  3164. * @brief Handle TXE flag for Master
  3165. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3166. * the configuration information for I2C module
  3167. * @retval HAL status
  3168. */
  3169. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3170. {
  3171. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3172. uint32_t CurrentState = hi2c->State;
  3173. uint32_t CurrentMode = hi2c->Mode;
  3174. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3175. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  3176. {
  3177. /* Call TxCpltCallback() directly if no stop mode is set */
  3178. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3179. {
  3180. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3181. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3182. hi2c->Mode = HAL_I2C_MODE_NONE;
  3183. hi2c->State = HAL_I2C_STATE_READY;
  3184. HAL_I2C_MasterTxCpltCallback(hi2c);
  3185. }
  3186. else /* Generate Stop condition then Call TxCpltCallback() */
  3187. {
  3188. /* Disable EVT, BUF and ERR interrupt */
  3189. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3190. /* Generate Stop */
  3191. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3192. hi2c->PreviousState = I2C_STATE_NONE;
  3193. hi2c->State = HAL_I2C_STATE_READY;
  3194. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3195. {
  3196. hi2c->Mode = HAL_I2C_MODE_NONE;
  3197. HAL_I2C_MemTxCpltCallback(hi2c);
  3198. }
  3199. else
  3200. {
  3201. hi2c->Mode = HAL_I2C_MODE_NONE;
  3202. HAL_I2C_MasterTxCpltCallback(hi2c);
  3203. }
  3204. }
  3205. }
  3206. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3207. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3208. {
  3209. if(hi2c->XferCount == 0U)
  3210. {
  3211. /* Disable BUF interrupt */
  3212. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3213. }
  3214. else
  3215. {
  3216. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3217. {
  3218. if(hi2c->EventCount == 0)
  3219. {
  3220. /* If Memory address size is 8Bit */
  3221. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3222. {
  3223. /* Send Memory Address */
  3224. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3225. hi2c->EventCount += 2;
  3226. }
  3227. /* If Memory address size is 16Bit */
  3228. else
  3229. {
  3230. /* Send MSB of Memory Address */
  3231. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3232. hi2c->EventCount++;
  3233. }
  3234. }
  3235. else if(hi2c->EventCount == 1)
  3236. {
  3237. /* Send LSB of Memory Address */
  3238. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3239. hi2c->EventCount++;
  3240. }
  3241. else if(hi2c->EventCount == 2)
  3242. {
  3243. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3244. {
  3245. /* Generate Restart */
  3246. hi2c->Instance->CR1 |= I2C_CR1_START;
  3247. }
  3248. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3249. {
  3250. /* Write data to DR */
  3251. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3252. hi2c->XferCount--;
  3253. }
  3254. }
  3255. }
  3256. else
  3257. {
  3258. /* Write data to DR */
  3259. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3260. hi2c->XferCount--;
  3261. }
  3262. }
  3263. }
  3264. return HAL_OK;
  3265. }
  3266. /**
  3267. * @brief Handle BTF flag for Master transmitter
  3268. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3269. * the configuration information for I2C module
  3270. * @retval HAL status
  3271. */
  3272. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3273. {
  3274. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3275. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3276. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3277. {
  3278. if(hi2c->XferCount != 0U)
  3279. {
  3280. /* Write data to DR */
  3281. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3282. hi2c->XferCount--;
  3283. }
  3284. else
  3285. {
  3286. /* Call TxCpltCallback() directly if no stop mode is set */
  3287. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3288. {
  3289. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3290. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3291. hi2c->Mode = HAL_I2C_MODE_NONE;
  3292. hi2c->State = HAL_I2C_STATE_READY;
  3293. HAL_I2C_MasterTxCpltCallback(hi2c);
  3294. }
  3295. else /* Generate Stop condition then Call TxCpltCallback() */
  3296. {
  3297. /* Disable EVT, BUF and ERR interrupt */
  3298. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3299. /* Generate Stop */
  3300. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3301. hi2c->PreviousState = I2C_STATE_NONE;
  3302. hi2c->State = HAL_I2C_STATE_READY;
  3303. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3304. {
  3305. hi2c->Mode = HAL_I2C_MODE_NONE;
  3306. HAL_I2C_MemTxCpltCallback(hi2c);
  3307. }
  3308. else
  3309. {
  3310. hi2c->Mode = HAL_I2C_MODE_NONE;
  3311. HAL_I2C_MasterTxCpltCallback(hi2c);
  3312. }
  3313. }
  3314. }
  3315. }
  3316. return HAL_OK;
  3317. }
  3318. /**
  3319. * @brief Handle RXNE flag for Master
  3320. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3321. * the configuration information for I2C module
  3322. * @retval HAL status
  3323. */
  3324. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3325. {
  3326. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3327. {
  3328. uint32_t tmp = 0U;
  3329. tmp = hi2c->XferCount;
  3330. if(tmp > 3U)
  3331. {
  3332. /* Read data from DR */
  3333. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3334. hi2c->XferCount--;
  3335. }
  3336. else if((tmp == 2U) || (tmp == 3U))
  3337. {
  3338. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3339. {
  3340. /* Disable Acknowledge */
  3341. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3342. /* Enable Pos */
  3343. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3344. }
  3345. else
  3346. {
  3347. /* Enable Acknowledge */
  3348. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3349. }
  3350. /* Disable BUF interrupt */
  3351. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3352. }
  3353. else
  3354. {
  3355. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3356. {
  3357. /* Disable Acknowledge */
  3358. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3359. }
  3360. else
  3361. {
  3362. /* Enable Acknowledge */
  3363. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3364. }
  3365. /* Disable EVT, BUF and ERR interrupt */
  3366. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3367. /* Read data from DR */
  3368. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3369. hi2c->XferCount--;
  3370. hi2c->State = HAL_I2C_STATE_READY;
  3371. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3372. {
  3373. hi2c->PreviousState = I2C_STATE_NONE;
  3374. hi2c->Mode = HAL_I2C_MODE_NONE;
  3375. HAL_I2C_MemRxCpltCallback(hi2c);
  3376. }
  3377. else
  3378. {
  3379. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  3380. hi2c->Mode = HAL_I2C_MODE_NONE;
  3381. HAL_I2C_MasterRxCpltCallback(hi2c);
  3382. }
  3383. }
  3384. }
  3385. return HAL_OK;
  3386. }
  3387. /**
  3388. * @brief Handle BTF flag for Master receiver
  3389. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3390. * the configuration information for I2C module
  3391. * @retval HAL status
  3392. */
  3393. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3394. {
  3395. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3396. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3397. if(hi2c->XferCount == 3U)
  3398. {
  3399. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3400. {
  3401. /* Disable Acknowledge */
  3402. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3403. }
  3404. /* Read data from DR */
  3405. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3406. hi2c->XferCount--;
  3407. }
  3408. else if(hi2c->XferCount == 2U)
  3409. {
  3410. /* Prepare next transfer or stop current transfer */
  3411. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3412. {
  3413. if(CurrentXferOptions != I2C_NEXT_FRAME)
  3414. {
  3415. /* Disable Acknowledge */
  3416. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3417. }
  3418. else
  3419. {
  3420. /* Enable Acknowledge */
  3421. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3422. }
  3423. }
  3424. else
  3425. {
  3426. /* Generate Stop */
  3427. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3428. }
  3429. /* Read data from DR */
  3430. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3431. hi2c->XferCount--;
  3432. /* Read data from DR */
  3433. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3434. hi2c->XferCount--;
  3435. /* Disable EVT and ERR interrupt */
  3436. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3437. hi2c->State = HAL_I2C_STATE_READY;
  3438. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3439. {
  3440. hi2c->PreviousState = I2C_STATE_NONE;
  3441. hi2c->Mode = HAL_I2C_MODE_NONE;
  3442. HAL_I2C_MemRxCpltCallback(hi2c);
  3443. }
  3444. else
  3445. {
  3446. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  3447. hi2c->Mode = HAL_I2C_MODE_NONE;
  3448. HAL_I2C_MasterRxCpltCallback(hi2c);
  3449. }
  3450. }
  3451. else
  3452. {
  3453. /* Read data from DR */
  3454. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3455. hi2c->XferCount--;
  3456. }
  3457. return HAL_OK;
  3458. }
  3459. /**
  3460. * @brief Handle SB flag for Master
  3461. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3462. * the configuration information for I2C module
  3463. * @retval HAL status
  3464. */
  3465. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3466. {
  3467. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3468. {
  3469. if(hi2c->EventCount == 0U)
  3470. {
  3471. /* Send slave address */
  3472. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3473. }
  3474. else
  3475. {
  3476. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3477. }
  3478. }
  3479. else
  3480. {
  3481. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3482. {
  3483. /* Send slave 7 Bits address */
  3484. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3485. {
  3486. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3487. }
  3488. else
  3489. {
  3490. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3491. }
  3492. }
  3493. else
  3494. {
  3495. if(hi2c->EventCount == 0U)
  3496. {
  3497. /* Send header of slave address */
  3498. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  3499. }
  3500. else if(hi2c->EventCount == 1U)
  3501. {
  3502. /* Send header of slave address */
  3503. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  3504. }
  3505. }
  3506. }
  3507. return HAL_OK;
  3508. }
  3509. /**
  3510. * @brief Handle ADD10 flag for Master
  3511. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3512. * the configuration information for I2C module
  3513. * @retval HAL status
  3514. */
  3515. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3516. {
  3517. /* Send slave address */
  3518. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3519. return HAL_OK;
  3520. }
  3521. /**
  3522. * @brief Handle ADDR flag for Master
  3523. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3524. * the configuration information for I2C module
  3525. * @retval HAL status
  3526. */
  3527. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3528. {
  3529. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3530. uint32_t CurrentMode = hi2c->Mode;
  3531. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3532. uint32_t Prev_State = hi2c->PreviousState;
  3533. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3534. {
  3535. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3536. {
  3537. /* Clear ADDR flag */
  3538. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3539. }
  3540. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  3541. {
  3542. /* Clear ADDR flag */
  3543. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3544. /* Generate Restart */
  3545. hi2c->Instance->CR1 |= I2C_CR1_START;
  3546. hi2c->EventCount++;
  3547. }
  3548. else
  3549. {
  3550. if(hi2c->XferCount == 0U)
  3551. {
  3552. /* Clear ADDR flag */
  3553. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3554. /* Generate Stop */
  3555. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3556. }
  3557. else if(hi2c->XferCount == 1U)
  3558. {
  3559. if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
  3560. {
  3561. /* Disable Acknowledge */
  3562. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3563. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3564. {
  3565. /* Disable Acknowledge */
  3566. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3567. /* Clear ADDR flag */
  3568. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3569. }
  3570. else
  3571. {
  3572. /* Clear ADDR flag */
  3573. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3574. /* Generate Stop */
  3575. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3576. }
  3577. }
  3578. /* Prepare next transfer or stop current transfer */
  3579. else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3580. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  3581. {
  3582. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3583. {
  3584. /* Disable Acknowledge */
  3585. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3586. }
  3587. else
  3588. {
  3589. /* Enable Acknowledge */
  3590. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3591. }
  3592. /* Clear ADDR flag */
  3593. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3594. }
  3595. else
  3596. {
  3597. /* Disable Acknowledge */
  3598. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3599. /* Clear ADDR flag */
  3600. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3601. /* Generate Stop */
  3602. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3603. }
  3604. }
  3605. else if(hi2c->XferCount == 2U)
  3606. {
  3607. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3608. {
  3609. /* Disable Acknowledge */
  3610. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3611. /* Enable Pos */
  3612. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3613. }
  3614. else
  3615. {
  3616. /* Enable Acknowledge */
  3617. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3618. }
  3619. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3620. {
  3621. /* Enable Last DMA bit */
  3622. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3623. }
  3624. /* Clear ADDR flag */
  3625. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3626. }
  3627. else
  3628. {
  3629. /* Enable Acknowledge */
  3630. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3631. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3632. {
  3633. /* Enable Last DMA bit */
  3634. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3635. }
  3636. /* Clear ADDR flag */
  3637. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3638. }
  3639. /* Reset Event counter */
  3640. hi2c->EventCount = 0U;
  3641. }
  3642. }
  3643. else
  3644. {
  3645. /* Clear ADDR flag */
  3646. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3647. }
  3648. return HAL_OK;
  3649. }
  3650. /**
  3651. * @brief Handle TXE flag for Slave
  3652. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3653. * the configuration information for I2C module
  3654. * @retval HAL status
  3655. */
  3656. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3657. {
  3658. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3659. uint32_t CurrentState = hi2c->State;
  3660. if(hi2c->XferCount != 0U)
  3661. {
  3662. /* Write data to DR */
  3663. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3664. hi2c->XferCount--;
  3665. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3666. {
  3667. /* Last Byte is received, disable Interrupt */
  3668. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3669. /* Set state at HAL_I2C_STATE_LISTEN */
  3670. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3671. hi2c->State = HAL_I2C_STATE_LISTEN;
  3672. /* Call the Tx complete callback to inform upper layer of the end of receive process */
  3673. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3674. }
  3675. }
  3676. return HAL_OK;
  3677. }
  3678. /**
  3679. * @brief Handle BTF flag for Slave transmitter
  3680. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3681. * the configuration information for I2C module
  3682. * @retval HAL status
  3683. */
  3684. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3685. {
  3686. if(hi2c->XferCount != 0U)
  3687. {
  3688. /* Write data to DR */
  3689. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3690. hi2c->XferCount--;
  3691. }
  3692. return HAL_OK;
  3693. }
  3694. /**
  3695. * @brief Handle RXNE flag for Slave
  3696. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3697. * the configuration information for I2C module
  3698. * @retval HAL status
  3699. */
  3700. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3701. {
  3702. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3703. uint32_t CurrentState = hi2c->State;
  3704. if(hi2c->XferCount != 0U)
  3705. {
  3706. /* Read data from DR */
  3707. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3708. hi2c->XferCount--;
  3709. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3710. {
  3711. /* Last Byte is received, disable Interrupt */
  3712. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3713. /* Set state at HAL_I2C_STATE_LISTEN */
  3714. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3715. hi2c->State = HAL_I2C_STATE_LISTEN;
  3716. /* Call the Rx complete callback to inform upper layer of the end of receive process */
  3717. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3718. }
  3719. }
  3720. return HAL_OK;
  3721. }
  3722. /**
  3723. * @brief Handle BTF flag for Slave receiver
  3724. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3725. * the configuration information for I2C module
  3726. * @retval HAL status
  3727. */
  3728. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3729. {
  3730. if(hi2c->XferCount != 0U)
  3731. {
  3732. /* Read data from DR */
  3733. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3734. hi2c->XferCount--;
  3735. }
  3736. return HAL_OK;
  3737. }
  3738. /**
  3739. * @brief Handle ADD flag for Slave
  3740. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3741. * the configuration information for I2C module
  3742. * @retval HAL status
  3743. */
  3744. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  3745. {
  3746. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3747. uint16_t SlaveAddrCode = 0U;
  3748. /* Transfer Direction requested by Master */
  3749. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3750. {
  3751. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3752. }
  3753. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3754. {
  3755. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3756. }
  3757. else
  3758. {
  3759. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3760. }
  3761. /* Call Slave Addr callback */
  3762. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3763. return HAL_OK;
  3764. }
  3765. /**
  3766. * @brief Handle STOPF flag for Slave
  3767. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3768. * the configuration information for I2C module
  3769. * @retval HAL status
  3770. */
  3771. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3772. {
  3773. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3774. uint32_t CurrentState = hi2c->State;
  3775. /* Disable EVT, BUF and ERR interrupt */
  3776. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3777. /* Clear STOPF flag */
  3778. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3779. /* Disable Acknowledge */
  3780. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3781. /* If a DMA is ongoing, Update handle size context */
  3782. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3783. {
  3784. if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3785. {
  3786. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
  3787. }
  3788. else
  3789. {
  3790. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3791. }
  3792. }
  3793. /* All data are not transferred, so set error code accordingly */
  3794. if(hi2c->XferCount != 0U)
  3795. {
  3796. /* Store Last receive data if any */
  3797. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3798. {
  3799. /* Read data from DR */
  3800. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3801. hi2c->XferCount--;
  3802. }
  3803. /* Store Last receive data if any */
  3804. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3805. {
  3806. /* Read data from DR */
  3807. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3808. hi2c->XferCount--;
  3809. }
  3810. /* Set ErrorCode corresponding to a Non-Acknowledge */
  3811. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3812. }
  3813. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3814. {
  3815. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3816. I2C_ITError(hi2c);
  3817. }
  3818. else
  3819. {
  3820. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3821. (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3822. {
  3823. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3824. hi2c->PreviousState = I2C_STATE_NONE;
  3825. hi2c->State = HAL_I2C_STATE_READY;
  3826. hi2c->Mode = HAL_I2C_MODE_NONE;
  3827. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3828. HAL_I2C_ListenCpltCallback(hi2c);
  3829. }
  3830. else
  3831. {
  3832. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3833. {
  3834. hi2c->PreviousState = I2C_STATE_NONE;
  3835. hi2c->State = HAL_I2C_STATE_READY;
  3836. hi2c->Mode = HAL_I2C_MODE_NONE;
  3837. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3838. }
  3839. }
  3840. }
  3841. return HAL_OK;
  3842. }
  3843. /**
  3844. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3845. * the configuration information for I2C module
  3846. * @retval HAL status
  3847. */
  3848. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3849. {
  3850. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3851. uint32_t CurrentState = hi2c->State;
  3852. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3853. if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3854. (CurrentState == HAL_I2C_STATE_LISTEN))
  3855. {
  3856. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3857. /* Disable EVT, BUF and ERR interrupt */
  3858. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3859. /* Clear AF flag */
  3860. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3861. /* Disable Acknowledge */
  3862. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3863. hi2c->PreviousState = I2C_STATE_NONE;
  3864. hi2c->State = HAL_I2C_STATE_READY;
  3865. hi2c->Mode = HAL_I2C_MODE_NONE;
  3866. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3867. HAL_I2C_ListenCpltCallback(hi2c);
  3868. }
  3869. else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
  3870. {
  3871. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3872. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3873. hi2c->State = HAL_I2C_STATE_READY;
  3874. hi2c->Mode = HAL_I2C_MODE_NONE;
  3875. /* Disable EVT, BUF and ERR interrupt */
  3876. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3877. /* Clear AF flag */
  3878. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3879. /* Disable Acknowledge */
  3880. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3881. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3882. }
  3883. else
  3884. {
  3885. /* Clear AF flag only */
  3886. /* State Listen, but XferOptions == FIRST or NEXT */
  3887. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3888. }
  3889. return HAL_OK;
  3890. }
  3891. /**
  3892. * @brief I2C interrupts error process
  3893. * @param hi2c I2C handle.
  3894. * @retval None
  3895. */
  3896. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3897. {
  3898. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3899. uint32_t CurrentState = hi2c->State;
  3900. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3901. {
  3902. /* keep HAL_I2C_STATE_LISTEN */
  3903. hi2c->PreviousState = I2C_STATE_NONE;
  3904. hi2c->State = HAL_I2C_STATE_LISTEN;
  3905. }
  3906. else
  3907. {
  3908. /* If state is an abort treatment on going, don't change state */
  3909. /* This change will be do later */
  3910. if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
  3911. {
  3912. hi2c->State = HAL_I2C_STATE_READY;
  3913. }
  3914. hi2c->PreviousState = I2C_STATE_NONE;
  3915. hi2c->Mode = HAL_I2C_MODE_NONE;
  3916. }
  3917. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3918. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3919. /* Abort DMA transfer */
  3920. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3921. {
  3922. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  3923. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  3924. {
  3925. /* Set the DMA Abort callback :
  3926. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3927. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  3928. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  3929. {
  3930. /* Disable I2C peripheral to prevent dummy data in buffer */
  3931. __HAL_I2C_DISABLE(hi2c);
  3932. hi2c->State = HAL_I2C_STATE_READY;
  3933. /* Call Directly XferAbortCallback function in case of error */
  3934. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  3935. }
  3936. }
  3937. else
  3938. {
  3939. /* Set the DMA Abort callback :
  3940. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3941. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  3942. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  3943. {
  3944. /* Store Last receive data if any */
  3945. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3946. {
  3947. /* Read data from DR */
  3948. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3949. }
  3950. /* Disable I2C peripheral to prevent dummy data in buffer */
  3951. __HAL_I2C_DISABLE(hi2c);
  3952. hi2c->State = HAL_I2C_STATE_READY;
  3953. /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  3954. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  3955. }
  3956. }
  3957. }
  3958. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  3959. {
  3960. hi2c->State = HAL_I2C_STATE_READY;
  3961. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3962. /* Store Last receive data if any */
  3963. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3964. {
  3965. /* Read data from DR */
  3966. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3967. }
  3968. /* Disable I2C peripheral to prevent dummy data in buffer */
  3969. __HAL_I2C_DISABLE(hi2c);
  3970. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3971. HAL_I2C_AbortCpltCallback(hi2c);
  3972. }
  3973. else
  3974. {
  3975. /* Store Last receive data if any */
  3976. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3977. {
  3978. /* Read data from DR */
  3979. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3980. }
  3981. /* Call user error callback */
  3982. HAL_I2C_ErrorCallback(hi2c);
  3983. }
  3984. /* STOP Flag is not set after a NACK reception */
  3985. /* So may inform upper layer that listen phase is stopped */
  3986. /* during NACK error treatment */
  3987. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  3988. {
  3989. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3990. hi2c->PreviousState = I2C_STATE_NONE;
  3991. hi2c->State = HAL_I2C_STATE_READY;
  3992. hi2c->Mode = HAL_I2C_MODE_NONE;
  3993. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3994. HAL_I2C_ListenCpltCallback(hi2c);
  3995. }
  3996. }
  3997. /**
  3998. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3999. * the configuration information for I2C module
  4000. * @param DevAddress Target device address: The device 7 bits address value
  4001. * in datasheet must be shift at right before call interface
  4002. * @param Timeout Timeout duration
  4003. * @param Tickstart Tick start value
  4004. * @retval HAL status
  4005. */
  4006. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4007. {
  4008. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4009. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4010. /* Generate Start condition if first transfer */
  4011. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4012. {
  4013. /* Generate Start */
  4014. hi2c->Instance->CR1 |= I2C_CR1_START;
  4015. }
  4016. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  4017. {
  4018. /* Generate ReStart */
  4019. hi2c->Instance->CR1 |= I2C_CR1_START;
  4020. }
  4021. /* Wait until SB flag is set */
  4022. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4023. {
  4024. return HAL_TIMEOUT;
  4025. }
  4026. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4027. {
  4028. /* Send slave address */
  4029. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4030. }
  4031. else
  4032. {
  4033. /* Send header of slave address */
  4034. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4035. /* Wait until ADD10 flag is set */
  4036. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4037. {
  4038. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4039. {
  4040. return HAL_ERROR;
  4041. }
  4042. else
  4043. {
  4044. return HAL_TIMEOUT;
  4045. }
  4046. }
  4047. /* Send slave address */
  4048. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4049. }
  4050. /* Wait until ADDR flag is set */
  4051. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4052. {
  4053. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4054. {
  4055. return HAL_ERROR;
  4056. }
  4057. else
  4058. {
  4059. return HAL_TIMEOUT;
  4060. }
  4061. }
  4062. return HAL_OK;
  4063. }
  4064. /**
  4065. * @brief Master sends target device address for read request.
  4066. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4067. * the configuration information for I2C module
  4068. * @param DevAddress Target device address: The device 7 bits address value
  4069. * in datasheet must be shift at right before call interface
  4070. * @param Timeout Timeout duration
  4071. * @param Tickstart Tick start value
  4072. * @retval HAL status
  4073. */
  4074. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4075. {
  4076. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4077. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4078. /* Enable Acknowledge */
  4079. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4080. /* Generate Start condition if first transfer */
  4081. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4082. {
  4083. /* Generate Start */
  4084. hi2c->Instance->CR1 |= I2C_CR1_START;
  4085. }
  4086. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  4087. {
  4088. /* Generate ReStart */
  4089. hi2c->Instance->CR1 |= I2C_CR1_START;
  4090. }
  4091. /* Wait until SB flag is set */
  4092. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4093. {
  4094. return HAL_TIMEOUT;
  4095. }
  4096. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4097. {
  4098. /* Send slave address */
  4099. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4100. }
  4101. else
  4102. {
  4103. /* Send header of slave address */
  4104. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4105. /* Wait until ADD10 flag is set */
  4106. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4107. {
  4108. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4109. {
  4110. return HAL_ERROR;
  4111. }
  4112. else
  4113. {
  4114. return HAL_TIMEOUT;
  4115. }
  4116. }
  4117. /* Send slave address */
  4118. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4119. /* Wait until ADDR flag is set */
  4120. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4121. {
  4122. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4123. {
  4124. return HAL_ERROR;
  4125. }
  4126. else
  4127. {
  4128. return HAL_TIMEOUT;
  4129. }
  4130. }
  4131. /* Clear ADDR flag */
  4132. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4133. /* Generate Restart */
  4134. hi2c->Instance->CR1 |= I2C_CR1_START;
  4135. /* Wait until SB flag is set */
  4136. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4137. {
  4138. return HAL_TIMEOUT;
  4139. }
  4140. /* Send header of slave address */
  4141. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  4142. }
  4143. /* Wait until ADDR flag is set */
  4144. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4145. {
  4146. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4147. {
  4148. return HAL_ERROR;
  4149. }
  4150. else
  4151. {
  4152. return HAL_TIMEOUT;
  4153. }
  4154. }
  4155. return HAL_OK;
  4156. }
  4157. /**
  4158. * @brief Master sends target device address followed by internal memory address for write request.
  4159. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4160. * the configuration information for I2C module
  4161. * @param DevAddress Target device address
  4162. * @param MemAddress Internal memory address
  4163. * @param MemAddSize Size of internal memory address
  4164. * @param Timeout Timeout duration
  4165. * @param Tickstart Tick start value
  4166. * @retval HAL status
  4167. */
  4168. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4169. {
  4170. /* Generate Start */
  4171. hi2c->Instance->CR1 |= I2C_CR1_START;
  4172. /* Wait until SB flag is set */
  4173. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4174. {
  4175. return HAL_TIMEOUT;
  4176. }
  4177. /* Send slave address */
  4178. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4179. /* Wait until ADDR flag is set */
  4180. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4181. {
  4182. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4183. {
  4184. return HAL_ERROR;
  4185. }
  4186. else
  4187. {
  4188. return HAL_TIMEOUT;
  4189. }
  4190. }
  4191. /* Clear ADDR flag */
  4192. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4193. /* Wait until TXE flag is set */
  4194. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4195. {
  4196. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4197. {
  4198. /* Generate Stop */
  4199. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4200. return HAL_ERROR;
  4201. }
  4202. else
  4203. {
  4204. return HAL_TIMEOUT;
  4205. }
  4206. }
  4207. /* If Memory address size is 8Bit */
  4208. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4209. {
  4210. /* Send Memory Address */
  4211. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4212. }
  4213. /* If Memory address size is 16Bit */
  4214. else
  4215. {
  4216. /* Send MSB of Memory Address */
  4217. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4218. /* Wait until TXE flag is set */
  4219. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4220. {
  4221. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4222. {
  4223. /* Generate Stop */
  4224. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4225. return HAL_ERROR;
  4226. }
  4227. else
  4228. {
  4229. return HAL_TIMEOUT;
  4230. }
  4231. }
  4232. /* Send LSB of Memory Address */
  4233. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4234. }
  4235. return HAL_OK;
  4236. }
  4237. /**
  4238. * @brief Master sends target device address followed by internal memory address for read request.
  4239. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4240. * the configuration information for I2C module
  4241. * @param DevAddress Target device address
  4242. * @param MemAddress Internal memory address
  4243. * @param MemAddSize Size of internal memory address
  4244. * @param Timeout Timeout duration
  4245. * @param Tickstart Tick start value
  4246. * @retval HAL status
  4247. */
  4248. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4249. {
  4250. /* Enable Acknowledge */
  4251. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4252. /* Generate Start */
  4253. hi2c->Instance->CR1 |= I2C_CR1_START;
  4254. /* Wait until SB flag is set */
  4255. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4256. {
  4257. return HAL_TIMEOUT;
  4258. }
  4259. /* Send slave address */
  4260. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4261. /* Wait until ADDR flag is set */
  4262. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4263. {
  4264. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4265. {
  4266. return HAL_ERROR;
  4267. }
  4268. else
  4269. {
  4270. return HAL_TIMEOUT;
  4271. }
  4272. }
  4273. /* Clear ADDR flag */
  4274. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4275. /* Wait until TXE flag is set */
  4276. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4277. {
  4278. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4279. {
  4280. /* Generate Stop */
  4281. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4282. return HAL_ERROR;
  4283. }
  4284. else
  4285. {
  4286. return HAL_TIMEOUT;
  4287. }
  4288. }
  4289. /* If Memory address size is 8Bit */
  4290. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4291. {
  4292. /* Send Memory Address */
  4293. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4294. }
  4295. /* If Memory address size is 16Bit */
  4296. else
  4297. {
  4298. /* Send MSB of Memory Address */
  4299. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4300. /* Wait until TXE flag is set */
  4301. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4302. {
  4303. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4304. {
  4305. /* Generate Stop */
  4306. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4307. return HAL_ERROR;
  4308. }
  4309. else
  4310. {
  4311. return HAL_TIMEOUT;
  4312. }
  4313. }
  4314. /* Send LSB of Memory Address */
  4315. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4316. }
  4317. /* Wait until TXE flag is set */
  4318. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4319. {
  4320. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4321. {
  4322. /* Generate Stop */
  4323. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4324. return HAL_ERROR;
  4325. }
  4326. else
  4327. {
  4328. return HAL_TIMEOUT;
  4329. }
  4330. }
  4331. /* Generate Restart */
  4332. hi2c->Instance->CR1 |= I2C_CR1_START;
  4333. /* Wait until SB flag is set */
  4334. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4335. {
  4336. return HAL_TIMEOUT;
  4337. }
  4338. /* Send slave address */
  4339. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4340. /* Wait until ADDR flag is set */
  4341. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4342. {
  4343. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4344. {
  4345. return HAL_ERROR;
  4346. }
  4347. else
  4348. {
  4349. return HAL_TIMEOUT;
  4350. }
  4351. }
  4352. return HAL_OK;
  4353. }
  4354. /**
  4355. * @brief DMA I2C process complete callback.
  4356. * @param hdma DMA handle
  4357. * @retval None
  4358. */
  4359. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  4360. {
  4361. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4362. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4363. uint32_t CurrentState = hi2c->State;
  4364. uint32_t CurrentMode = hi2c->Mode;
  4365. if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  4366. {
  4367. /* Disable DMA Request */
  4368. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4369. hi2c->XferCount = 0U;
  4370. /* Enable EVT and ERR interrupt */
  4371. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4372. }
  4373. else
  4374. {
  4375. /* Disable Acknowledge */
  4376. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4377. /* Generate Stop */
  4378. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4379. /* Disable Last DMA */
  4380. hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
  4381. /* Disable DMA Request */
  4382. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4383. hi2c->XferCount = 0U;
  4384. /* Check if Errors has been detected during transfer */
  4385. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4386. {
  4387. HAL_I2C_ErrorCallback(hi2c);
  4388. }
  4389. else
  4390. {
  4391. hi2c->State = HAL_I2C_STATE_READY;
  4392. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  4393. {
  4394. hi2c->Mode = HAL_I2C_MODE_NONE;
  4395. HAL_I2C_MemRxCpltCallback(hi2c);
  4396. }
  4397. else
  4398. {
  4399. hi2c->Mode = HAL_I2C_MODE_NONE;
  4400. HAL_I2C_MasterRxCpltCallback(hi2c);
  4401. }
  4402. }
  4403. }
  4404. }
  4405. /**
  4406. * @brief DMA I2C communication error callback.
  4407. * @param hdma DMA handle
  4408. * @retval None
  4409. */
  4410. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  4411. {
  4412. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4413. /* Ignore DMA FIFO error */
  4414. if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
  4415. {
  4416. /* Disable Acknowledge */
  4417. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4418. hi2c->XferCount = 0U;
  4419. hi2c->State = HAL_I2C_STATE_READY;
  4420. hi2c->Mode = HAL_I2C_MODE_NONE;
  4421. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4422. HAL_I2C_ErrorCallback(hi2c);
  4423. }
  4424. }
  4425. /**
  4426. * @brief DMA I2C communication abort callback
  4427. * (To be called at end of DMA Abort procedure).
  4428. * @param hdma: DMA handle.
  4429. * @retval None
  4430. */
  4431. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  4432. {
  4433. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4434. /* Disable Acknowledge */
  4435. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4436. hi2c->XferCount = 0U;
  4437. /* Reset XferAbortCallback */
  4438. hi2c->hdmatx->XferAbortCallback = NULL;
  4439. hi2c->hdmarx->XferAbortCallback = NULL;
  4440. /* Check if come from abort from user */
  4441. if(hi2c->State == HAL_I2C_STATE_ABORT)
  4442. {
  4443. hi2c->State = HAL_I2C_STATE_READY;
  4444. hi2c->Mode = HAL_I2C_MODE_NONE;
  4445. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4446. /* Disable I2C peripheral to prevent dummy data in buffer */
  4447. __HAL_I2C_DISABLE(hi2c);
  4448. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4449. HAL_I2C_AbortCpltCallback(hi2c);
  4450. }
  4451. else
  4452. {
  4453. hi2c->State = HAL_I2C_STATE_READY;
  4454. hi2c->Mode = HAL_I2C_MODE_NONE;
  4455. /* Disable I2C peripheral to prevent dummy data in buffer */
  4456. __HAL_I2C_DISABLE(hi2c);
  4457. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4458. HAL_I2C_ErrorCallback(hi2c);
  4459. }
  4460. }
  4461. /**
  4462. * @brief This function handles I2C Communication Timeout.
  4463. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4464. * the configuration information for I2C module
  4465. * @param Flag specifies the I2C flag to check.
  4466. * @param Status The new Flag status (SET or RESET).
  4467. * @param Timeout Timeout duration
  4468. * @param Tickstart Tick start value
  4469. * @retval HAL status
  4470. */
  4471. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4472. {
  4473. /* Wait until flag is set */
  4474. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  4475. {
  4476. /* Check for the Timeout */
  4477. if(Timeout != HAL_MAX_DELAY)
  4478. {
  4479. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4480. {
  4481. hi2c->PreviousState = I2C_STATE_NONE;
  4482. hi2c->State= HAL_I2C_STATE_READY;
  4483. hi2c->Mode = HAL_I2C_MODE_NONE;
  4484. /* Process Unlocked */
  4485. __HAL_UNLOCK(hi2c);
  4486. return HAL_TIMEOUT;
  4487. }
  4488. }
  4489. }
  4490. return HAL_OK;
  4491. }
  4492. /**
  4493. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4494. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4495. * the configuration information for I2C module
  4496. * @param Flag specifies the I2C flag to check.
  4497. * @param Timeout Timeout duration
  4498. * @param Tickstart Tick start value
  4499. * @retval HAL status
  4500. */
  4501. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4502. {
  4503. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4504. {
  4505. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4506. {
  4507. /* Generate Stop */
  4508. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4509. /* Clear AF Flag */
  4510. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4511. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4512. hi2c->PreviousState = I2C_STATE_NONE;
  4513. hi2c->State= HAL_I2C_STATE_READY;
  4514. /* Process Unlocked */
  4515. __HAL_UNLOCK(hi2c);
  4516. return HAL_ERROR;
  4517. }
  4518. /* Check for the Timeout */
  4519. if(Timeout != HAL_MAX_DELAY)
  4520. {
  4521. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4522. {
  4523. hi2c->PreviousState = I2C_STATE_NONE;
  4524. hi2c->State= HAL_I2C_STATE_READY;
  4525. /* Process Unlocked */
  4526. __HAL_UNLOCK(hi2c);
  4527. return HAL_TIMEOUT;
  4528. }
  4529. }
  4530. }
  4531. return HAL_OK;
  4532. }
  4533. /**
  4534. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4535. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4536. * the configuration information for the specified I2C.
  4537. * @param Timeout Timeout duration
  4538. * @param Tickstart Tick start value
  4539. * @retval HAL status
  4540. */
  4541. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4542. {
  4543. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4544. {
  4545. /* Check if a NACK is detected */
  4546. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4547. {
  4548. return HAL_ERROR;
  4549. }
  4550. /* Check for the Timeout */
  4551. if(Timeout != HAL_MAX_DELAY)
  4552. {
  4553. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4554. {
  4555. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4556. hi2c->PreviousState = I2C_STATE_NONE;
  4557. hi2c->State= HAL_I2C_STATE_READY;
  4558. /* Process Unlocked */
  4559. __HAL_UNLOCK(hi2c);
  4560. return HAL_TIMEOUT;
  4561. }
  4562. }
  4563. }
  4564. return HAL_OK;
  4565. }
  4566. /**
  4567. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4568. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4569. * the configuration information for the specified I2C.
  4570. * @param Timeout Timeout duration
  4571. * @param Tickstart Tick start value
  4572. * @retval HAL status
  4573. */
  4574. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4575. {
  4576. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4577. {
  4578. /* Check if a NACK is detected */
  4579. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4580. {
  4581. return HAL_ERROR;
  4582. }
  4583. /* Check for the Timeout */
  4584. if(Timeout != HAL_MAX_DELAY)
  4585. {
  4586. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4587. {
  4588. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4589. hi2c->PreviousState = I2C_STATE_NONE;
  4590. hi2c->State= HAL_I2C_STATE_READY;
  4591. /* Process Unlocked */
  4592. __HAL_UNLOCK(hi2c);
  4593. return HAL_TIMEOUT;
  4594. }
  4595. }
  4596. }
  4597. return HAL_OK;
  4598. }
  4599. /**
  4600. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4601. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4602. * the configuration information for the specified I2C.
  4603. * @param Timeout Timeout duration
  4604. * @param Tickstart Tick start value
  4605. * @retval HAL status
  4606. */
  4607. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4608. {
  4609. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4610. {
  4611. /* Check if a NACK is detected */
  4612. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4613. {
  4614. return HAL_ERROR;
  4615. }
  4616. /* Check for the Timeout */
  4617. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4618. {
  4619. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4620. hi2c->PreviousState = I2C_STATE_NONE;
  4621. hi2c->State= HAL_I2C_STATE_READY;
  4622. /* Process Unlocked */
  4623. __HAL_UNLOCK(hi2c);
  4624. return HAL_TIMEOUT;
  4625. }
  4626. }
  4627. return HAL_OK;
  4628. }
  4629. /**
  4630. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4631. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4632. * the configuration information for the specified I2C.
  4633. * @param Timeout Timeout duration
  4634. * @param Tickstart Tick start value
  4635. * @retval HAL status
  4636. */
  4637. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4638. {
  4639. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4640. {
  4641. /* Check if a STOPF is detected */
  4642. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4643. {
  4644. /* Clear STOP Flag */
  4645. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4646. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4647. hi2c->PreviousState = I2C_STATE_NONE;
  4648. hi2c->State= HAL_I2C_STATE_READY;
  4649. /* Process Unlocked */
  4650. __HAL_UNLOCK(hi2c);
  4651. return HAL_ERROR;
  4652. }
  4653. /* Check for the Timeout */
  4654. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4655. {
  4656. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4657. hi2c->State= HAL_I2C_STATE_READY;
  4658. /* Process Unlocked */
  4659. __HAL_UNLOCK(hi2c);
  4660. return HAL_TIMEOUT;
  4661. }
  4662. }
  4663. return HAL_OK;
  4664. }
  4665. /**
  4666. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4667. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4668. * the configuration information for the specified I2C.
  4669. * @retval HAL status
  4670. */
  4671. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4672. {
  4673. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4674. {
  4675. /* Clear NACKF Flag */
  4676. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4677. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4678. hi2c->PreviousState = I2C_STATE_NONE;
  4679. hi2c->State= HAL_I2C_STATE_READY;
  4680. /* Process Unlocked */
  4681. __HAL_UNLOCK(hi2c);
  4682. return HAL_ERROR;
  4683. }
  4684. return HAL_OK;
  4685. }
  4686. /**
  4687. * @}
  4688. */
  4689. #endif /* HAL_I2C_MODULE_ENABLED */
  4690. /**
  4691. * @}
  4692. */
  4693. /**
  4694. * @}
  4695. */
  4696. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/