stm32f4xx_hal_i2c.c 164 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @brief I2C HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State, Mode and Error functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### How to use this driver #####
  15. ==============================================================================
  16. [..]
  17. The I2C HAL driver can be used as follows:
  18. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  19. I2C_HandleTypeDef hi2c;
  20. (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
  21. (##) Enable the I2Cx interface clock
  22. (##) I2C pins configuration
  23. (+++) Enable the clock for the I2C GPIOs
  24. (+++) Configure I2C pins as alternate function open-drain
  25. (##) NVIC configuration if you need to use interrupt process
  26. (+++) Configure the I2Cx interrupt priority
  27. (+++) Enable the NVIC I2C IRQ Channel
  28. (##) DMA Configuration if you need to use DMA process
  29. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
  30. (+++) Enable the DMAx interface clock using
  31. (+++) Configure the DMA handle parameters
  32. (+++) Configure the DMA Tx or Rx Stream
  33. (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  34. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  35. the DMA Tx or Rx Stream
  36. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  37. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  38. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  39. (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
  40. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  41. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  42. *** Polling mode IO operation ***
  43. =================================
  44. [..]
  45. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  46. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  47. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  48. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  49. *** Polling mode IO MEM operation ***
  50. =====================================
  51. [..]
  52. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  53. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  54. *** Interrupt mode IO operation ***
  55. ===================================
  56. [..]
  57. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  58. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  59. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  60. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  61. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  62. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  63. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  64. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  66. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  67. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  68. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  69. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  70. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  71. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  72. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  73. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  74. *** Interrupt mode IO sequential operation ***
  75. ==============================================
  76. [..]
  77. (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  78. when a direction change during transfer
  79. [..]
  80. (+) A specific option field manage the different steps of a sequential transfer
  81. (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
  82. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  83. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  84. and data to transfer without a final stop condition
  85. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  86. and with new data to transfer if the direction change or manage only the new data to transfer
  87. if no direction change and without a final stop condition in both cases
  88. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  89. and with new data to transfer if the direction change or manage only the new data to transfer
  90. if no direction change and with a final stop condition in both cases
  91. (+) Differents sequential I2C interfaces are listed below:
  92. (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
  93. (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
  94. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
  95. (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
  96. (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
  97. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
  98. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  99. (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  100. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  101. (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
  102. (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
  103. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  104. (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
  105. add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
  106. (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
  107. (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
  108. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
  109. (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
  110. (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
  111. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
  112. (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  113. add his own code by customization of function pointer HAL_I2C_ErrorCallback()
  114. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  115. (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  116. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  117. *** Interrupt mode IO MEM operation ***
  118. =======================================
  119. [..]
  120. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  121. HAL_I2C_Mem_Write_IT()
  122. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  123. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  124. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  125. HAL_I2C_Mem_Read_IT()
  126. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  127. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  128. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  129. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  130. *** DMA mode IO operation ***
  131. ==============================
  132. [..]
  133. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  134. HAL_I2C_Master_Transmit_DMA()
  135. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  136. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  137. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  138. HAL_I2C_Master_Receive_DMA()
  139. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  140. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  141. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  142. HAL_I2C_Slave_Transmit_DMA()
  143. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  144. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  145. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  146. HAL_I2C_Slave_Receive_DMA()
  147. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  148. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  149. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  150. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  151. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  152. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  153. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  154. *** DMA mode IO MEM operation ***
  155. =================================
  156. [..]
  157. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  158. HAL_I2C_Mem_Write_DMA()
  159. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  160. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  161. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  162. HAL_I2C_Mem_Read_DMA()
  163. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  164. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  165. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  166. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  167. *** I2C HAL driver macros list ***
  168. ==================================
  169. [..]
  170. Below the list of most used macros in I2C HAL driver.
  171. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  172. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  173. (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
  174. (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
  175. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  176. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  177. [..]
  178. (@) You can refer to the I2C HAL driver header file for more useful macros
  179. @endverbatim
  180. ******************************************************************************
  181. * @attention
  182. *
  183. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  184. *
  185. * Redistribution and use in source and binary forms, with or without modification,
  186. * are permitted provided that the following conditions are met:
  187. * 1. Redistributions of source code must retain the above copyright notice,
  188. * this list of conditions and the following disclaimer.
  189. * 2. Redistributions in binary form must reproduce the above copyright notice,
  190. * this list of conditions and the following disclaimer in the documentation
  191. * and/or other materials provided with the distribution.
  192. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  193. * may be used to endorse or promote products derived from this software
  194. * without specific prior written permission.
  195. *
  196. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  197. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  198. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  199. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  200. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  201. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  202. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  203. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  204. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  205. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  206. *
  207. ******************************************************************************
  208. */
  209. /* Includes ------------------------------------------------------------------*/
  210. #include "stm32f4xx_hal.h"
  211. /** @addtogroup STM32F4xx_HAL_Driver
  212. * @{
  213. */
  214. /** @defgroup I2C I2C
  215. * @brief I2C HAL module driver
  216. * @{
  217. */
  218. #ifdef HAL_I2C_MODULE_ENABLED
  219. /* Private typedef -----------------------------------------------------------*/
  220. /* Private define ------------------------------------------------------------*/
  221. /** @addtogroup I2C_Private_Define
  222. * @{
  223. */
  224. #define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
  225. #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
  226. #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
  227. /* Private define for @ref PreviousState usage */
  228. #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
  229. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  230. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  231. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  232. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  233. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  234. /**
  235. * @}
  236. */
  237. /* Private macro -------------------------------------------------------------*/
  238. /* Private variables ---------------------------------------------------------*/
  239. /* Private function prototypes -----------------------------------------------*/
  240. /** @addtogroup I2C_Private_Functions
  241. * @{
  242. */
  243. /* Private functions to handle DMA transfer */
  244. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  245. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  246. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  247. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  248. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  249. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  250. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  251. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  252. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  253. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  254. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  255. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  256. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  257. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  258. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  259. /* Private functions for I2C transfer IRQ handler */
  260. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  261. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  262. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  263. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  264. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  265. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  266. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  267. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  268. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  269. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  270. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  271. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  272. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  273. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  274. /**
  275. * @}
  276. */
  277. /* Exported functions --------------------------------------------------------*/
  278. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  279. * @{
  280. */
  281. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  282. * @brief Initialization and Configuration functions
  283. *
  284. @verbatim
  285. ===============================================================================
  286. ##### Initialization and de-initialization functions #####
  287. ===============================================================================
  288. [..] This subsection provides a set of functions allowing to initialize and
  289. de-initialize the I2Cx peripheral:
  290. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  291. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  292. (+) Call the function HAL_I2C_Init() to configure the selected device with
  293. the selected configuration:
  294. (++) Communication Speed
  295. (++) Duty cycle
  296. (++) Addressing mode
  297. (++) Own Address 1
  298. (++) Dual Addressing mode
  299. (++) Own Address 2
  300. (++) General call mode
  301. (++) Nostretch mode
  302. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  303. of the selected I2Cx peripheral.
  304. @endverbatim
  305. * @{
  306. */
  307. /**
  308. * @brief Initializes the I2C according to the specified parameters
  309. * in the I2C_InitTypeDef and create the associated handle.
  310. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  311. * the configuration information for I2C module
  312. * @retval HAL status
  313. */
  314. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  315. {
  316. uint32_t freqrange = 0U;
  317. uint32_t pclk1 = 0U;
  318. /* Check the I2C handle allocation */
  319. if(hi2c == NULL)
  320. {
  321. return HAL_ERROR;
  322. }
  323. /* Check the parameters */
  324. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  325. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  326. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  327. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  328. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  329. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  330. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  331. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  332. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  333. if(hi2c->State == HAL_I2C_STATE_RESET)
  334. {
  335. /* Allocate lock resource and initialize it */
  336. hi2c->Lock = HAL_UNLOCKED;
  337. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  338. HAL_I2C_MspInit(hi2c);
  339. }
  340. hi2c->State = HAL_I2C_STATE_BUSY;
  341. /* Disable the selected I2C peripheral */
  342. __HAL_I2C_DISABLE(hi2c);
  343. /* Get PCLK1 frequency */
  344. pclk1 = HAL_RCC_GetPCLK1Freq();
  345. /* Calculate frequency range */
  346. freqrange = I2C_FREQRANGE(pclk1);
  347. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  348. /* Configure I2Cx: Frequency range */
  349. hi2c->Instance->CR2 = freqrange;
  350. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  351. /* Configure I2Cx: Rise Time */
  352. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  353. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  354. /* Configure I2Cx: Speed */
  355. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  356. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  357. /* Configure I2Cx: Generalcall and NoStretch mode */
  358. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  359. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  360. /* Configure I2Cx: Own Address1 and addressing mode */
  361. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  362. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  363. /* Configure I2Cx: Dual mode and Own Address2 */
  364. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  365. /* Enable the selected I2C peripheral */
  366. __HAL_I2C_ENABLE(hi2c);
  367. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  368. hi2c->State = HAL_I2C_STATE_READY;
  369. hi2c->PreviousState = I2C_STATE_NONE;
  370. hi2c->Mode = HAL_I2C_MODE_NONE;
  371. return HAL_OK;
  372. }
  373. /**
  374. * @brief DeInitializes the I2C peripheral.
  375. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  376. * the configuration information for I2C module
  377. * @retval HAL status
  378. */
  379. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  380. {
  381. /* Check the I2C handle allocation */
  382. if(hi2c == NULL)
  383. {
  384. return HAL_ERROR;
  385. }
  386. /* Check the parameters */
  387. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  388. hi2c->State = HAL_I2C_STATE_BUSY;
  389. /* Disable the I2C Peripheral Clock */
  390. __HAL_I2C_DISABLE(hi2c);
  391. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  392. HAL_I2C_MspDeInit(hi2c);
  393. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  394. hi2c->State = HAL_I2C_STATE_RESET;
  395. hi2c->PreviousState = I2C_STATE_NONE;
  396. hi2c->Mode = HAL_I2C_MODE_NONE;
  397. /* Release Lock */
  398. __HAL_UNLOCK(hi2c);
  399. return HAL_OK;
  400. }
  401. /**
  402. * @brief I2C MSP Init.
  403. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  404. * the configuration information for I2C module
  405. * @retval None
  406. */
  407. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  408. {
  409. /* Prevent unused argument(s) compilation warning */
  410. UNUSED(hi2c);
  411. /* NOTE : This function Should not be modified, when the callback is needed,
  412. the HAL_I2C_MspInit could be implemented in the user file
  413. */
  414. }
  415. /**
  416. * @brief I2C MSP DeInit
  417. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  418. * the configuration information for I2C module
  419. * @retval None
  420. */
  421. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  422. {
  423. /* Prevent unused argument(s) compilation warning */
  424. UNUSED(hi2c);
  425. /* NOTE : This function Should not be modified, when the callback is needed,
  426. the HAL_I2C_MspDeInit could be implemented in the user file
  427. */
  428. }
  429. /**
  430. * @}
  431. */
  432. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  433. * @brief Data transfers functions
  434. *
  435. @verbatim
  436. ===============================================================================
  437. ##### IO operation functions #####
  438. ===============================================================================
  439. [..]
  440. This subsection provides a set of functions allowing to manage the I2C data
  441. transfers.
  442. (#) There are two modes of transfer:
  443. (++) Blocking mode : The communication is performed in the polling mode.
  444. The status of all data processing is returned by the same function
  445. after finishing transfer.
  446. (++) No-Blocking mode : The communication is performed using Interrupts
  447. or DMA. These functions return the status of the transfer startup.
  448. The end of the data processing will be indicated through the
  449. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  450. using DMA mode.
  451. (#) Blocking mode functions are :
  452. (++) HAL_I2C_Master_Transmit()
  453. (++) HAL_I2C_Master_Receive()
  454. (++) HAL_I2C_Slave_Transmit()
  455. (++) HAL_I2C_Slave_Receive()
  456. (++) HAL_I2C_Mem_Write()
  457. (++) HAL_I2C_Mem_Read()
  458. (++) HAL_I2C_IsDeviceReady()
  459. (#) No-Blocking mode functions with Interrupt are :
  460. (++) HAL_I2C_Master_Transmit_IT()
  461. (++) HAL_I2C_Master_Receive_IT()
  462. (++) HAL_I2C_Slave_Transmit_IT()
  463. (++) HAL_I2C_Slave_Receive_IT()
  464. (++) HAL_I2C_Master_Sequential_Transmit_IT()
  465. (++) HAL_I2C_Master_Sequential_Receive_IT()
  466. (++) HAL_I2C_Slave_Sequential_Transmit_IT()
  467. (++) HAL_I2C_Slave_Sequential_Receive_IT()
  468. (++) HAL_I2C_Mem_Write_IT()
  469. (++) HAL_I2C_Mem_Read_IT()
  470. (#) No-Blocking mode functions with DMA are :
  471. (++) HAL_I2C_Master_Transmit_DMA()
  472. (++) HAL_I2C_Master_Receive_DMA()
  473. (++) HAL_I2C_Slave_Transmit_DMA()
  474. (++) HAL_I2C_Slave_Receive_DMA()
  475. (++) HAL_I2C_Mem_Write_DMA()
  476. (++) HAL_I2C_Mem_Read_DMA()
  477. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  478. (++) HAL_I2C_MemTxCpltCallback()
  479. (++) HAL_I2C_MemRxCpltCallback()
  480. (++) HAL_I2C_MasterTxCpltCallback()
  481. (++) HAL_I2C_MasterRxCpltCallback()
  482. (++) HAL_I2C_SlaveTxCpltCallback()
  483. (++) HAL_I2C_SlaveRxCpltCallback()
  484. (++) HAL_I2C_ErrorCallback()
  485. (++) HAL_I2C_AbortCpltCallback()
  486. @endverbatim
  487. * @{
  488. */
  489. /**
  490. * @brief Transmits in master mode an amount of data in blocking mode.
  491. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  492. * the configuration information for the specified I2C.
  493. * @param DevAddress Target device address The device 7 bits address value
  494. * in datasheet must be shifted to the left before calling the interface
  495. * @param pData Pointer to data buffer
  496. * @param Size Amount of data to be sent
  497. * @param Timeout Timeout duration
  498. * @retval HAL status
  499. */
  500. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  501. {
  502. uint32_t tickstart = 0x00U;
  503. /* Init tickstart for timeout management*/
  504. tickstart = HAL_GetTick();
  505. if(hi2c->State == HAL_I2C_STATE_READY)
  506. {
  507. /* Wait until BUSY flag is reset */
  508. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  509. {
  510. return HAL_BUSY;
  511. }
  512. /* Process Locked */
  513. __HAL_LOCK(hi2c);
  514. /* Check if the I2C is already enabled */
  515. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  516. {
  517. /* Enable I2C peripheral */
  518. __HAL_I2C_ENABLE(hi2c);
  519. }
  520. /* Disable Pos */
  521. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  522. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  523. hi2c->Mode = HAL_I2C_MODE_MASTER;
  524. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  525. /* Prepare transfer parameters */
  526. hi2c->pBuffPtr = pData;
  527. hi2c->XferCount = Size;
  528. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  529. hi2c->XferSize = hi2c->XferCount;
  530. /* Send Slave Address */
  531. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  532. {
  533. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  534. {
  535. /* Process Unlocked */
  536. __HAL_UNLOCK(hi2c);
  537. return HAL_ERROR;
  538. }
  539. else
  540. {
  541. /* Process Unlocked */
  542. __HAL_UNLOCK(hi2c);
  543. return HAL_TIMEOUT;
  544. }
  545. }
  546. /* Clear ADDR flag */
  547. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  548. while(hi2c->XferSize > 0U)
  549. {
  550. /* Wait until TXE flag is set */
  551. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  552. {
  553. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  554. {
  555. /* Generate Stop */
  556. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  557. return HAL_ERROR;
  558. }
  559. else
  560. {
  561. return HAL_TIMEOUT;
  562. }
  563. }
  564. /* Write data to DR */
  565. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  566. hi2c->XferCount--;
  567. hi2c->XferSize--;
  568. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  569. {
  570. /* Write data to DR */
  571. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  572. hi2c->XferCount--;
  573. hi2c->XferSize--;
  574. }
  575. /* Wait until BTF flag is set */
  576. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  577. {
  578. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  579. {
  580. /* Generate Stop */
  581. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  582. return HAL_ERROR;
  583. }
  584. else
  585. {
  586. return HAL_TIMEOUT;
  587. }
  588. }
  589. }
  590. /* Generate Stop */
  591. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  592. hi2c->State = HAL_I2C_STATE_READY;
  593. hi2c->Mode = HAL_I2C_MODE_NONE;
  594. /* Process Unlocked */
  595. __HAL_UNLOCK(hi2c);
  596. return HAL_OK;
  597. }
  598. else
  599. {
  600. return HAL_BUSY;
  601. }
  602. }
  603. /**
  604. * @brief Receives in master mode an amount of data in blocking mode.
  605. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  606. * the configuration information for the specified I2C.
  607. * @param DevAddress Target device address The device 7 bits address value
  608. * in datasheet must be shifted to the left before calling the interface
  609. * @param pData Pointer to data buffer
  610. * @param Size Amount of data to be sent
  611. * @param Timeout Timeout duration
  612. * @retval HAL status
  613. */
  614. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  615. {
  616. uint32_t tickstart = 0x00U;
  617. /* Init tickstart for timeout management*/
  618. tickstart = HAL_GetTick();
  619. if(hi2c->State == HAL_I2C_STATE_READY)
  620. {
  621. /* Wait until BUSY flag is reset */
  622. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  623. {
  624. return HAL_BUSY;
  625. }
  626. /* Process Locked */
  627. __HAL_LOCK(hi2c);
  628. /* Check if the I2C is already enabled */
  629. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  630. {
  631. /* Enable I2C peripheral */
  632. __HAL_I2C_ENABLE(hi2c);
  633. }
  634. /* Disable Pos */
  635. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  636. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  637. hi2c->Mode = HAL_I2C_MODE_MASTER;
  638. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  639. /* Prepare transfer parameters */
  640. hi2c->pBuffPtr = pData;
  641. hi2c->XferCount = Size;
  642. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  643. hi2c->XferSize = hi2c->XferCount;
  644. /* Send Slave Address */
  645. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  646. {
  647. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  648. {
  649. /* Process Unlocked */
  650. __HAL_UNLOCK(hi2c);
  651. return HAL_ERROR;
  652. }
  653. else
  654. {
  655. /* Process Unlocked */
  656. __HAL_UNLOCK(hi2c);
  657. return HAL_TIMEOUT;
  658. }
  659. }
  660. if(hi2c->XferSize == 0U)
  661. {
  662. /* Clear ADDR flag */
  663. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  664. /* Generate Stop */
  665. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  666. }
  667. else if(hi2c->XferSize == 1U)
  668. {
  669. /* Disable Acknowledge */
  670. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  671. /* Clear ADDR flag */
  672. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  673. /* Generate Stop */
  674. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  675. }
  676. else if(hi2c->XferSize == 2U)
  677. {
  678. /* Disable Acknowledge */
  679. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  680. /* Enable Pos */
  681. hi2c->Instance->CR1 |= I2C_CR1_POS;
  682. /* Clear ADDR flag */
  683. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  684. }
  685. else
  686. {
  687. /* Enable Acknowledge */
  688. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  689. /* Clear ADDR flag */
  690. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  691. }
  692. while(hi2c->XferSize > 0U)
  693. {
  694. if(hi2c->XferSize <= 3U)
  695. {
  696. /* One byte */
  697. if(hi2c->XferSize == 1U)
  698. {
  699. /* Wait until RXNE flag is set */
  700. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  701. {
  702. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  703. {
  704. return HAL_TIMEOUT;
  705. }
  706. else
  707. {
  708. return HAL_ERROR;
  709. }
  710. }
  711. /* Read data from DR */
  712. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  713. hi2c->XferSize--;
  714. hi2c->XferCount--;
  715. }
  716. /* Two bytes */
  717. else if(hi2c->XferSize == 2U)
  718. {
  719. /* Wait until BTF flag is set */
  720. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  721. {
  722. return HAL_TIMEOUT;
  723. }
  724. /* Generate Stop */
  725. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  726. /* Read data from DR */
  727. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  728. hi2c->XferSize--;
  729. hi2c->XferCount--;
  730. /* Read data from DR */
  731. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  732. hi2c->XferSize--;
  733. hi2c->XferCount--;
  734. }
  735. /* 3 Last bytes */
  736. else
  737. {
  738. /* Wait until BTF flag is set */
  739. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  740. {
  741. return HAL_TIMEOUT;
  742. }
  743. /* Disable Acknowledge */
  744. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  745. /* Read data from DR */
  746. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  747. hi2c->XferSize--;
  748. hi2c->XferCount--;
  749. /* Wait until BTF flag is set */
  750. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  751. {
  752. return HAL_TIMEOUT;
  753. }
  754. /* Generate Stop */
  755. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  756. /* Read data from DR */
  757. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  758. hi2c->XferSize--;
  759. hi2c->XferCount--;
  760. /* Read data from DR */
  761. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  762. hi2c->XferSize--;
  763. hi2c->XferCount--;
  764. }
  765. }
  766. else
  767. {
  768. /* Wait until RXNE flag is set */
  769. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  770. {
  771. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  772. {
  773. return HAL_TIMEOUT;
  774. }
  775. else
  776. {
  777. return HAL_ERROR;
  778. }
  779. }
  780. /* Read data from DR */
  781. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  782. hi2c->XferSize--;
  783. hi2c->XferCount--;
  784. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  785. {
  786. /* Read data from DR */
  787. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  788. hi2c->XferSize--;
  789. hi2c->XferCount--;
  790. }
  791. }
  792. }
  793. hi2c->State = HAL_I2C_STATE_READY;
  794. hi2c->Mode = HAL_I2C_MODE_NONE;
  795. /* Process Unlocked */
  796. __HAL_UNLOCK(hi2c);
  797. return HAL_OK;
  798. }
  799. else
  800. {
  801. return HAL_BUSY;
  802. }
  803. }
  804. /**
  805. * @brief Transmits in slave mode an amount of data in blocking mode.
  806. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  807. * the configuration information for the specified I2C.
  808. * @param pData Pointer to data buffer
  809. * @param Size Amount of data to be sent
  810. * @param Timeout Timeout duration
  811. * @retval HAL status
  812. */
  813. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  814. {
  815. uint32_t tickstart = 0x00U;
  816. /* Init tickstart for timeout management*/
  817. tickstart = HAL_GetTick();
  818. if(hi2c->State == HAL_I2C_STATE_READY)
  819. {
  820. if((pData == NULL) || (Size == 0U))
  821. {
  822. return HAL_ERROR;
  823. }
  824. /* Process Locked */
  825. __HAL_LOCK(hi2c);
  826. /* Check if the I2C is already enabled */
  827. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  828. {
  829. /* Enable I2C peripheral */
  830. __HAL_I2C_ENABLE(hi2c);
  831. }
  832. /* Disable Pos */
  833. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  834. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  835. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  836. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  837. /* Prepare transfer parameters */
  838. hi2c->pBuffPtr = pData;
  839. hi2c->XferCount = Size;
  840. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  841. hi2c->XferSize = hi2c->XferCount;
  842. /* Enable Address Acknowledge */
  843. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  844. /* Wait until ADDR flag is set */
  845. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  846. {
  847. return HAL_TIMEOUT;
  848. }
  849. /* Clear ADDR flag */
  850. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  851. /* If 10bit addressing mode is selected */
  852. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  853. {
  854. /* Wait until ADDR flag is set */
  855. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  856. {
  857. return HAL_TIMEOUT;
  858. }
  859. /* Clear ADDR flag */
  860. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  861. }
  862. while(hi2c->XferSize > 0U)
  863. {
  864. /* Wait until TXE flag is set */
  865. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  866. {
  867. /* Disable Address Acknowledge */
  868. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  869. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  870. {
  871. return HAL_ERROR;
  872. }
  873. else
  874. {
  875. return HAL_TIMEOUT;
  876. }
  877. }
  878. /* Write data to DR */
  879. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  880. hi2c->XferCount--;
  881. hi2c->XferSize--;
  882. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  883. {
  884. /* Write data to DR */
  885. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  886. hi2c->XferCount--;
  887. hi2c->XferSize--;
  888. }
  889. }
  890. /* Wait until AF flag is set */
  891. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  892. {
  893. return HAL_TIMEOUT;
  894. }
  895. /* Clear AF flag */
  896. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  897. /* Disable Address Acknowledge */
  898. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  899. hi2c->State = HAL_I2C_STATE_READY;
  900. hi2c->Mode = HAL_I2C_MODE_NONE;
  901. /* Process Unlocked */
  902. __HAL_UNLOCK(hi2c);
  903. return HAL_OK;
  904. }
  905. else
  906. {
  907. return HAL_BUSY;
  908. }
  909. }
  910. /**
  911. * @brief Receive in slave mode an amount of data in blocking mode
  912. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  913. * the configuration information for the specified I2C.
  914. * @param pData Pointer to data buffer
  915. * @param Size Amount of data to be sent
  916. * @param Timeout Timeout duration
  917. * @retval HAL status
  918. */
  919. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  920. {
  921. uint32_t tickstart = 0x00U;
  922. /* Init tickstart for timeout management*/
  923. tickstart = HAL_GetTick();
  924. if(hi2c->State == HAL_I2C_STATE_READY)
  925. {
  926. if((pData == NULL) || (Size == 0))
  927. {
  928. return HAL_ERROR;
  929. }
  930. /* Process Locked */
  931. __HAL_LOCK(hi2c);
  932. /* Check if the I2C is already enabled */
  933. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  934. {
  935. /* Enable I2C peripheral */
  936. __HAL_I2C_ENABLE(hi2c);
  937. }
  938. /* Disable Pos */
  939. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  940. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  941. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  942. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  943. /* Prepare transfer parameters */
  944. hi2c->pBuffPtr = pData;
  945. hi2c->XferCount = Size;
  946. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  947. hi2c->XferSize = hi2c->XferCount;
  948. /* Enable Address Acknowledge */
  949. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  950. /* Wait until ADDR flag is set */
  951. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  952. {
  953. return HAL_TIMEOUT;
  954. }
  955. /* Clear ADDR flag */
  956. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  957. while(hi2c->XferSize > 0U)
  958. {
  959. /* Wait until RXNE flag is set */
  960. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  961. {
  962. /* Disable Address Acknowledge */
  963. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  964. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  965. {
  966. return HAL_TIMEOUT;
  967. }
  968. else
  969. {
  970. return HAL_ERROR;
  971. }
  972. }
  973. /* Read data from DR */
  974. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  975. hi2c->XferSize--;
  976. hi2c->XferCount--;
  977. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  978. {
  979. /* Read data from DR */
  980. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  981. hi2c->XferSize--;
  982. hi2c->XferCount--;
  983. }
  984. }
  985. /* Wait until STOP flag is set */
  986. if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  987. {
  988. /* Disable Address Acknowledge */
  989. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  990. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  991. {
  992. return HAL_ERROR;
  993. }
  994. else
  995. {
  996. return HAL_TIMEOUT;
  997. }
  998. }
  999. /* Clear STOP flag */
  1000. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1001. /* Disable Address Acknowledge */
  1002. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1003. hi2c->State = HAL_I2C_STATE_READY;
  1004. hi2c->Mode = HAL_I2C_MODE_NONE;
  1005. /* Process Unlocked */
  1006. __HAL_UNLOCK(hi2c);
  1007. return HAL_OK;
  1008. }
  1009. else
  1010. {
  1011. return HAL_BUSY;
  1012. }
  1013. }
  1014. /**
  1015. * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1016. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1017. * the configuration information for the specified I2C.
  1018. * @param DevAddress Target device address The device 7 bits address value
  1019. * in datasheet must be shifted to the left before calling the interface
  1020. * @param pData Pointer to data buffer
  1021. * @param Size Amount of data to be sent
  1022. * @retval HAL status
  1023. */
  1024. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1025. {
  1026. __IO uint32_t count = 0U;
  1027. if(hi2c->State == HAL_I2C_STATE_READY)
  1028. {
  1029. /* Wait until BUSY flag is reset */
  1030. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1031. do
  1032. {
  1033. if(count-- == 0U)
  1034. {
  1035. hi2c->PreviousState = I2C_STATE_NONE;
  1036. hi2c->State= HAL_I2C_STATE_READY;
  1037. /* Process Unlocked */
  1038. __HAL_UNLOCK(hi2c);
  1039. return HAL_TIMEOUT;
  1040. }
  1041. }
  1042. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1043. /* Process Locked */
  1044. __HAL_LOCK(hi2c);
  1045. /* Check if the I2C is already enabled */
  1046. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1047. {
  1048. /* Enable I2C peripheral */
  1049. __HAL_I2C_ENABLE(hi2c);
  1050. }
  1051. /* Disable Pos */
  1052. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1053. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1054. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1055. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1056. /* Prepare transfer parameters */
  1057. hi2c->pBuffPtr = pData;
  1058. hi2c->XferCount = Size;
  1059. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1060. hi2c->XferSize = hi2c->XferCount;
  1061. hi2c->Devaddress = DevAddress;
  1062. /* Generate Start */
  1063. hi2c->Instance->CR1 |= I2C_CR1_START;
  1064. /* Process Unlocked */
  1065. __HAL_UNLOCK(hi2c);
  1066. /* Note : The I2C interrupts must be enabled after unlocking current process
  1067. to avoid the risk of I2C interrupt handle execution before current
  1068. process unlock */
  1069. /* Enable EVT, BUF and ERR interrupt */
  1070. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1071. return HAL_OK;
  1072. }
  1073. else
  1074. {
  1075. return HAL_BUSY;
  1076. }
  1077. }
  1078. /**
  1079. * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
  1080. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1081. * the configuration information for the specified I2C.
  1082. * @param DevAddress Target device address The device 7 bits address value
  1083. * in datasheet must be shifted to the left before calling the interface
  1084. * @param pData Pointer to data buffer
  1085. * @param Size Amount of data to be sent
  1086. * @retval HAL status
  1087. */
  1088. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1089. {
  1090. __IO uint32_t count = 0U;
  1091. if(hi2c->State == HAL_I2C_STATE_READY)
  1092. {
  1093. /* Wait until BUSY flag is reset */
  1094. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1095. do
  1096. {
  1097. if(count-- == 0U)
  1098. {
  1099. hi2c->PreviousState = I2C_STATE_NONE;
  1100. hi2c->State= HAL_I2C_STATE_READY;
  1101. /* Process Unlocked */
  1102. __HAL_UNLOCK(hi2c);
  1103. return HAL_TIMEOUT;
  1104. }
  1105. }
  1106. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1107. /* Process Locked */
  1108. __HAL_LOCK(hi2c);
  1109. /* Check if the I2C is already enabled */
  1110. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1111. {
  1112. /* Enable I2C peripheral */
  1113. __HAL_I2C_ENABLE(hi2c);
  1114. }
  1115. /* Disable Pos */
  1116. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1117. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1118. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1119. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1120. /* Prepare transfer parameters */
  1121. hi2c->pBuffPtr = pData;
  1122. hi2c->XferCount = Size;
  1123. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1124. hi2c->XferSize = hi2c->XferCount;
  1125. hi2c->Devaddress = DevAddress;
  1126. /* Enable Acknowledge */
  1127. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1128. /* Generate Start */
  1129. hi2c->Instance->CR1 |= I2C_CR1_START;
  1130. /* Process Unlocked */
  1131. __HAL_UNLOCK(hi2c);
  1132. /* Note : The I2C interrupts must be enabled after unlocking current process
  1133. to avoid the risk of I2C interrupt handle execution before current
  1134. process unlock */
  1135. /* Enable EVT, BUF and ERR interrupt */
  1136. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1137. return HAL_OK;
  1138. }
  1139. else
  1140. {
  1141. return HAL_BUSY;
  1142. }
  1143. }
  1144. /**
  1145. * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
  1146. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1147. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1148. * the configuration information for the specified I2C.
  1149. * @param DevAddress Target device address The device 7 bits address value
  1150. * in datasheet must be shifted to the left before calling the interface
  1151. * @param pData Pointer to data buffer
  1152. * @param Size Amount of data to be sent
  1153. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1154. * @retval HAL status
  1155. */
  1156. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1157. {
  1158. __IO uint32_t Prev_State = 0x00U;
  1159. __IO uint32_t count = 0x00U;
  1160. /* Check the parameters */
  1161. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1162. if(hi2c->State == HAL_I2C_STATE_READY)
  1163. {
  1164. /* Check Busy Flag only if FIRST call of Master interface */
  1165. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1166. {
  1167. /* Wait until BUSY flag is reset */
  1168. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1169. do
  1170. {
  1171. if(count-- == 0U)
  1172. {
  1173. hi2c->PreviousState = I2C_STATE_NONE;
  1174. hi2c->State= HAL_I2C_STATE_READY;
  1175. /* Process Unlocked */
  1176. __HAL_UNLOCK(hi2c);
  1177. return HAL_TIMEOUT;
  1178. }
  1179. }
  1180. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1181. }
  1182. /* Process Locked */
  1183. __HAL_LOCK(hi2c);
  1184. /* Check if the I2C is already enabled */
  1185. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1186. {
  1187. /* Enable I2C peripheral */
  1188. __HAL_I2C_ENABLE(hi2c);
  1189. }
  1190. /* Disable Pos */
  1191. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1192. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1193. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1194. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1195. /* Prepare transfer parameters */
  1196. hi2c->pBuffPtr = pData;
  1197. hi2c->XferCount = Size;
  1198. hi2c->XferOptions = XferOptions;
  1199. hi2c->XferSize = hi2c->XferCount;
  1200. hi2c->Devaddress = DevAddress;
  1201. Prev_State = hi2c->PreviousState;
  1202. /* Generate Start */
  1203. if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
  1204. {
  1205. /* Generate Start condition if first transfer */
  1206. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1207. {
  1208. /* Generate Start */
  1209. hi2c->Instance->CR1 |= I2C_CR1_START;
  1210. }
  1211. else
  1212. {
  1213. /* Generate ReStart */
  1214. hi2c->Instance->CR1 |= I2C_CR1_START;
  1215. }
  1216. }
  1217. /* Process Unlocked */
  1218. __HAL_UNLOCK(hi2c);
  1219. /* Note : The I2C interrupts must be enabled after unlocking current process
  1220. to avoid the risk of I2C interrupt handle execution before current
  1221. process unlock */
  1222. /* Enable EVT, BUF and ERR interrupt */
  1223. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1224. return HAL_OK;
  1225. }
  1226. else
  1227. {
  1228. return HAL_BUSY;
  1229. }
  1230. }
  1231. /**
  1232. * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
  1233. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1234. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1235. * the configuration information for the specified I2C.
  1236. * @param DevAddress Target device address The device 7 bits address value
  1237. * in datasheet must be shifted to the left before calling the interface
  1238. * @param pData Pointer to data buffer
  1239. * @param Size Amount of data to be sent
  1240. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1241. * @retval HAL status
  1242. */
  1243. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1244. {
  1245. __IO uint32_t count = 0U;
  1246. /* Check the parameters */
  1247. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1248. if(hi2c->State == HAL_I2C_STATE_READY)
  1249. {
  1250. /* Check Busy Flag only if FIRST call of Master interface */
  1251. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1252. {
  1253. /* Wait until BUSY flag is reset */
  1254. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1255. do
  1256. {
  1257. if(count-- == 0U)
  1258. {
  1259. hi2c->PreviousState = I2C_STATE_NONE;
  1260. hi2c->State= HAL_I2C_STATE_READY;
  1261. /* Process Unlocked */
  1262. __HAL_UNLOCK(hi2c);
  1263. return HAL_TIMEOUT;
  1264. }
  1265. }
  1266. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1267. }
  1268. /* Process Locked */
  1269. __HAL_LOCK(hi2c);
  1270. /* Check if the I2C is already enabled */
  1271. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1272. {
  1273. /* Enable I2C peripheral */
  1274. __HAL_I2C_ENABLE(hi2c);
  1275. }
  1276. /* Disable Pos */
  1277. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1278. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1279. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1280. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1281. /* Prepare transfer parameters */
  1282. hi2c->pBuffPtr = pData;
  1283. hi2c->XferCount = Size;
  1284. hi2c->XferOptions = XferOptions;
  1285. hi2c->XferSize = hi2c->XferCount;
  1286. hi2c->Devaddress = DevAddress;
  1287. if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
  1288. {
  1289. /* Generate Start condition if first transfer */
  1290. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
  1291. {
  1292. /* Enable Acknowledge */
  1293. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1294. /* Generate Start */
  1295. hi2c->Instance->CR1 |= I2C_CR1_START;
  1296. }
  1297. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  1298. {
  1299. /* Enable Acknowledge */
  1300. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1301. /* Generate ReStart */
  1302. hi2c->Instance->CR1 |= I2C_CR1_START;
  1303. }
  1304. }
  1305. /* Process Unlocked */
  1306. __HAL_UNLOCK(hi2c);
  1307. /* Note : The I2C interrupts must be enabled after unlocking current process
  1308. to avoid the risk of I2C interrupt handle execution before current
  1309. process unlock */
  1310. /* Enable EVT, BUF and ERR interrupt */
  1311. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1312. return HAL_OK;
  1313. }
  1314. else
  1315. {
  1316. return HAL_BUSY;
  1317. }
  1318. }
  1319. /**
  1320. * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1321. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1322. * the configuration information for the specified I2C.
  1323. * @param pData Pointer to data buffer
  1324. * @param Size Amount of data to be sent
  1325. * @retval HAL status
  1326. */
  1327. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1328. {
  1329. __IO uint32_t count = 0U;
  1330. if(hi2c->State == HAL_I2C_STATE_READY)
  1331. {
  1332. if((pData == NULL) || (Size == 0U))
  1333. {
  1334. return HAL_ERROR;
  1335. }
  1336. /* Wait until BUSY flag is reset */
  1337. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1338. do
  1339. {
  1340. if(count-- == 0U)
  1341. {
  1342. hi2c->PreviousState = I2C_STATE_NONE;
  1343. hi2c->State= HAL_I2C_STATE_READY;
  1344. /* Process Unlocked */
  1345. __HAL_UNLOCK(hi2c);
  1346. return HAL_TIMEOUT;
  1347. }
  1348. }
  1349. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1350. /* Process Locked */
  1351. __HAL_LOCK(hi2c);
  1352. /* Check if the I2C is already enabled */
  1353. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1354. {
  1355. /* Enable I2C peripheral */
  1356. __HAL_I2C_ENABLE(hi2c);
  1357. }
  1358. /* Disable Pos */
  1359. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1360. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1361. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1362. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1363. /* Prepare transfer parameters */
  1364. hi2c->pBuffPtr = pData;
  1365. hi2c->XferCount = Size;
  1366. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1367. hi2c->XferSize = hi2c->XferCount;
  1368. /* Enable Address Acknowledge */
  1369. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1370. /* Process Unlocked */
  1371. __HAL_UNLOCK(hi2c);
  1372. /* Note : The I2C interrupts must be enabled after unlocking current process
  1373. to avoid the risk of I2C interrupt handle execution before current
  1374. process unlock */
  1375. /* Enable EVT, BUF and ERR interrupt */
  1376. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1377. return HAL_OK;
  1378. }
  1379. else
  1380. {
  1381. return HAL_BUSY;
  1382. }
  1383. }
  1384. /**
  1385. * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1386. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1387. * the configuration information for the specified I2C.
  1388. * @param pData Pointer to data buffer
  1389. * @param Size Amount of data to be sent
  1390. * @retval HAL status
  1391. */
  1392. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1393. {
  1394. __IO uint32_t count = 0U;
  1395. if(hi2c->State == HAL_I2C_STATE_READY)
  1396. {
  1397. if((pData == NULL) || (Size == 0U))
  1398. {
  1399. return HAL_ERROR;
  1400. }
  1401. /* Wait until BUSY flag is reset */
  1402. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1403. do
  1404. {
  1405. if(count-- == 0U)
  1406. {
  1407. hi2c->PreviousState = I2C_STATE_NONE;
  1408. hi2c->State= HAL_I2C_STATE_READY;
  1409. /* Process Unlocked */
  1410. __HAL_UNLOCK(hi2c);
  1411. return HAL_TIMEOUT;
  1412. }
  1413. }
  1414. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1415. /* Process Locked */
  1416. __HAL_LOCK(hi2c);
  1417. /* Check if the I2C is already enabled */
  1418. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1419. {
  1420. /* Enable I2C peripheral */
  1421. __HAL_I2C_ENABLE(hi2c);
  1422. }
  1423. /* Disable Pos */
  1424. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1425. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1426. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1427. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1428. /* Prepare transfer parameters */
  1429. hi2c->pBuffPtr = pData;
  1430. hi2c->XferSize = Size;
  1431. hi2c->XferCount = Size;
  1432. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1433. /* Enable Address Acknowledge */
  1434. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1435. /* Process Unlocked */
  1436. __HAL_UNLOCK(hi2c);
  1437. /* Note : The I2C interrupts must be enabled after unlocking current process
  1438. to avoid the risk of I2C interrupt handle execution before current
  1439. process unlock */
  1440. /* Enable EVT, BUF and ERR interrupt */
  1441. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1442. return HAL_OK;
  1443. }
  1444. else
  1445. {
  1446. return HAL_BUSY;
  1447. }
  1448. }
  1449. /**
  1450. * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1451. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1452. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1453. * the configuration information for I2C module
  1454. * @param pData Pointer to data buffer
  1455. * @param Size Amount of data to be sent
  1456. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1457. * @retval HAL status
  1458. */
  1459. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1460. {
  1461. /* Check the parameters */
  1462. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1463. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1464. {
  1465. if((pData == NULL) || (Size == 0U))
  1466. {
  1467. return HAL_ERROR;
  1468. }
  1469. /* Process Locked */
  1470. __HAL_LOCK(hi2c);
  1471. /* Check if the I2C is already enabled */
  1472. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1473. {
  1474. /* Enable I2C peripheral */
  1475. __HAL_I2C_ENABLE(hi2c);
  1476. }
  1477. /* Disable Pos */
  1478. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1479. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  1480. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1481. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1482. /* Prepare transfer parameters */
  1483. hi2c->pBuffPtr = pData;
  1484. hi2c->XferCount = Size;
  1485. hi2c->XferOptions = XferOptions;
  1486. hi2c->XferSize = hi2c->XferCount;
  1487. /* Clear ADDR flag */
  1488. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1489. /* Process Unlocked */
  1490. __HAL_UNLOCK(hi2c);
  1491. /* Note : The I2C interrupts must be enabled after unlocking current process
  1492. to avoid the risk of I2C interrupt handle execution before current
  1493. process unlock */
  1494. /* Enable EVT, BUF and ERR interrupt */
  1495. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1496. return HAL_OK;
  1497. }
  1498. else
  1499. {
  1500. return HAL_BUSY;
  1501. }
  1502. }
  1503. /**
  1504. * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  1505. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1506. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1507. * the configuration information for the specified I2C.
  1508. * @param pData Pointer to data buffer
  1509. * @param Size Amount of data to be sent
  1510. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1511. * @retval HAL status
  1512. */
  1513. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1514. {
  1515. /* Check the parameters */
  1516. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1517. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1518. {
  1519. if((pData == NULL) || (Size == 0U))
  1520. {
  1521. return HAL_ERROR;
  1522. }
  1523. /* Process Locked */
  1524. __HAL_LOCK(hi2c);
  1525. /* Check if the I2C is already enabled */
  1526. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1527. {
  1528. /* Enable I2C peripheral */
  1529. __HAL_I2C_ENABLE(hi2c);
  1530. }
  1531. /* Disable Pos */
  1532. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1533. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  1534. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1535. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1536. /* Prepare transfer parameters */
  1537. hi2c->pBuffPtr = pData;
  1538. hi2c->XferCount = Size;
  1539. hi2c->XferOptions = XferOptions;
  1540. hi2c->XferSize = hi2c->XferCount;
  1541. /* Clear ADDR flag */
  1542. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1543. /* Process Unlocked */
  1544. __HAL_UNLOCK(hi2c);
  1545. /* Note : The I2C interrupts must be enabled after unlocking current process
  1546. to avoid the risk of I2C interrupt handle execution before current
  1547. process unlock */
  1548. /* Enable EVT, BUF and ERR interrupt */
  1549. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1550. return HAL_OK;
  1551. }
  1552. else
  1553. {
  1554. return HAL_BUSY;
  1555. }
  1556. }
  1557. /**
  1558. * @brief Enable the Address listen mode with Interrupt.
  1559. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1560. * the configuration information for the specified I2C.
  1561. * @retval HAL status
  1562. */
  1563. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  1564. {
  1565. if(hi2c->State == HAL_I2C_STATE_READY)
  1566. {
  1567. hi2c->State = HAL_I2C_STATE_LISTEN;
  1568. /* Check if the I2C is already enabled */
  1569. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1570. {
  1571. /* Enable I2C peripheral */
  1572. __HAL_I2C_ENABLE(hi2c);
  1573. }
  1574. /* Enable Address Acknowledge */
  1575. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1576. /* Enable EVT and ERR interrupt */
  1577. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1578. return HAL_OK;
  1579. }
  1580. else
  1581. {
  1582. return HAL_BUSY;
  1583. }
  1584. }
  1585. /**
  1586. * @brief Disable the Address listen mode with Interrupt.
  1587. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1588. * the configuration information for the specified I2C.
  1589. * @retval HAL status
  1590. */
  1591. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  1592. {
  1593. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  1594. uint32_t tmp;
  1595. /* Disable Address listen mode only if a transfer is not ongoing */
  1596. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1597. {
  1598. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  1599. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  1600. hi2c->State = HAL_I2C_STATE_READY;
  1601. hi2c->Mode = HAL_I2C_MODE_NONE;
  1602. /* Disable Address Acknowledge */
  1603. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1604. /* Disable EVT and ERR interrupt */
  1605. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1606. return HAL_OK;
  1607. }
  1608. else
  1609. {
  1610. return HAL_BUSY;
  1611. }
  1612. }
  1613. /**
  1614. * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
  1615. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1616. * the configuration information for the specified I2C.
  1617. * @param DevAddress Target device address The device 7 bits address value
  1618. * in datasheet must be shifted to the left before calling the interface
  1619. * @param pData Pointer to data buffer
  1620. * @param Size Amount of data to be sent
  1621. * @retval HAL status
  1622. */
  1623. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1624. {
  1625. __IO uint32_t count = 0U;
  1626. if(hi2c->State == HAL_I2C_STATE_READY)
  1627. {
  1628. /* Wait until BUSY flag is reset */
  1629. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1630. do
  1631. {
  1632. if(count-- == 0U)
  1633. {
  1634. hi2c->PreviousState = I2C_STATE_NONE;
  1635. hi2c->State= HAL_I2C_STATE_READY;
  1636. /* Process Unlocked */
  1637. __HAL_UNLOCK(hi2c);
  1638. return HAL_TIMEOUT;
  1639. }
  1640. }
  1641. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1642. /* Process Locked */
  1643. __HAL_LOCK(hi2c);
  1644. /* Check if the I2C is already enabled */
  1645. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1646. {
  1647. /* Enable I2C peripheral */
  1648. __HAL_I2C_ENABLE(hi2c);
  1649. }
  1650. /* Disable Pos */
  1651. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1652. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1653. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1654. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1655. /* Prepare transfer parameters */
  1656. hi2c->pBuffPtr = pData;
  1657. hi2c->XferCount = Size;
  1658. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1659. hi2c->XferSize = hi2c->XferCount;
  1660. hi2c->Devaddress = DevAddress;
  1661. if(hi2c->XferSize > 0U)
  1662. {
  1663. /* Set the I2C DMA transfer complete callback */
  1664. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1665. /* Set the DMA error callback */
  1666. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1667. /* Set the unused DMA callbacks to NULL */
  1668. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1669. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1670. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1671. hi2c->hdmatx->XferAbortCallback = NULL;
  1672. /* Enable the DMA Stream */
  1673. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1674. /* Enable Acknowledge */
  1675. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1676. /* Generate Start */
  1677. hi2c->Instance->CR1 |= I2C_CR1_START;
  1678. /* Process Unlocked */
  1679. __HAL_UNLOCK(hi2c);
  1680. /* Note : The I2C interrupts must be enabled after unlocking current process
  1681. to avoid the risk of I2C interrupt handle execution before current
  1682. process unlock */
  1683. /* Enable EVT and ERR interrupt */
  1684. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1685. /* Enable DMA Request */
  1686. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1687. }
  1688. else
  1689. {
  1690. /* Enable Acknowledge */
  1691. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1692. /* Generate Start */
  1693. hi2c->Instance->CR1 |= I2C_CR1_START;
  1694. /* Process Unlocked */
  1695. __HAL_UNLOCK(hi2c);
  1696. /* Note : The I2C interrupts must be enabled after unlocking current process
  1697. to avoid the risk of I2C interrupt handle execution before current
  1698. process unlock */
  1699. /* Enable EVT, BUF and ERR interrupt */
  1700. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1701. }
  1702. return HAL_OK;
  1703. }
  1704. else
  1705. {
  1706. return HAL_BUSY;
  1707. }
  1708. }
  1709. /**
  1710. * @brief Receive in master mode an amount of data in non-blocking mode with DMA
  1711. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1712. * the configuration information for the specified I2C.
  1713. * @param DevAddress Target device address The device 7 bits address value
  1714. * in datasheet must be shifted to the left before calling the interface
  1715. * @param pData Pointer to data buffer
  1716. * @param Size Amount of data to be sent
  1717. * @retval HAL status
  1718. */
  1719. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1720. {
  1721. __IO uint32_t count = 0U;
  1722. if(hi2c->State == HAL_I2C_STATE_READY)
  1723. {
  1724. /* Wait until BUSY flag is reset */
  1725. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1726. do
  1727. {
  1728. if(count-- == 0U)
  1729. {
  1730. hi2c->PreviousState = I2C_STATE_NONE;
  1731. hi2c->State= HAL_I2C_STATE_READY;
  1732. /* Process Unlocked */
  1733. __HAL_UNLOCK(hi2c);
  1734. return HAL_TIMEOUT;
  1735. }
  1736. }
  1737. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1738. /* Process Locked */
  1739. __HAL_LOCK(hi2c);
  1740. /* Check if the I2C is already enabled */
  1741. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1742. {
  1743. /* Enable I2C peripheral */
  1744. __HAL_I2C_ENABLE(hi2c);
  1745. }
  1746. /* Disable Pos */
  1747. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1748. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1749. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1750. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1751. /* Prepare transfer parameters */
  1752. hi2c->pBuffPtr = pData;
  1753. hi2c->XferCount = Size;
  1754. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1755. hi2c->XferSize = hi2c->XferCount;
  1756. hi2c->Devaddress = DevAddress;
  1757. if(hi2c->XferSize > 0U)
  1758. {
  1759. /* Set the I2C DMA transfer complete callback */
  1760. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1761. /* Set the DMA error callback */
  1762. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1763. /* Set the unused DMA callbacks to NULL */
  1764. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1765. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1766. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1767. hi2c->hdmarx->XferAbortCallback = NULL;
  1768. /* Enable the DMA Stream */
  1769. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1770. /* Enable Acknowledge */
  1771. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1772. /* Generate Start */
  1773. hi2c->Instance->CR1 |= I2C_CR1_START;
  1774. /* Process Unlocked */
  1775. __HAL_UNLOCK(hi2c);
  1776. /* Note : The I2C interrupts must be enabled after unlocking current process
  1777. to avoid the risk of I2C interrupt handle execution before current
  1778. process unlock */
  1779. /* Enable EVT and ERR interrupt */
  1780. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1781. /* Enable DMA Request */
  1782. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1783. }
  1784. else
  1785. {
  1786. /* Enable Acknowledge */
  1787. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1788. /* Generate Start */
  1789. hi2c->Instance->CR1 |= I2C_CR1_START;
  1790. /* Process Unlocked */
  1791. __HAL_UNLOCK(hi2c);
  1792. /* Note : The I2C interrupts must be enabled after unlocking current process
  1793. to avoid the risk of I2C interrupt handle execution before current
  1794. process unlock */
  1795. /* Enable EVT, BUF and ERR interrupt */
  1796. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1797. }
  1798. return HAL_OK;
  1799. }
  1800. else
  1801. {
  1802. return HAL_BUSY;
  1803. }
  1804. }
  1805. /**
  1806. * @brief Abort a master I2C process communication with Interrupt.
  1807. * @note This abort can be called only if state is ready
  1808. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1809. * the configuration information for the specified I2C.
  1810. * @param DevAddress Target device address The device 7 bits address value
  1811. * in datasheet must be shifted to the left before calling the interface
  1812. * @retval HAL status
  1813. */
  1814. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  1815. {
  1816. /* Prevent unused argument(s) compilation warning */
  1817. UNUSED(DevAddress);
  1818. /* Abort Master transfer during Receive or Transmit process */
  1819. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  1820. {
  1821. /* Process Locked */
  1822. __HAL_LOCK(hi2c);
  1823. hi2c->PreviousState = I2C_STATE_NONE;
  1824. hi2c->State = HAL_I2C_STATE_ABORT;
  1825. /* Disable Acknowledge */
  1826. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1827. /* Generate Stop */
  1828. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1829. hi2c->XferCount = 0U;
  1830. /* Disable EVT, BUF and ERR interrupt */
  1831. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1832. /* Process Unlocked */
  1833. __HAL_UNLOCK(hi2c);
  1834. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1835. I2C_ITError(hi2c);
  1836. return HAL_OK;
  1837. }
  1838. else
  1839. {
  1840. /* Wrong usage of abort function */
  1841. /* This function should be used only in case of abort monitored by master device */
  1842. return HAL_ERROR;
  1843. }
  1844. }
  1845. /**
  1846. * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
  1847. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1848. * the configuration information for the specified I2C.
  1849. * @param pData Pointer to data buffer
  1850. * @param Size Amount of data to be sent
  1851. * @retval HAL status
  1852. */
  1853. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1854. {
  1855. __IO uint32_t count = 0U;
  1856. if(hi2c->State == HAL_I2C_STATE_READY)
  1857. {
  1858. if((pData == NULL) || (Size == 0U))
  1859. {
  1860. return HAL_ERROR;
  1861. }
  1862. /* Wait until BUSY flag is reset */
  1863. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1864. do
  1865. {
  1866. if(count-- == 0U)
  1867. {
  1868. hi2c->PreviousState = I2C_STATE_NONE;
  1869. hi2c->State= HAL_I2C_STATE_READY;
  1870. /* Process Unlocked */
  1871. __HAL_UNLOCK(hi2c);
  1872. return HAL_TIMEOUT;
  1873. }
  1874. }
  1875. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1876. /* Process Locked */
  1877. __HAL_LOCK(hi2c);
  1878. /* Check if the I2C is already enabled */
  1879. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1880. {
  1881. /* Enable I2C peripheral */
  1882. __HAL_I2C_ENABLE(hi2c);
  1883. }
  1884. /* Disable Pos */
  1885. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1886. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1887. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1888. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1889. /* Prepare transfer parameters */
  1890. hi2c->pBuffPtr = pData;
  1891. hi2c->XferCount = Size;
  1892. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1893. hi2c->XferSize = hi2c->XferCount;
  1894. /* Set the I2C DMA transfer complete callback */
  1895. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1896. /* Set the DMA error callback */
  1897. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1898. /* Set the unused DMA callbacks to NULL */
  1899. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1900. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1901. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1902. hi2c->hdmatx->XferAbortCallback = NULL;
  1903. /* Enable the DMA Stream */
  1904. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1905. /* Enable Address Acknowledge */
  1906. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1907. /* Process Unlocked */
  1908. __HAL_UNLOCK(hi2c);
  1909. /* Note : The I2C interrupts must be enabled after unlocking current process
  1910. to avoid the risk of I2C interrupt handle execution before current
  1911. process unlock */
  1912. /* Enable EVT and ERR interrupt */
  1913. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1914. /* Enable DMA Request */
  1915. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1916. return HAL_OK;
  1917. }
  1918. else
  1919. {
  1920. return HAL_BUSY;
  1921. }
  1922. }
  1923. /**
  1924. * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
  1925. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1926. * the configuration information for the specified I2C.
  1927. * @param pData Pointer to data buffer
  1928. * @param Size Amount of data to be sent
  1929. * @retval HAL status
  1930. */
  1931. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1932. {
  1933. __IO uint32_t count = 0U;
  1934. if(hi2c->State == HAL_I2C_STATE_READY)
  1935. {
  1936. if((pData == NULL) || (Size == 0U))
  1937. {
  1938. return HAL_ERROR;
  1939. }
  1940. /* Wait until BUSY flag is reset */
  1941. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1942. do
  1943. {
  1944. if(count-- == 0U)
  1945. {
  1946. hi2c->PreviousState = I2C_STATE_NONE;
  1947. hi2c->State= HAL_I2C_STATE_READY;
  1948. /* Process Unlocked */
  1949. __HAL_UNLOCK(hi2c);
  1950. return HAL_TIMEOUT;
  1951. }
  1952. }
  1953. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1954. /* Process Locked */
  1955. __HAL_LOCK(hi2c);
  1956. /* Check if the I2C is already enabled */
  1957. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1958. {
  1959. /* Enable I2C peripheral */
  1960. __HAL_I2C_ENABLE(hi2c);
  1961. }
  1962. /* Disable Pos */
  1963. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1964. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1965. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1966. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1967. /* Prepare transfer parameters */
  1968. hi2c->pBuffPtr = pData;
  1969. hi2c->XferCount = Size;
  1970. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1971. hi2c->XferSize = hi2c->XferCount;
  1972. /* Set the I2C DMA transfer complete callback */
  1973. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1974. /* Set the DMA error callback */
  1975. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1976. /* Set the unused DMA callbacks to NULL */
  1977. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1978. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1979. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1980. hi2c->hdmarx->XferAbortCallback = NULL;
  1981. /* Enable the DMA Stream */
  1982. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1983. /* Enable Address Acknowledge */
  1984. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1985. /* Process Unlocked */
  1986. __HAL_UNLOCK(hi2c);
  1987. /* Note : The I2C interrupts must be enabled after unlocking current process
  1988. to avoid the risk of I2C interrupt handle execution before current
  1989. process unlock */
  1990. /* Enable EVT and ERR interrupt */
  1991. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1992. /* Enable DMA Request */
  1993. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1994. return HAL_OK;
  1995. }
  1996. else
  1997. {
  1998. return HAL_BUSY;
  1999. }
  2000. }
  2001. /**
  2002. * @brief Write an amount of data in blocking mode to a specific memory address
  2003. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2004. * the configuration information for the specified I2C.
  2005. * @param DevAddress Target device address
  2006. * @param MemAddress Internal memory address
  2007. * @param MemAddSize Size of internal memory address
  2008. * @param pData Pointer to data buffer
  2009. * @param Size Amount of data to be sent
  2010. * @param Timeout Timeout duration
  2011. * @retval HAL status
  2012. */
  2013. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2014. {
  2015. uint32_t tickstart = 0x00U;
  2016. /* Init tickstart for timeout management*/
  2017. tickstart = HAL_GetTick();
  2018. /* Check the parameters */
  2019. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2020. if(hi2c->State == HAL_I2C_STATE_READY)
  2021. {
  2022. /* Wait until BUSY flag is reset */
  2023. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2024. {
  2025. return HAL_BUSY;
  2026. }
  2027. /* Process Locked */
  2028. __HAL_LOCK(hi2c);
  2029. /* Check if the I2C is already enabled */
  2030. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2031. {
  2032. /* Enable I2C peripheral */
  2033. __HAL_I2C_ENABLE(hi2c);
  2034. }
  2035. /* Disable Pos */
  2036. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2037. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2038. hi2c->Mode = HAL_I2C_MODE_MEM;
  2039. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2040. /* Prepare transfer parameters */
  2041. hi2c->pBuffPtr = pData;
  2042. hi2c->XferCount = Size;
  2043. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2044. hi2c->XferSize = hi2c->XferCount;
  2045. /* Send Slave Address and Memory Address */
  2046. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2047. {
  2048. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2049. {
  2050. /* Process Unlocked */
  2051. __HAL_UNLOCK(hi2c);
  2052. return HAL_ERROR;
  2053. }
  2054. else
  2055. {
  2056. /* Process Unlocked */
  2057. __HAL_UNLOCK(hi2c);
  2058. return HAL_TIMEOUT;
  2059. }
  2060. }
  2061. while(hi2c->XferSize > 0U)
  2062. {
  2063. /* Wait until TXE flag is set */
  2064. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2065. {
  2066. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2067. {
  2068. /* Generate Stop */
  2069. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2070. return HAL_ERROR;
  2071. }
  2072. else
  2073. {
  2074. return HAL_TIMEOUT;
  2075. }
  2076. }
  2077. /* Write data to DR */
  2078. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2079. hi2c->XferSize--;
  2080. hi2c->XferCount--;
  2081. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2082. {
  2083. /* Write data to DR */
  2084. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2085. hi2c->XferSize--;
  2086. hi2c->XferCount--;
  2087. }
  2088. }
  2089. /* Wait until BTF flag is set */
  2090. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2091. {
  2092. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2093. {
  2094. /* Generate Stop */
  2095. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2096. return HAL_ERROR;
  2097. }
  2098. else
  2099. {
  2100. return HAL_TIMEOUT;
  2101. }
  2102. }
  2103. /* Generate Stop */
  2104. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2105. hi2c->State = HAL_I2C_STATE_READY;
  2106. hi2c->Mode = HAL_I2C_MODE_NONE;
  2107. /* Process Unlocked */
  2108. __HAL_UNLOCK(hi2c);
  2109. return HAL_OK;
  2110. }
  2111. else
  2112. {
  2113. return HAL_BUSY;
  2114. }
  2115. }
  2116. /**
  2117. * @brief Read an amount of data in blocking mode from a specific memory address
  2118. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2119. * the configuration information for the specified I2C.
  2120. * @param DevAddress Target device address
  2121. * @param MemAddress Internal memory address
  2122. * @param MemAddSize Size of internal memory address
  2123. * @param pData Pointer to data buffer
  2124. * @param Size Amount of data to be sent
  2125. * @param Timeout Timeout duration
  2126. * @retval HAL status
  2127. */
  2128. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2129. {
  2130. uint32_t tickstart = 0x00U;
  2131. /* Init tickstart for timeout management*/
  2132. tickstart = HAL_GetTick();
  2133. /* Check the parameters */
  2134. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2135. if(hi2c->State == HAL_I2C_STATE_READY)
  2136. {
  2137. /* Wait until BUSY flag is reset */
  2138. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2139. {
  2140. return HAL_BUSY;
  2141. }
  2142. /* Process Locked */
  2143. __HAL_LOCK(hi2c);
  2144. /* Check if the I2C is already enabled */
  2145. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2146. {
  2147. /* Enable I2C peripheral */
  2148. __HAL_I2C_ENABLE(hi2c);
  2149. }
  2150. /* Disable Pos */
  2151. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2152. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2153. hi2c->Mode = HAL_I2C_MODE_MEM;
  2154. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2155. /* Prepare transfer parameters */
  2156. hi2c->pBuffPtr = pData;
  2157. hi2c->XferCount = Size;
  2158. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2159. hi2c->XferSize = hi2c->XferCount;
  2160. /* Send Slave Address and Memory Address */
  2161. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2162. {
  2163. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2164. {
  2165. /* Process Unlocked */
  2166. __HAL_UNLOCK(hi2c);
  2167. return HAL_ERROR;
  2168. }
  2169. else
  2170. {
  2171. /* Process Unlocked */
  2172. __HAL_UNLOCK(hi2c);
  2173. return HAL_TIMEOUT;
  2174. }
  2175. }
  2176. if(hi2c->XferSize == 0U)
  2177. {
  2178. /* Clear ADDR flag */
  2179. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2180. /* Generate Stop */
  2181. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2182. }
  2183. else if(hi2c->XferSize == 1U)
  2184. {
  2185. /* Disable Acknowledge */
  2186. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2187. /* Clear ADDR flag */
  2188. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2189. /* Generate Stop */
  2190. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2191. }
  2192. else if(hi2c->XferSize == 2U)
  2193. {
  2194. /* Disable Acknowledge */
  2195. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2196. /* Enable Pos */
  2197. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2198. /* Clear ADDR flag */
  2199. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2200. }
  2201. else
  2202. {
  2203. /* Clear ADDR flag */
  2204. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2205. }
  2206. while(hi2c->XferSize > 0U)
  2207. {
  2208. if(hi2c->XferSize <= 3U)
  2209. {
  2210. /* One byte */
  2211. if(hi2c->XferSize== 1U)
  2212. {
  2213. /* Wait until RXNE flag is set */
  2214. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2215. {
  2216. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2217. {
  2218. return HAL_TIMEOUT;
  2219. }
  2220. else
  2221. {
  2222. return HAL_ERROR;
  2223. }
  2224. }
  2225. /* Read data from DR */
  2226. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2227. hi2c->XferSize--;
  2228. hi2c->XferCount--;
  2229. }
  2230. /* Two bytes */
  2231. else if(hi2c->XferSize == 2U)
  2232. {
  2233. /* Wait until BTF flag is set */
  2234. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2235. {
  2236. return HAL_TIMEOUT;
  2237. }
  2238. /* Generate Stop */
  2239. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2240. /* Read data from DR */
  2241. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2242. hi2c->XferSize--;
  2243. hi2c->XferCount--;
  2244. /* Read data from DR */
  2245. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2246. hi2c->XferSize--;
  2247. hi2c->XferCount--;
  2248. }
  2249. /* 3 Last bytes */
  2250. else
  2251. {
  2252. /* Wait until BTF flag is set */
  2253. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2254. {
  2255. return HAL_TIMEOUT;
  2256. }
  2257. /* Disable Acknowledge */
  2258. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2259. /* Read data from DR */
  2260. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2261. hi2c->XferSize--;
  2262. hi2c->XferCount--;
  2263. /* Wait until BTF flag is set */
  2264. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2265. {
  2266. return HAL_TIMEOUT;
  2267. }
  2268. /* Generate Stop */
  2269. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2270. /* Read data from DR */
  2271. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2272. hi2c->XferSize--;
  2273. hi2c->XferCount--;
  2274. /* Read data from DR */
  2275. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2276. hi2c->XferSize--;
  2277. hi2c->XferCount--;
  2278. }
  2279. }
  2280. else
  2281. {
  2282. /* Wait until RXNE flag is set */
  2283. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2284. {
  2285. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2286. {
  2287. return HAL_TIMEOUT;
  2288. }
  2289. else
  2290. {
  2291. return HAL_ERROR;
  2292. }
  2293. }
  2294. /* Read data from DR */
  2295. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2296. hi2c->XferSize--;
  2297. hi2c->XferCount--;
  2298. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2299. {
  2300. /* Read data from DR */
  2301. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2302. hi2c->XferSize--;
  2303. hi2c->XferCount--;
  2304. }
  2305. }
  2306. }
  2307. hi2c->State = HAL_I2C_STATE_READY;
  2308. hi2c->Mode = HAL_I2C_MODE_NONE;
  2309. /* Process Unlocked */
  2310. __HAL_UNLOCK(hi2c);
  2311. return HAL_OK;
  2312. }
  2313. else
  2314. {
  2315. return HAL_BUSY;
  2316. }
  2317. }
  2318. /**
  2319. * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2320. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2321. * the configuration information for the specified I2C.
  2322. * @param DevAddress Target device address
  2323. * @param MemAddress Internal memory address
  2324. * @param MemAddSize Size of internal memory address
  2325. * @param pData Pointer to data buffer
  2326. * @param Size Amount of data to be sent
  2327. * @retval HAL status
  2328. */
  2329. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2330. {
  2331. __IO uint32_t count = 0U;
  2332. /* Check the parameters */
  2333. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2334. if(hi2c->State == HAL_I2C_STATE_READY)
  2335. {
  2336. /* Wait until BUSY flag is reset */
  2337. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2338. do
  2339. {
  2340. if(count-- == 0U)
  2341. {
  2342. hi2c->PreviousState = I2C_STATE_NONE;
  2343. hi2c->State= HAL_I2C_STATE_READY;
  2344. /* Process Unlocked */
  2345. __HAL_UNLOCK(hi2c);
  2346. return HAL_TIMEOUT;
  2347. }
  2348. }
  2349. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2350. /* Process Locked */
  2351. __HAL_LOCK(hi2c);
  2352. /* Check if the I2C is already enabled */
  2353. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2354. {
  2355. /* Enable I2C peripheral */
  2356. __HAL_I2C_ENABLE(hi2c);
  2357. }
  2358. /* Disable Pos */
  2359. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2360. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2361. hi2c->Mode = HAL_I2C_MODE_MEM;
  2362. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2363. /* Prepare transfer parameters */
  2364. hi2c->pBuffPtr = pData;
  2365. hi2c->XferSize = Size;
  2366. hi2c->XferCount = Size;
  2367. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2368. hi2c->Devaddress = DevAddress;
  2369. hi2c->Memaddress = MemAddress;
  2370. hi2c->MemaddSize = MemAddSize;
  2371. hi2c->EventCount = 0U;
  2372. /* Generate Start */
  2373. hi2c->Instance->CR1 |= I2C_CR1_START;
  2374. /* Process Unlocked */
  2375. __HAL_UNLOCK(hi2c);
  2376. /* Note : The I2C interrupts must be enabled after unlocking current process
  2377. to avoid the risk of I2C interrupt handle execution before current
  2378. process unlock */
  2379. /* Enable EVT, BUF and ERR interrupt */
  2380. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2381. return HAL_OK;
  2382. }
  2383. else
  2384. {
  2385. return HAL_BUSY;
  2386. }
  2387. }
  2388. /**
  2389. * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2390. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2391. * the configuration information for the specified I2C.
  2392. * @param DevAddress Target device address
  2393. * @param MemAddress Internal memory address
  2394. * @param MemAddSize Size of internal memory address
  2395. * @param pData Pointer to data buffer
  2396. * @param Size Amount of data to be sent
  2397. * @retval HAL status
  2398. */
  2399. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2400. {
  2401. __IO uint32_t count = 0U;
  2402. /* Check the parameters */
  2403. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2404. if(hi2c->State == HAL_I2C_STATE_READY)
  2405. {
  2406. /* Wait until BUSY flag is reset */
  2407. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2408. do
  2409. {
  2410. if(count-- == 0U)
  2411. {
  2412. hi2c->PreviousState = I2C_STATE_NONE;
  2413. hi2c->State= HAL_I2C_STATE_READY;
  2414. /* Process Unlocked */
  2415. __HAL_UNLOCK(hi2c);
  2416. return HAL_TIMEOUT;
  2417. }
  2418. }
  2419. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2420. /* Process Locked */
  2421. __HAL_LOCK(hi2c);
  2422. /* Check if the I2C is already enabled */
  2423. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2424. {
  2425. /* Enable I2C peripheral */
  2426. __HAL_I2C_ENABLE(hi2c);
  2427. }
  2428. /* Disable Pos */
  2429. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2430. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2431. hi2c->Mode = HAL_I2C_MODE_MEM;
  2432. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2433. /* Prepare transfer parameters */
  2434. hi2c->pBuffPtr = pData;
  2435. hi2c->XferSize = Size;
  2436. hi2c->XferCount = Size;
  2437. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2438. hi2c->Devaddress = DevAddress;
  2439. hi2c->Memaddress = MemAddress;
  2440. hi2c->MemaddSize = MemAddSize;
  2441. hi2c->EventCount = 0U;
  2442. /* Enable Acknowledge */
  2443. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2444. /* Generate Start */
  2445. hi2c->Instance->CR1 |= I2C_CR1_START;
  2446. /* Process Unlocked */
  2447. __HAL_UNLOCK(hi2c);
  2448. if(hi2c->XferSize > 0U)
  2449. {
  2450. /* Note : The I2C interrupts must be enabled after unlocking current process
  2451. to avoid the risk of I2C interrupt handle execution before current
  2452. process unlock */
  2453. /* Enable EVT, BUF and ERR interrupt */
  2454. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2455. }
  2456. return HAL_OK;
  2457. }
  2458. else
  2459. {
  2460. return HAL_BUSY;
  2461. }
  2462. }
  2463. /**
  2464. * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
  2465. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2466. * the configuration information for the specified I2C.
  2467. * @param DevAddress Target device address
  2468. * @param MemAddress Internal memory address
  2469. * @param MemAddSize Size of internal memory address
  2470. * @param pData Pointer to data buffer
  2471. * @param Size Amount of data to be sent
  2472. * @retval HAL status
  2473. */
  2474. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2475. {
  2476. __IO uint32_t count = 0U;
  2477. uint32_t tickstart = 0x00U;
  2478. /* Init tickstart for timeout management*/
  2479. tickstart = HAL_GetTick();
  2480. /* Check the parameters */
  2481. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2482. if(hi2c->State == HAL_I2C_STATE_READY)
  2483. {
  2484. /* Wait until BUSY flag is reset */
  2485. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2486. do
  2487. {
  2488. if(count-- == 0U)
  2489. {
  2490. hi2c->PreviousState = I2C_STATE_NONE;
  2491. hi2c->State= HAL_I2C_STATE_READY;
  2492. /* Process Unlocked */
  2493. __HAL_UNLOCK(hi2c);
  2494. return HAL_TIMEOUT;
  2495. }
  2496. }
  2497. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2498. /* Process Locked */
  2499. __HAL_LOCK(hi2c);
  2500. /* Check if the I2C is already enabled */
  2501. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2502. {
  2503. /* Enable I2C peripheral */
  2504. __HAL_I2C_ENABLE(hi2c);
  2505. }
  2506. /* Disable Pos */
  2507. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2508. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2509. hi2c->Mode = HAL_I2C_MODE_MEM;
  2510. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2511. /* Prepare transfer parameters */
  2512. hi2c->pBuffPtr = pData;
  2513. hi2c->XferSize = Size;
  2514. hi2c->XferCount = Size;
  2515. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2516. if(hi2c->XferSize > 0U)
  2517. {
  2518. /* Set the I2C DMA transfer complete callback */
  2519. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2520. /* Set the DMA error callback */
  2521. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2522. /* Set the unused DMA callbacks to NULL */
  2523. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2524. hi2c->hdmatx->XferM1CpltCallback = NULL;
  2525. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  2526. hi2c->hdmatx->XferAbortCallback = NULL;
  2527. /* Enable the DMA Stream */
  2528. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2529. /* Send Slave Address and Memory Address */
  2530. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2531. {
  2532. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2533. {
  2534. /* Process Unlocked */
  2535. __HAL_UNLOCK(hi2c);
  2536. return HAL_ERROR;
  2537. }
  2538. else
  2539. {
  2540. /* Process Unlocked */
  2541. __HAL_UNLOCK(hi2c);
  2542. return HAL_TIMEOUT;
  2543. }
  2544. }
  2545. /* Clear ADDR flag */
  2546. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2547. /* Process Unlocked */
  2548. __HAL_UNLOCK(hi2c);
  2549. /* Note : The I2C interrupts must be enabled after unlocking current process
  2550. to avoid the risk of I2C interrupt handle execution before current
  2551. process unlock */
  2552. /* Enable ERR interrupt */
  2553. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2554. /* Enable DMA Request */
  2555. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2556. }
  2557. return HAL_OK;
  2558. }
  2559. else
  2560. {
  2561. return HAL_BUSY;
  2562. }
  2563. }
  2564. /**
  2565. * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  2566. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2567. * the configuration information for the specified I2C.
  2568. * @param DevAddress Target device address
  2569. * @param MemAddress Internal memory address
  2570. * @param MemAddSize Size of internal memory address
  2571. * @param pData Pointer to data buffer
  2572. * @param Size Amount of data to be read
  2573. * @retval HAL status
  2574. */
  2575. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2576. {
  2577. uint32_t tickstart = 0x00U;
  2578. __IO uint32_t count = 0U;
  2579. /* Init tickstart for timeout management*/
  2580. tickstart = HAL_GetTick();
  2581. /* Check the parameters */
  2582. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2583. if(hi2c->State == HAL_I2C_STATE_READY)
  2584. {
  2585. /* Wait until BUSY flag is reset */
  2586. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2587. do
  2588. {
  2589. if(count-- == 0U)
  2590. {
  2591. hi2c->PreviousState = I2C_STATE_NONE;
  2592. hi2c->State= HAL_I2C_STATE_READY;
  2593. /* Process Unlocked */
  2594. __HAL_UNLOCK(hi2c);
  2595. return HAL_TIMEOUT;
  2596. }
  2597. }
  2598. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2599. /* Process Locked */
  2600. __HAL_LOCK(hi2c);
  2601. /* Check if the I2C is already enabled */
  2602. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2603. {
  2604. /* Enable I2C peripheral */
  2605. __HAL_I2C_ENABLE(hi2c);
  2606. }
  2607. /* Disable Pos */
  2608. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2609. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2610. hi2c->Mode = HAL_I2C_MODE_MEM;
  2611. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2612. /* Prepare transfer parameters */
  2613. hi2c->pBuffPtr = pData;
  2614. hi2c->XferCount = Size;
  2615. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2616. hi2c->XferSize = hi2c->XferCount;
  2617. if(hi2c->XferSize > 0U)
  2618. {
  2619. /* Set the I2C DMA transfer complete callback */
  2620. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2621. /* Set the DMA error callback */
  2622. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2623. /* Set the unused DMA callbacks to NULL */
  2624. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2625. hi2c->hdmarx->XferM1CpltCallback = NULL;
  2626. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  2627. hi2c->hdmarx->XferAbortCallback = NULL;
  2628. /* Enable the DMA Stream */
  2629. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2630. /* Send Slave Address and Memory Address */
  2631. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2632. {
  2633. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2634. {
  2635. /* Process Unlocked */
  2636. __HAL_UNLOCK(hi2c);
  2637. return HAL_ERROR;
  2638. }
  2639. else
  2640. {
  2641. /* Process Unlocked */
  2642. __HAL_UNLOCK(hi2c);
  2643. return HAL_TIMEOUT;
  2644. }
  2645. }
  2646. if(Size == 1U)
  2647. {
  2648. /* Disable Acknowledge */
  2649. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2650. }
  2651. else
  2652. {
  2653. /* Enable Last DMA bit */
  2654. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2655. }
  2656. /* Clear ADDR flag */
  2657. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2658. /* Process Unlocked */
  2659. __HAL_UNLOCK(hi2c);
  2660. /* Note : The I2C interrupts must be enabled after unlocking current process
  2661. to avoid the risk of I2C interrupt handle execution before current
  2662. process unlock */
  2663. /* Enable ERR interrupt */
  2664. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2665. /* Enable DMA Request */
  2666. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2667. }
  2668. else
  2669. {
  2670. /* Send Slave Address and Memory Address */
  2671. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2672. {
  2673. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2674. {
  2675. /* Process Unlocked */
  2676. __HAL_UNLOCK(hi2c);
  2677. return HAL_ERROR;
  2678. }
  2679. else
  2680. {
  2681. /* Process Unlocked */
  2682. __HAL_UNLOCK(hi2c);
  2683. return HAL_TIMEOUT;
  2684. }
  2685. }
  2686. /* Clear ADDR flag */
  2687. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2688. /* Generate Stop */
  2689. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2690. hi2c->State = HAL_I2C_STATE_READY;
  2691. /* Process Unlocked */
  2692. __HAL_UNLOCK(hi2c);
  2693. }
  2694. return HAL_OK;
  2695. }
  2696. else
  2697. {
  2698. return HAL_BUSY;
  2699. }
  2700. }
  2701. /**
  2702. * @brief Checks if target device is ready for communication.
  2703. * @note This function is used with Memory devices
  2704. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2705. * the configuration information for the specified I2C.
  2706. * @param DevAddress Target device address
  2707. * @param Trials Number of trials
  2708. * @param Timeout Timeout duration
  2709. * @retval HAL status
  2710. */
  2711. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2712. {
  2713. uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
  2714. /* Get tick */
  2715. tickstart = HAL_GetTick();
  2716. if(hi2c->State == HAL_I2C_STATE_READY)
  2717. {
  2718. /* Wait until BUSY flag is reset */
  2719. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2720. {
  2721. return HAL_BUSY;
  2722. }
  2723. /* Process Locked */
  2724. __HAL_LOCK(hi2c);
  2725. /* Check if the I2C is already enabled */
  2726. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2727. {
  2728. /* Enable I2C peripheral */
  2729. __HAL_I2C_ENABLE(hi2c);
  2730. }
  2731. /* Disable Pos */
  2732. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2733. hi2c->State = HAL_I2C_STATE_BUSY;
  2734. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2735. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2736. do
  2737. {
  2738. /* Generate Start */
  2739. hi2c->Instance->CR1 |= I2C_CR1_START;
  2740. /* Wait until SB flag is set */
  2741. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2742. {
  2743. return HAL_TIMEOUT;
  2744. }
  2745. /* Send slave address */
  2746. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2747. /* Wait until ADDR or AF flag are set */
  2748. /* Get tick */
  2749. tickstart = HAL_GetTick();
  2750. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2751. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2752. tmp3 = hi2c->State;
  2753. while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
  2754. {
  2755. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  2756. {
  2757. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2758. }
  2759. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2760. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2761. tmp3 = hi2c->State;
  2762. }
  2763. hi2c->State = HAL_I2C_STATE_READY;
  2764. /* Check if the ADDR flag has been set */
  2765. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2766. {
  2767. /* Generate Stop */
  2768. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2769. /* Clear ADDR Flag */
  2770. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2771. /* Wait until BUSY flag is reset */
  2772. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2773. {
  2774. return HAL_TIMEOUT;
  2775. }
  2776. hi2c->State = HAL_I2C_STATE_READY;
  2777. /* Process Unlocked */
  2778. __HAL_UNLOCK(hi2c);
  2779. return HAL_OK;
  2780. }
  2781. else
  2782. {
  2783. /* Generate Stop */
  2784. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2785. /* Clear AF Flag */
  2786. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2787. /* Wait until BUSY flag is reset */
  2788. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2789. {
  2790. return HAL_TIMEOUT;
  2791. }
  2792. }
  2793. }while(I2C_Trials++ < Trials);
  2794. hi2c->State = HAL_I2C_STATE_READY;
  2795. /* Process Unlocked */
  2796. __HAL_UNLOCK(hi2c);
  2797. return HAL_ERROR;
  2798. }
  2799. else
  2800. {
  2801. return HAL_BUSY;
  2802. }
  2803. }
  2804. /**
  2805. * @brief This function handles I2C event interrupt request.
  2806. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2807. * the configuration information for the specified I2C.
  2808. * @retval None
  2809. */
  2810. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2811. {
  2812. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2813. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2814. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2815. uint32_t CurrentMode = hi2c->Mode;
  2816. /* Master or Memory mode selected */
  2817. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2818. {
  2819. /* SB Set ----------------------------------------------------------------*/
  2820. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2821. {
  2822. I2C_Master_SB(hi2c);
  2823. }
  2824. /* ADD10 Set -------------------------------------------------------------*/
  2825. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2826. {
  2827. I2C_Master_ADD10(hi2c);
  2828. }
  2829. /* ADDR Set --------------------------------------------------------------*/
  2830. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2831. {
  2832. I2C_Master_ADDR(hi2c);
  2833. }
  2834. /* I2C in mode Transmitter -----------------------------------------------*/
  2835. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2836. {
  2837. /* TXE set and BTF reset -----------------------------------------------*/
  2838. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2839. {
  2840. I2C_MasterTransmit_TXE(hi2c);
  2841. }
  2842. /* BTF set -------------------------------------------------------------*/
  2843. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2844. {
  2845. I2C_MasterTransmit_BTF(hi2c);
  2846. }
  2847. }
  2848. /* I2C in mode Receiver --------------------------------------------------*/
  2849. else
  2850. {
  2851. /* RXNE set and BTF reset -----------------------------------------------*/
  2852. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2853. {
  2854. I2C_MasterReceive_RXNE(hi2c);
  2855. }
  2856. /* BTF set -------------------------------------------------------------*/
  2857. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2858. {
  2859. I2C_MasterReceive_BTF(hi2c);
  2860. }
  2861. }
  2862. }
  2863. /* Slave mode selected */
  2864. else
  2865. {
  2866. /* ADDR set --------------------------------------------------------------*/
  2867. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2868. {
  2869. I2C_Slave_ADDR(hi2c);
  2870. }
  2871. /* STOPF set --------------------------------------------------------------*/
  2872. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2873. {
  2874. I2C_Slave_STOPF(hi2c);
  2875. }
  2876. /* I2C in mode Transmitter -----------------------------------------------*/
  2877. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2878. {
  2879. /* TXE set and BTF reset -----------------------------------------------*/
  2880. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2881. {
  2882. I2C_SlaveTransmit_TXE(hi2c);
  2883. }
  2884. /* BTF set -------------------------------------------------------------*/
  2885. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2886. {
  2887. I2C_SlaveTransmit_BTF(hi2c);
  2888. }
  2889. }
  2890. /* I2C in mode Receiver --------------------------------------------------*/
  2891. else
  2892. {
  2893. /* RXNE set and BTF reset ----------------------------------------------*/
  2894. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2895. {
  2896. I2C_SlaveReceive_RXNE(hi2c);
  2897. }
  2898. /* BTF set -------------------------------------------------------------*/
  2899. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2900. {
  2901. I2C_SlaveReceive_BTF(hi2c);
  2902. }
  2903. }
  2904. }
  2905. }
  2906. /**
  2907. * @brief This function handles I2C error interrupt request.
  2908. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2909. * the configuration information for the specified I2C.
  2910. * @retval None
  2911. */
  2912. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2913. {
  2914. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
  2915. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2916. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2917. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2918. if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2919. {
  2920. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2921. /* Clear BERR flag */
  2922. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2923. }
  2924. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2925. if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2926. {
  2927. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2928. /* Clear ARLO flag */
  2929. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2930. }
  2931. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2932. if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2933. {
  2934. tmp1 = hi2c->Mode;
  2935. tmp2 = hi2c->XferCount;
  2936. tmp3 = hi2c->State;
  2937. tmp4 = hi2c->PreviousState;
  2938. if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2939. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2940. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2941. {
  2942. I2C_Slave_AF(hi2c);
  2943. }
  2944. else
  2945. {
  2946. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2947. /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  2948. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  2949. {
  2950. /* Generate Stop */
  2951. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2952. }
  2953. /* Clear AF flag */
  2954. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2955. }
  2956. }
  2957. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2958. if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2959. {
  2960. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  2961. /* Clear OVR flag */
  2962. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2963. }
  2964. /* Call the Error Callback in case of Error detected -----------------------*/
  2965. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2966. {
  2967. I2C_ITError(hi2c);
  2968. }
  2969. }
  2970. /**
  2971. * @brief Master Tx Transfer completed callback.
  2972. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2973. * the configuration information for the specified I2C.
  2974. * @retval None
  2975. */
  2976. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2977. {
  2978. /* Prevent unused argument(s) compilation warning */
  2979. UNUSED(hi2c);
  2980. /* NOTE : This function should not be modified, when the callback is needed,
  2981. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  2982. */
  2983. }
  2984. /**
  2985. * @brief Master Rx Transfer completed callback.
  2986. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2987. * the configuration information for the specified I2C.
  2988. * @retval None
  2989. */
  2990. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2991. {
  2992. /* Prevent unused argument(s) compilation warning */
  2993. UNUSED(hi2c);
  2994. /* NOTE : This function should not be modified, when the callback is needed,
  2995. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  2996. */
  2997. }
  2998. /** @brief Slave Tx Transfer completed callback.
  2999. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3000. * the configuration information for the specified I2C.
  3001. * @retval None
  3002. */
  3003. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3004. {
  3005. /* Prevent unused argument(s) compilation warning */
  3006. UNUSED(hi2c);
  3007. /* NOTE : This function should not be modified, when the callback is needed,
  3008. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  3009. */
  3010. }
  3011. /**
  3012. * @brief Slave Rx Transfer completed callback.
  3013. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3014. * the configuration information for the specified I2C.
  3015. * @retval None
  3016. */
  3017. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3018. {
  3019. /* Prevent unused argument(s) compilation warning */
  3020. UNUSED(hi2c);
  3021. /* NOTE : This function should not be modified, when the callback is needed,
  3022. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  3023. */
  3024. }
  3025. /**
  3026. * @brief Slave Address Match callback.
  3027. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3028. * the configuration information for the specified I2C.
  3029. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
  3030. * @param AddrMatchCode Address Match Code
  3031. * @retval None
  3032. */
  3033. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  3034. {
  3035. /* Prevent unused argument(s) compilation warning */
  3036. UNUSED(hi2c);
  3037. UNUSED(TransferDirection);
  3038. UNUSED(AddrMatchCode);
  3039. /* NOTE : This function should not be modified, when the callback is needed,
  3040. the HAL_I2C_AddrCallback can be implemented in the user file
  3041. */
  3042. }
  3043. /**
  3044. * @brief Listen Complete callback.
  3045. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3046. * the configuration information for the specified I2C.
  3047. * @retval None
  3048. */
  3049. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  3050. {
  3051. /* Prevent unused argument(s) compilation warning */
  3052. UNUSED(hi2c);
  3053. /* NOTE : This function should not be modified, when the callback is needed,
  3054. the HAL_I2C_ListenCpltCallback can be implemented in the user file
  3055. */
  3056. }
  3057. /**
  3058. * @brief Memory Tx Transfer completed callback.
  3059. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3060. * the configuration information for the specified I2C.
  3061. * @retval None
  3062. */
  3063. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3064. {
  3065. /* Prevent unused argument(s) compilation warning */
  3066. UNUSED(hi2c);
  3067. /* NOTE : This function should not be modified, when the callback is needed,
  3068. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  3069. */
  3070. }
  3071. /**
  3072. * @brief Memory Rx Transfer completed callback.
  3073. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3074. * the configuration information for the specified I2C.
  3075. * @retval None
  3076. */
  3077. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3078. {
  3079. /* Prevent unused argument(s) compilation warning */
  3080. UNUSED(hi2c);
  3081. /* NOTE : This function should not be modified, when the callback is needed,
  3082. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  3083. */
  3084. }
  3085. /**
  3086. * @brief I2C error callback.
  3087. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3088. * the configuration information for the specified I2C.
  3089. * @retval None
  3090. */
  3091. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  3092. {
  3093. /* Prevent unused argument(s) compilation warning */
  3094. UNUSED(hi2c);
  3095. /* NOTE : This function should not be modified, when the callback is needed,
  3096. the HAL_I2C_ErrorCallback can be implemented in the user file
  3097. */
  3098. }
  3099. /**
  3100. * @brief I2C abort callback.
  3101. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3102. * the configuration information for the specified I2C.
  3103. * @retval None
  3104. */
  3105. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  3106. {
  3107. /* Prevent unused argument(s) compilation warning */
  3108. UNUSED(hi2c);
  3109. /* NOTE : This function should not be modified, when the callback is needed,
  3110. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  3111. */
  3112. }
  3113. /**
  3114. * @}
  3115. */
  3116. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  3117. * @brief Peripheral State and Errors functions
  3118. *
  3119. @verbatim
  3120. ===============================================================================
  3121. ##### Peripheral State, Mode and Error functions #####
  3122. ===============================================================================
  3123. [..]
  3124. This subsection permits to get in run-time the status of the peripheral
  3125. and the data flow.
  3126. @endverbatim
  3127. * @{
  3128. */
  3129. /**
  3130. * @brief Return the I2C handle state.
  3131. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3132. * the configuration information for the specified I2C.
  3133. * @retval HAL state
  3134. */
  3135. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  3136. {
  3137. /* Return I2C handle state */
  3138. return hi2c->State;
  3139. }
  3140. /**
  3141. * @brief Return the I2C Master, Slave, Memory or no mode.
  3142. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3143. * the configuration information for I2C module
  3144. * @retval HAL mode
  3145. */
  3146. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  3147. {
  3148. return hi2c->Mode;
  3149. }
  3150. /**
  3151. * @brief Return the I2C error code
  3152. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3153. * the configuration information for the specified I2C.
  3154. * @retval I2C Error Code
  3155. */
  3156. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  3157. {
  3158. return hi2c->ErrorCode;
  3159. }
  3160. /**
  3161. * @}
  3162. */
  3163. /**
  3164. * @brief Handle TXE flag for Master
  3165. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3166. * the configuration information for I2C module
  3167. * @retval HAL status
  3168. */
  3169. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3170. {
  3171. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3172. uint32_t CurrentState = hi2c->State;
  3173. uint32_t CurrentMode = hi2c->Mode;
  3174. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3175. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  3176. {
  3177. /* Call TxCpltCallback() directly if no stop mode is set */
  3178. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3179. {
  3180. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3181. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3182. hi2c->Mode = HAL_I2C_MODE_NONE;
  3183. hi2c->State = HAL_I2C_STATE_READY;
  3184. HAL_I2C_MasterTxCpltCallback(hi2c);
  3185. }
  3186. else /* Generate Stop condition then Call TxCpltCallback() */
  3187. {
  3188. /* Disable EVT, BUF and ERR interrupt */
  3189. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3190. /* Generate Stop */
  3191. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3192. hi2c->PreviousState = I2C_STATE_NONE;
  3193. hi2c->State = HAL_I2C_STATE_READY;
  3194. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3195. {
  3196. hi2c->Mode = HAL_I2C_MODE_NONE;
  3197. HAL_I2C_MemTxCpltCallback(hi2c);
  3198. }
  3199. else
  3200. {
  3201. hi2c->Mode = HAL_I2C_MODE_NONE;
  3202. HAL_I2C_MasterTxCpltCallback(hi2c);
  3203. }
  3204. }
  3205. }
  3206. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3207. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3208. {
  3209. if(hi2c->XferCount == 0U)
  3210. {
  3211. /* Disable BUF interrupt */
  3212. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3213. }
  3214. else
  3215. {
  3216. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3217. {
  3218. if(hi2c->EventCount == 0)
  3219. {
  3220. /* If Memory address size is 8Bit */
  3221. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3222. {
  3223. /* Send Memory Address */
  3224. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3225. hi2c->EventCount += 2;
  3226. }
  3227. /* If Memory address size is 16Bit */
  3228. else
  3229. {
  3230. /* Send MSB of Memory Address */
  3231. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3232. hi2c->EventCount++;
  3233. }
  3234. }
  3235. else if(hi2c->EventCount == 1)
  3236. {
  3237. /* Send LSB of Memory Address */
  3238. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3239. hi2c->EventCount++;
  3240. }
  3241. else if(hi2c->EventCount == 2)
  3242. {
  3243. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3244. {
  3245. /* Generate Restart */
  3246. hi2c->Instance->CR1 |= I2C_CR1_START;
  3247. }
  3248. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3249. {
  3250. /* Write data to DR */
  3251. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3252. hi2c->XferCount--;
  3253. }
  3254. }
  3255. }
  3256. else
  3257. {
  3258. /* Write data to DR */
  3259. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3260. hi2c->XferCount--;
  3261. }
  3262. }
  3263. }
  3264. return HAL_OK;
  3265. }
  3266. /**
  3267. * @brief Handle BTF flag for Master transmitter
  3268. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3269. * the configuration information for I2C module
  3270. * @retval HAL status
  3271. */
  3272. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3273. {
  3274. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3275. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3276. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3277. {
  3278. if(hi2c->XferCount != 0U)
  3279. {
  3280. /* Write data to DR */
  3281. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3282. hi2c->XferCount--;
  3283. }
  3284. else
  3285. {
  3286. /* Call TxCpltCallback() directly if no stop mode is set */
  3287. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3288. {
  3289. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3290. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3291. hi2c->Mode = HAL_I2C_MODE_NONE;
  3292. hi2c->State = HAL_I2C_STATE_READY;
  3293. HAL_I2C_MasterTxCpltCallback(hi2c);
  3294. }
  3295. else /* Generate Stop condition then Call TxCpltCallback() */
  3296. {
  3297. /* Disable EVT, BUF and ERR interrupt */
  3298. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3299. /* Generate Stop */
  3300. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3301. hi2c->PreviousState = I2C_STATE_NONE;
  3302. hi2c->State = HAL_I2C_STATE_READY;
  3303. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3304. {
  3305. hi2c->Mode = HAL_I2C_MODE_NONE;
  3306. HAL_I2C_MemTxCpltCallback(hi2c);
  3307. }
  3308. else
  3309. {
  3310. hi2c->Mode = HAL_I2C_MODE_NONE;
  3311. HAL_I2C_MasterTxCpltCallback(hi2c);
  3312. }
  3313. }
  3314. }
  3315. }
  3316. return HAL_OK;
  3317. }
  3318. /**
  3319. * @brief Handle RXNE flag for Master
  3320. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3321. * the configuration information for I2C module
  3322. * @retval HAL status
  3323. */
  3324. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3325. {
  3326. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3327. {
  3328. uint32_t tmp = 0U;
  3329. tmp = hi2c->XferCount;
  3330. if(tmp > 3U)
  3331. {
  3332. /* Read data from DR */
  3333. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3334. hi2c->XferCount--;
  3335. if(hi2c->XferCount == 3)
  3336. {
  3337. /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
  3338. on BTF subroutine */
  3339. /* Disable BUF interrupt */
  3340. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3341. }
  3342. }
  3343. else if((tmp == 1U) || (tmp == 0U))
  3344. {
  3345. /* Disable Acknowledge */
  3346. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3347. /* Disable EVT, BUF and ERR interrupt */
  3348. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3349. /* Read data from DR */
  3350. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3351. hi2c->XferCount--;
  3352. hi2c->State = HAL_I2C_STATE_READY;
  3353. hi2c->PreviousState = I2C_STATE_NONE;
  3354. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3355. {
  3356. hi2c->Mode = HAL_I2C_MODE_NONE;
  3357. HAL_I2C_MemRxCpltCallback(hi2c);
  3358. }
  3359. else
  3360. {
  3361. hi2c->Mode = HAL_I2C_MODE_NONE;
  3362. HAL_I2C_MasterRxCpltCallback(hi2c);
  3363. }
  3364. }
  3365. }
  3366. return HAL_OK;
  3367. }
  3368. /**
  3369. * @brief Handle BTF flag for Master receiver
  3370. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3371. * the configuration information for I2C module
  3372. * @retval HAL status
  3373. */
  3374. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3375. {
  3376. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3377. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3378. if(hi2c->XferCount == 4U)
  3379. {
  3380. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3381. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3382. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3383. /* Read data from DR */
  3384. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3385. hi2c->XferCount--;
  3386. }
  3387. else if(hi2c->XferCount == 3U)
  3388. {
  3389. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3390. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3391. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3392. /* Disable Acknowledge */
  3393. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3394. /* Read data from DR */
  3395. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3396. hi2c->XferCount--;
  3397. }
  3398. else if(hi2c->XferCount == 2U)
  3399. {
  3400. /* Prepare next transfer or stop current transfer */
  3401. if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
  3402. {
  3403. /* Disable Acknowledge */
  3404. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3405. /* Generate ReStart */
  3406. hi2c->Instance->CR1 |= I2C_CR1_START;
  3407. }
  3408. else
  3409. {
  3410. /* Generate Stop */
  3411. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3412. }
  3413. /* Read data from DR */
  3414. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3415. hi2c->XferCount--;
  3416. /* Read data from DR */
  3417. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3418. hi2c->XferCount--;
  3419. /* Disable EVT and ERR interrupt */
  3420. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3421. hi2c->State = HAL_I2C_STATE_READY;
  3422. hi2c->PreviousState = I2C_STATE_NONE;
  3423. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3424. {
  3425. hi2c->Mode = HAL_I2C_MODE_NONE;
  3426. HAL_I2C_MemRxCpltCallback(hi2c);
  3427. }
  3428. else
  3429. {
  3430. hi2c->Mode = HAL_I2C_MODE_NONE;
  3431. HAL_I2C_MasterRxCpltCallback(hi2c);
  3432. }
  3433. }
  3434. else
  3435. {
  3436. /* Read data from DR */
  3437. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3438. hi2c->XferCount--;
  3439. }
  3440. return HAL_OK;
  3441. }
  3442. /**
  3443. * @brief Handle SB flag for Master
  3444. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3445. * the configuration information for I2C module
  3446. * @retval HAL status
  3447. */
  3448. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3449. {
  3450. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3451. {
  3452. if(hi2c->EventCount == 0U)
  3453. {
  3454. /* Send slave address */
  3455. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3456. }
  3457. else
  3458. {
  3459. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3460. }
  3461. }
  3462. else
  3463. {
  3464. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3465. {
  3466. /* Send slave 7 Bits address */
  3467. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3468. {
  3469. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3470. }
  3471. else
  3472. {
  3473. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3474. }
  3475. }
  3476. else
  3477. {
  3478. if(hi2c->EventCount == 0U)
  3479. {
  3480. /* Send header of slave address */
  3481. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  3482. }
  3483. else if(hi2c->EventCount == 1U)
  3484. {
  3485. /* Send header of slave address */
  3486. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  3487. }
  3488. }
  3489. }
  3490. return HAL_OK;
  3491. }
  3492. /**
  3493. * @brief Handle ADD10 flag for Master
  3494. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3495. * the configuration information for I2C module
  3496. * @retval HAL status
  3497. */
  3498. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3499. {
  3500. /* Send slave address */
  3501. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3502. return HAL_OK;
  3503. }
  3504. /**
  3505. * @brief Handle ADDR flag for Master
  3506. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3507. * the configuration information for I2C module
  3508. * @retval HAL status
  3509. */
  3510. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3511. {
  3512. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3513. uint32_t CurrentMode = hi2c->Mode;
  3514. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3515. uint32_t Prev_State = hi2c->PreviousState;
  3516. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3517. {
  3518. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3519. {
  3520. /* Clear ADDR flag */
  3521. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3522. }
  3523. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  3524. {
  3525. /* Clear ADDR flag */
  3526. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3527. /* Generate Restart */
  3528. hi2c->Instance->CR1 |= I2C_CR1_START;
  3529. hi2c->EventCount++;
  3530. }
  3531. else
  3532. {
  3533. if(hi2c->XferCount == 0U)
  3534. {
  3535. /* Clear ADDR flag */
  3536. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3537. /* Generate Stop */
  3538. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3539. }
  3540. else if(hi2c->XferCount == 1U)
  3541. {
  3542. if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
  3543. {
  3544. /* Disable Acknowledge */
  3545. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3546. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3547. {
  3548. /* Disable Acknowledge */
  3549. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3550. /* Clear ADDR flag */
  3551. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3552. }
  3553. else
  3554. {
  3555. /* Clear ADDR flag */
  3556. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3557. /* Generate Stop */
  3558. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3559. }
  3560. }
  3561. /* Prepare next transfer or stop current transfer */
  3562. else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3563. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  3564. {
  3565. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3566. {
  3567. /* Disable Acknowledge */
  3568. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3569. }
  3570. else
  3571. {
  3572. /* Enable Acknowledge */
  3573. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3574. }
  3575. /* Clear ADDR flag */
  3576. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3577. }
  3578. else
  3579. {
  3580. /* Disable Acknowledge */
  3581. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3582. /* Clear ADDR flag */
  3583. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3584. /* Generate Stop */
  3585. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3586. }
  3587. }
  3588. else if(hi2c->XferCount == 2U)
  3589. {
  3590. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3591. {
  3592. /* Disable Acknowledge */
  3593. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3594. /* Enable Pos */
  3595. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3596. }
  3597. else
  3598. {
  3599. /* Enable Acknowledge */
  3600. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3601. }
  3602. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3603. {
  3604. /* Enable Last DMA bit */
  3605. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3606. }
  3607. /* Clear ADDR flag */
  3608. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3609. }
  3610. else
  3611. {
  3612. /* Enable Acknowledge */
  3613. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3614. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3615. {
  3616. /* Enable Last DMA bit */
  3617. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3618. }
  3619. /* Clear ADDR flag */
  3620. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3621. }
  3622. /* Reset Event counter */
  3623. hi2c->EventCount = 0U;
  3624. }
  3625. }
  3626. else
  3627. {
  3628. /* Clear ADDR flag */
  3629. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3630. }
  3631. return HAL_OK;
  3632. }
  3633. /**
  3634. * @brief Handle TXE flag for Slave
  3635. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3636. * the configuration information for I2C module
  3637. * @retval HAL status
  3638. */
  3639. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3640. {
  3641. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3642. uint32_t CurrentState = hi2c->State;
  3643. if(hi2c->XferCount != 0U)
  3644. {
  3645. /* Write data to DR */
  3646. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3647. hi2c->XferCount--;
  3648. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3649. {
  3650. /* Last Byte is received, disable Interrupt */
  3651. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3652. /* Set state at HAL_I2C_STATE_LISTEN */
  3653. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3654. hi2c->State = HAL_I2C_STATE_LISTEN;
  3655. /* Call the Tx complete callback to inform upper layer of the end of receive process */
  3656. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3657. }
  3658. }
  3659. return HAL_OK;
  3660. }
  3661. /**
  3662. * @brief Handle BTF flag for Slave transmitter
  3663. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3664. * the configuration information for I2C module
  3665. * @retval HAL status
  3666. */
  3667. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3668. {
  3669. if(hi2c->XferCount != 0U)
  3670. {
  3671. /* Write data to DR */
  3672. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3673. hi2c->XferCount--;
  3674. }
  3675. return HAL_OK;
  3676. }
  3677. /**
  3678. * @brief Handle RXNE flag for Slave
  3679. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3680. * the configuration information for I2C module
  3681. * @retval HAL status
  3682. */
  3683. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3684. {
  3685. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3686. uint32_t CurrentState = hi2c->State;
  3687. if(hi2c->XferCount != 0U)
  3688. {
  3689. /* Read data from DR */
  3690. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3691. hi2c->XferCount--;
  3692. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3693. {
  3694. /* Last Byte is received, disable Interrupt */
  3695. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3696. /* Set state at HAL_I2C_STATE_LISTEN */
  3697. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3698. hi2c->State = HAL_I2C_STATE_LISTEN;
  3699. /* Call the Rx complete callback to inform upper layer of the end of receive process */
  3700. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3701. }
  3702. }
  3703. return HAL_OK;
  3704. }
  3705. /**
  3706. * @brief Handle BTF flag for Slave receiver
  3707. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3708. * the configuration information for I2C module
  3709. * @retval HAL status
  3710. */
  3711. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3712. {
  3713. if(hi2c->XferCount != 0U)
  3714. {
  3715. /* Read data from DR */
  3716. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3717. hi2c->XferCount--;
  3718. }
  3719. return HAL_OK;
  3720. }
  3721. /**
  3722. * @brief Handle ADD flag for Slave
  3723. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3724. * the configuration information for I2C module
  3725. * @retval HAL status
  3726. */
  3727. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  3728. {
  3729. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3730. uint16_t SlaveAddrCode = 0U;
  3731. /* Transfer Direction requested by Master */
  3732. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3733. {
  3734. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3735. }
  3736. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3737. {
  3738. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3739. }
  3740. else
  3741. {
  3742. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3743. }
  3744. /* Call Slave Addr callback */
  3745. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3746. return HAL_OK;
  3747. }
  3748. /**
  3749. * @brief Handle STOPF flag for Slave
  3750. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3751. * the configuration information for I2C module
  3752. * @retval HAL status
  3753. */
  3754. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3755. {
  3756. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3757. uint32_t CurrentState = hi2c->State;
  3758. /* Disable EVT, BUF and ERR interrupt */
  3759. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3760. /* Clear STOPF flag */
  3761. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3762. /* Disable Acknowledge */
  3763. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3764. /* If a DMA is ongoing, Update handle size context */
  3765. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3766. {
  3767. if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3768. {
  3769. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
  3770. }
  3771. else
  3772. {
  3773. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3774. }
  3775. }
  3776. /* All data are not transferred, so set error code accordingly */
  3777. if(hi2c->XferCount != 0U)
  3778. {
  3779. /* Store Last receive data if any */
  3780. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3781. {
  3782. /* Read data from DR */
  3783. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3784. hi2c->XferCount--;
  3785. }
  3786. /* Store Last receive data if any */
  3787. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3788. {
  3789. /* Read data from DR */
  3790. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3791. hi2c->XferCount--;
  3792. }
  3793. /* Set ErrorCode corresponding to a Non-Acknowledge */
  3794. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3795. }
  3796. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3797. {
  3798. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3799. I2C_ITError(hi2c);
  3800. }
  3801. else
  3802. {
  3803. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3804. (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3805. {
  3806. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3807. hi2c->PreviousState = I2C_STATE_NONE;
  3808. hi2c->State = HAL_I2C_STATE_READY;
  3809. hi2c->Mode = HAL_I2C_MODE_NONE;
  3810. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3811. HAL_I2C_ListenCpltCallback(hi2c);
  3812. }
  3813. else
  3814. {
  3815. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3816. {
  3817. hi2c->PreviousState = I2C_STATE_NONE;
  3818. hi2c->State = HAL_I2C_STATE_READY;
  3819. hi2c->Mode = HAL_I2C_MODE_NONE;
  3820. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3821. }
  3822. }
  3823. }
  3824. return HAL_OK;
  3825. }
  3826. /**
  3827. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3828. * the configuration information for I2C module
  3829. * @retval HAL status
  3830. */
  3831. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3832. {
  3833. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3834. uint32_t CurrentState = hi2c->State;
  3835. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3836. if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3837. (CurrentState == HAL_I2C_STATE_LISTEN))
  3838. {
  3839. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3840. /* Disable EVT, BUF and ERR interrupt */
  3841. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3842. /* Clear AF flag */
  3843. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3844. /* Disable Acknowledge */
  3845. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3846. hi2c->PreviousState = I2C_STATE_NONE;
  3847. hi2c->State = HAL_I2C_STATE_READY;
  3848. hi2c->Mode = HAL_I2C_MODE_NONE;
  3849. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3850. HAL_I2C_ListenCpltCallback(hi2c);
  3851. }
  3852. else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
  3853. {
  3854. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3855. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3856. hi2c->State = HAL_I2C_STATE_READY;
  3857. hi2c->Mode = HAL_I2C_MODE_NONE;
  3858. /* Disable EVT, BUF and ERR interrupt */
  3859. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3860. /* Clear AF flag */
  3861. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3862. /* Disable Acknowledge */
  3863. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3864. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3865. }
  3866. else
  3867. {
  3868. /* Clear AF flag only */
  3869. /* State Listen, but XferOptions == FIRST or NEXT */
  3870. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3871. }
  3872. return HAL_OK;
  3873. }
  3874. /**
  3875. * @brief I2C interrupts error process
  3876. * @param hi2c I2C handle.
  3877. * @retval None
  3878. */
  3879. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3880. {
  3881. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3882. uint32_t CurrentState = hi2c->State;
  3883. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3884. {
  3885. /* keep HAL_I2C_STATE_LISTEN */
  3886. hi2c->PreviousState = I2C_STATE_NONE;
  3887. hi2c->State = HAL_I2C_STATE_LISTEN;
  3888. }
  3889. else
  3890. {
  3891. /* If state is an abort treatment on going, don't change state */
  3892. /* This change will be do later */
  3893. if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
  3894. {
  3895. hi2c->State = HAL_I2C_STATE_READY;
  3896. }
  3897. hi2c->PreviousState = I2C_STATE_NONE;
  3898. hi2c->Mode = HAL_I2C_MODE_NONE;
  3899. }
  3900. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3901. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3902. /* Abort DMA transfer */
  3903. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3904. {
  3905. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  3906. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  3907. {
  3908. /* Set the DMA Abort callback :
  3909. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3910. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  3911. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  3912. {
  3913. /* Disable I2C peripheral to prevent dummy data in buffer */
  3914. __HAL_I2C_DISABLE(hi2c);
  3915. hi2c->State = HAL_I2C_STATE_READY;
  3916. /* Call Directly XferAbortCallback function in case of error */
  3917. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  3918. }
  3919. }
  3920. else
  3921. {
  3922. /* Set the DMA Abort callback :
  3923. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3924. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  3925. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  3926. {
  3927. /* Store Last receive data if any */
  3928. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3929. {
  3930. /* Read data from DR */
  3931. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3932. }
  3933. /* Disable I2C peripheral to prevent dummy data in buffer */
  3934. __HAL_I2C_DISABLE(hi2c);
  3935. hi2c->State = HAL_I2C_STATE_READY;
  3936. /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  3937. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  3938. }
  3939. }
  3940. }
  3941. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  3942. {
  3943. hi2c->State = HAL_I2C_STATE_READY;
  3944. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3945. /* Store Last receive data if any */
  3946. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3947. {
  3948. /* Read data from DR */
  3949. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3950. }
  3951. /* Disable I2C peripheral to prevent dummy data in buffer */
  3952. __HAL_I2C_DISABLE(hi2c);
  3953. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3954. HAL_I2C_AbortCpltCallback(hi2c);
  3955. }
  3956. else
  3957. {
  3958. /* Store Last receive data if any */
  3959. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3960. {
  3961. /* Read data from DR */
  3962. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3963. }
  3964. /* Call user error callback */
  3965. HAL_I2C_ErrorCallback(hi2c);
  3966. }
  3967. /* STOP Flag is not set after a NACK reception */
  3968. /* So may inform upper layer that listen phase is stopped */
  3969. /* during NACK error treatment */
  3970. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  3971. {
  3972. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3973. hi2c->PreviousState = I2C_STATE_NONE;
  3974. hi2c->State = HAL_I2C_STATE_READY;
  3975. hi2c->Mode = HAL_I2C_MODE_NONE;
  3976. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3977. HAL_I2C_ListenCpltCallback(hi2c);
  3978. }
  3979. }
  3980. /**
  3981. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3982. * the configuration information for I2C module
  3983. * @param DevAddress Target device address The device 7 bits address value
  3984. * in datasheet must be shifted to the left before calling the interface
  3985. * @param Timeout Timeout duration
  3986. * @param Tickstart Tick start value
  3987. * @retval HAL status
  3988. */
  3989. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3990. {
  3991. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3992. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3993. /* Generate Start condition if first transfer */
  3994. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3995. {
  3996. /* Generate Start */
  3997. hi2c->Instance->CR1 |= I2C_CR1_START;
  3998. }
  3999. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  4000. {
  4001. /* Generate ReStart */
  4002. hi2c->Instance->CR1 |= I2C_CR1_START;
  4003. }
  4004. /* Wait until SB flag is set */
  4005. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4006. {
  4007. return HAL_TIMEOUT;
  4008. }
  4009. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4010. {
  4011. /* Send slave address */
  4012. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4013. }
  4014. else
  4015. {
  4016. /* Send header of slave address */
  4017. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4018. /* Wait until ADD10 flag is set */
  4019. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4020. {
  4021. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4022. {
  4023. return HAL_ERROR;
  4024. }
  4025. else
  4026. {
  4027. return HAL_TIMEOUT;
  4028. }
  4029. }
  4030. /* Send slave address */
  4031. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4032. }
  4033. /* Wait until ADDR flag is set */
  4034. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4035. {
  4036. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4037. {
  4038. return HAL_ERROR;
  4039. }
  4040. else
  4041. {
  4042. return HAL_TIMEOUT;
  4043. }
  4044. }
  4045. return HAL_OK;
  4046. }
  4047. /**
  4048. * @brief Master sends target device address for read request.
  4049. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4050. * the configuration information for I2C module
  4051. * @param DevAddress Target device address The device 7 bits address value
  4052. * in datasheet must be shifted to the left before calling the interface
  4053. * @param Timeout Timeout duration
  4054. * @param Tickstart Tick start value
  4055. * @retval HAL status
  4056. */
  4057. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4058. {
  4059. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4060. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4061. /* Enable Acknowledge */
  4062. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4063. /* Generate Start condition if first transfer */
  4064. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4065. {
  4066. /* Generate Start */
  4067. hi2c->Instance->CR1 |= I2C_CR1_START;
  4068. }
  4069. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  4070. {
  4071. /* Generate ReStart */
  4072. hi2c->Instance->CR1 |= I2C_CR1_START;
  4073. }
  4074. /* Wait until SB flag is set */
  4075. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4076. {
  4077. return HAL_TIMEOUT;
  4078. }
  4079. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4080. {
  4081. /* Send slave address */
  4082. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4083. }
  4084. else
  4085. {
  4086. /* Send header of slave address */
  4087. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4088. /* Wait until ADD10 flag is set */
  4089. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4090. {
  4091. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4092. {
  4093. return HAL_ERROR;
  4094. }
  4095. else
  4096. {
  4097. return HAL_TIMEOUT;
  4098. }
  4099. }
  4100. /* Send slave address */
  4101. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4102. /* Wait until ADDR flag is set */
  4103. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4104. {
  4105. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4106. {
  4107. return HAL_ERROR;
  4108. }
  4109. else
  4110. {
  4111. return HAL_TIMEOUT;
  4112. }
  4113. }
  4114. /* Clear ADDR flag */
  4115. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4116. /* Generate Restart */
  4117. hi2c->Instance->CR1 |= I2C_CR1_START;
  4118. /* Wait until SB flag is set */
  4119. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4120. {
  4121. return HAL_TIMEOUT;
  4122. }
  4123. /* Send header of slave address */
  4124. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  4125. }
  4126. /* Wait until ADDR flag is set */
  4127. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4128. {
  4129. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4130. {
  4131. return HAL_ERROR;
  4132. }
  4133. else
  4134. {
  4135. return HAL_TIMEOUT;
  4136. }
  4137. }
  4138. return HAL_OK;
  4139. }
  4140. /**
  4141. * @brief Master sends target device address followed by internal memory address for write request.
  4142. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4143. * the configuration information for I2C module
  4144. * @param DevAddress Target device address
  4145. * @param MemAddress Internal memory address
  4146. * @param MemAddSize Size of internal memory address
  4147. * @param Timeout Timeout duration
  4148. * @param Tickstart Tick start value
  4149. * @retval HAL status
  4150. */
  4151. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4152. {
  4153. /* Generate Start */
  4154. hi2c->Instance->CR1 |= I2C_CR1_START;
  4155. /* Wait until SB flag is set */
  4156. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4157. {
  4158. return HAL_TIMEOUT;
  4159. }
  4160. /* Send slave address */
  4161. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4162. /* Wait until ADDR flag is set */
  4163. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4164. {
  4165. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4166. {
  4167. return HAL_ERROR;
  4168. }
  4169. else
  4170. {
  4171. return HAL_TIMEOUT;
  4172. }
  4173. }
  4174. /* Clear ADDR flag */
  4175. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4176. /* Wait until TXE flag is set */
  4177. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4178. {
  4179. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4180. {
  4181. /* Generate Stop */
  4182. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4183. return HAL_ERROR;
  4184. }
  4185. else
  4186. {
  4187. return HAL_TIMEOUT;
  4188. }
  4189. }
  4190. /* If Memory address size is 8Bit */
  4191. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4192. {
  4193. /* Send Memory Address */
  4194. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4195. }
  4196. /* If Memory address size is 16Bit */
  4197. else
  4198. {
  4199. /* Send MSB of Memory Address */
  4200. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4201. /* Wait until TXE flag is set */
  4202. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4203. {
  4204. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4205. {
  4206. /* Generate Stop */
  4207. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4208. return HAL_ERROR;
  4209. }
  4210. else
  4211. {
  4212. return HAL_TIMEOUT;
  4213. }
  4214. }
  4215. /* Send LSB of Memory Address */
  4216. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4217. }
  4218. return HAL_OK;
  4219. }
  4220. /**
  4221. * @brief Master sends target device address followed by internal memory address for read request.
  4222. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4223. * the configuration information for I2C module
  4224. * @param DevAddress Target device address
  4225. * @param MemAddress Internal memory address
  4226. * @param MemAddSize Size of internal memory address
  4227. * @param Timeout Timeout duration
  4228. * @param Tickstart Tick start value
  4229. * @retval HAL status
  4230. */
  4231. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4232. {
  4233. /* Enable Acknowledge */
  4234. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4235. /* Generate Start */
  4236. hi2c->Instance->CR1 |= I2C_CR1_START;
  4237. /* Wait until SB flag is set */
  4238. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4239. {
  4240. return HAL_TIMEOUT;
  4241. }
  4242. /* Send slave address */
  4243. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4244. /* Wait until ADDR flag is set */
  4245. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4246. {
  4247. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4248. {
  4249. return HAL_ERROR;
  4250. }
  4251. else
  4252. {
  4253. return HAL_TIMEOUT;
  4254. }
  4255. }
  4256. /* Clear ADDR flag */
  4257. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4258. /* Wait until TXE flag is set */
  4259. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4260. {
  4261. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4262. {
  4263. /* Generate Stop */
  4264. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4265. return HAL_ERROR;
  4266. }
  4267. else
  4268. {
  4269. return HAL_TIMEOUT;
  4270. }
  4271. }
  4272. /* If Memory address size is 8Bit */
  4273. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4274. {
  4275. /* Send Memory Address */
  4276. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4277. }
  4278. /* If Memory address size is 16Bit */
  4279. else
  4280. {
  4281. /* Send MSB of Memory Address */
  4282. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4283. /* Wait until TXE flag is set */
  4284. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4285. {
  4286. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4287. {
  4288. /* Generate Stop */
  4289. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4290. return HAL_ERROR;
  4291. }
  4292. else
  4293. {
  4294. return HAL_TIMEOUT;
  4295. }
  4296. }
  4297. /* Send LSB of Memory Address */
  4298. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4299. }
  4300. /* Wait until TXE flag is set */
  4301. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4302. {
  4303. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4304. {
  4305. /* Generate Stop */
  4306. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4307. return HAL_ERROR;
  4308. }
  4309. else
  4310. {
  4311. return HAL_TIMEOUT;
  4312. }
  4313. }
  4314. /* Generate Restart */
  4315. hi2c->Instance->CR1 |= I2C_CR1_START;
  4316. /* Wait until SB flag is set */
  4317. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4318. {
  4319. return HAL_TIMEOUT;
  4320. }
  4321. /* Send slave address */
  4322. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4323. /* Wait until ADDR flag is set */
  4324. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4325. {
  4326. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4327. {
  4328. return HAL_ERROR;
  4329. }
  4330. else
  4331. {
  4332. return HAL_TIMEOUT;
  4333. }
  4334. }
  4335. return HAL_OK;
  4336. }
  4337. /**
  4338. * @brief DMA I2C process complete callback.
  4339. * @param hdma DMA handle
  4340. * @retval None
  4341. */
  4342. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  4343. {
  4344. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4345. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4346. uint32_t CurrentState = hi2c->State;
  4347. uint32_t CurrentMode = hi2c->Mode;
  4348. if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  4349. {
  4350. /* Disable DMA Request */
  4351. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4352. hi2c->XferCount = 0U;
  4353. /* Enable EVT and ERR interrupt */
  4354. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4355. }
  4356. else
  4357. {
  4358. /* Disable Acknowledge */
  4359. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4360. /* Generate Stop */
  4361. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4362. /* Disable Last DMA */
  4363. hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
  4364. /* Disable DMA Request */
  4365. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4366. hi2c->XferCount = 0U;
  4367. /* Check if Errors has been detected during transfer */
  4368. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4369. {
  4370. HAL_I2C_ErrorCallback(hi2c);
  4371. }
  4372. else
  4373. {
  4374. hi2c->State = HAL_I2C_STATE_READY;
  4375. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  4376. {
  4377. hi2c->Mode = HAL_I2C_MODE_NONE;
  4378. HAL_I2C_MemRxCpltCallback(hi2c);
  4379. }
  4380. else
  4381. {
  4382. hi2c->Mode = HAL_I2C_MODE_NONE;
  4383. HAL_I2C_MasterRxCpltCallback(hi2c);
  4384. }
  4385. }
  4386. }
  4387. }
  4388. /**
  4389. * @brief DMA I2C communication error callback.
  4390. * @param hdma DMA handle
  4391. * @retval None
  4392. */
  4393. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  4394. {
  4395. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4396. /* Ignore DMA FIFO error */
  4397. if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
  4398. {
  4399. /* Disable Acknowledge */
  4400. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4401. hi2c->XferCount = 0U;
  4402. hi2c->State = HAL_I2C_STATE_READY;
  4403. hi2c->Mode = HAL_I2C_MODE_NONE;
  4404. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4405. HAL_I2C_ErrorCallback(hi2c);
  4406. }
  4407. }
  4408. /**
  4409. * @brief DMA I2C communication abort callback
  4410. * (To be called at end of DMA Abort procedure).
  4411. * @param hdma DMA handle.
  4412. * @retval None
  4413. */
  4414. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  4415. {
  4416. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4417. /* Disable Acknowledge */
  4418. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4419. hi2c->XferCount = 0U;
  4420. /* Reset XferAbortCallback */
  4421. hi2c->hdmatx->XferAbortCallback = NULL;
  4422. hi2c->hdmarx->XferAbortCallback = NULL;
  4423. /* Check if come from abort from user */
  4424. if(hi2c->State == HAL_I2C_STATE_ABORT)
  4425. {
  4426. hi2c->State = HAL_I2C_STATE_READY;
  4427. hi2c->Mode = HAL_I2C_MODE_NONE;
  4428. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4429. /* Disable I2C peripheral to prevent dummy data in buffer */
  4430. __HAL_I2C_DISABLE(hi2c);
  4431. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4432. HAL_I2C_AbortCpltCallback(hi2c);
  4433. }
  4434. else
  4435. {
  4436. hi2c->State = HAL_I2C_STATE_READY;
  4437. hi2c->Mode = HAL_I2C_MODE_NONE;
  4438. /* Disable I2C peripheral to prevent dummy data in buffer */
  4439. __HAL_I2C_DISABLE(hi2c);
  4440. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4441. HAL_I2C_ErrorCallback(hi2c);
  4442. }
  4443. }
  4444. /**
  4445. * @brief This function handles I2C Communication Timeout.
  4446. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4447. * the configuration information for I2C module
  4448. * @param Flag specifies the I2C flag to check.
  4449. * @param Status The new Flag status (SET or RESET).
  4450. * @param Timeout Timeout duration
  4451. * @param Tickstart Tick start value
  4452. * @retval HAL status
  4453. */
  4454. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4455. {
  4456. /* Wait until flag is set */
  4457. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  4458. {
  4459. /* Check for the Timeout */
  4460. if(Timeout != HAL_MAX_DELAY)
  4461. {
  4462. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4463. {
  4464. hi2c->PreviousState = I2C_STATE_NONE;
  4465. hi2c->State= HAL_I2C_STATE_READY;
  4466. hi2c->Mode = HAL_I2C_MODE_NONE;
  4467. /* Process Unlocked */
  4468. __HAL_UNLOCK(hi2c);
  4469. return HAL_TIMEOUT;
  4470. }
  4471. }
  4472. }
  4473. return HAL_OK;
  4474. }
  4475. /**
  4476. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4477. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4478. * the configuration information for I2C module
  4479. * @param Flag specifies the I2C flag to check.
  4480. * @param Timeout Timeout duration
  4481. * @param Tickstart Tick start value
  4482. * @retval HAL status
  4483. */
  4484. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4485. {
  4486. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4487. {
  4488. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4489. {
  4490. /* Generate Stop */
  4491. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4492. /* Clear AF Flag */
  4493. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4494. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4495. hi2c->PreviousState = I2C_STATE_NONE;
  4496. hi2c->State= HAL_I2C_STATE_READY;
  4497. /* Process Unlocked */
  4498. __HAL_UNLOCK(hi2c);
  4499. return HAL_ERROR;
  4500. }
  4501. /* Check for the Timeout */
  4502. if(Timeout != HAL_MAX_DELAY)
  4503. {
  4504. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4505. {
  4506. hi2c->PreviousState = I2C_STATE_NONE;
  4507. hi2c->State= HAL_I2C_STATE_READY;
  4508. /* Process Unlocked */
  4509. __HAL_UNLOCK(hi2c);
  4510. return HAL_TIMEOUT;
  4511. }
  4512. }
  4513. }
  4514. return HAL_OK;
  4515. }
  4516. /**
  4517. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4518. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4519. * the configuration information for the specified I2C.
  4520. * @param Timeout Timeout duration
  4521. * @param Tickstart Tick start value
  4522. * @retval HAL status
  4523. */
  4524. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4525. {
  4526. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4527. {
  4528. /* Check if a NACK is detected */
  4529. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4530. {
  4531. return HAL_ERROR;
  4532. }
  4533. /* Check for the Timeout */
  4534. if(Timeout != HAL_MAX_DELAY)
  4535. {
  4536. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4537. {
  4538. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4539. hi2c->PreviousState = I2C_STATE_NONE;
  4540. hi2c->State= HAL_I2C_STATE_READY;
  4541. /* Process Unlocked */
  4542. __HAL_UNLOCK(hi2c);
  4543. return HAL_TIMEOUT;
  4544. }
  4545. }
  4546. }
  4547. return HAL_OK;
  4548. }
  4549. /**
  4550. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4551. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4552. * the configuration information for the specified I2C.
  4553. * @param Timeout Timeout duration
  4554. * @param Tickstart Tick start value
  4555. * @retval HAL status
  4556. */
  4557. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4558. {
  4559. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4560. {
  4561. /* Check if a NACK is detected */
  4562. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4563. {
  4564. return HAL_ERROR;
  4565. }
  4566. /* Check for the Timeout */
  4567. if(Timeout != HAL_MAX_DELAY)
  4568. {
  4569. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4570. {
  4571. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4572. hi2c->PreviousState = I2C_STATE_NONE;
  4573. hi2c->State= HAL_I2C_STATE_READY;
  4574. /* Process Unlocked */
  4575. __HAL_UNLOCK(hi2c);
  4576. return HAL_TIMEOUT;
  4577. }
  4578. }
  4579. }
  4580. return HAL_OK;
  4581. }
  4582. /**
  4583. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4584. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4585. * the configuration information for the specified I2C.
  4586. * @param Timeout Timeout duration
  4587. * @param Tickstart Tick start value
  4588. * @retval HAL status
  4589. */
  4590. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4591. {
  4592. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4593. {
  4594. /* Check if a NACK is detected */
  4595. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4596. {
  4597. return HAL_ERROR;
  4598. }
  4599. /* Check for the Timeout */
  4600. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4601. {
  4602. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4603. hi2c->PreviousState = I2C_STATE_NONE;
  4604. hi2c->State= HAL_I2C_STATE_READY;
  4605. /* Process Unlocked */
  4606. __HAL_UNLOCK(hi2c);
  4607. return HAL_TIMEOUT;
  4608. }
  4609. }
  4610. return HAL_OK;
  4611. }
  4612. /**
  4613. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4614. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4615. * the configuration information for the specified I2C.
  4616. * @param Timeout Timeout duration
  4617. * @param Tickstart Tick start value
  4618. * @retval HAL status
  4619. */
  4620. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4621. {
  4622. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4623. {
  4624. /* Check if a STOPF is detected */
  4625. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4626. {
  4627. /* Clear STOP Flag */
  4628. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4629. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4630. hi2c->PreviousState = I2C_STATE_NONE;
  4631. hi2c->State= HAL_I2C_STATE_READY;
  4632. /* Process Unlocked */
  4633. __HAL_UNLOCK(hi2c);
  4634. return HAL_ERROR;
  4635. }
  4636. /* Check for the Timeout */
  4637. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4638. {
  4639. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4640. hi2c->State= HAL_I2C_STATE_READY;
  4641. /* Process Unlocked */
  4642. __HAL_UNLOCK(hi2c);
  4643. return HAL_TIMEOUT;
  4644. }
  4645. }
  4646. return HAL_OK;
  4647. }
  4648. /**
  4649. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4650. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4651. * the configuration information for the specified I2C.
  4652. * @retval HAL status
  4653. */
  4654. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4655. {
  4656. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4657. {
  4658. /* Clear NACKF Flag */
  4659. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4660. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4661. hi2c->PreviousState = I2C_STATE_NONE;
  4662. hi2c->State= HAL_I2C_STATE_READY;
  4663. /* Process Unlocked */
  4664. __HAL_UNLOCK(hi2c);
  4665. return HAL_ERROR;
  4666. }
  4667. return HAL_OK;
  4668. }
  4669. /**
  4670. * @}
  4671. */
  4672. #endif /* HAL_I2C_MODULE_ENABLED */
  4673. /**
  4674. * @}
  4675. */
  4676. /**
  4677. * @}
  4678. */
  4679. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/