stm32f7xx_ll_usart.c 19 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_ll_usart.c
  4. * @author MCD Application Team
  5. * @brief USART LL module driver.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. #if defined(USE_FULL_LL_DRIVER)
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32f7xx_ll_usart.h"
  38. #include "stm32f7xx_ll_rcc.h"
  39. #include "stm32f7xx_ll_bus.h"
  40. #ifdef USE_FULL_ASSERT
  41. #include "stm32_assert.h"
  42. #else
  43. #define assert_param(expr) ((void)0U)
  44. #endif
  45. /** @addtogroup STM32F7xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
  49. /** @addtogroup USART_LL
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /** @addtogroup USART_LL_Private_Constants
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. /* Private macros ------------------------------------------------------------*/
  62. /** @addtogroup USART_LL_Private_Macros
  63. * @{
  64. */
  65. /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  66. * divided by the smallest oversampling used on the USART (i.e. 8) */
  67. #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 27000000U)
  68. /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  69. #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
  70. /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
  71. #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
  72. #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  73. || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  74. || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  75. || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  76. #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  77. || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  78. || ((__VALUE__) == LL_USART_PARITY_ODD))
  79. #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  80. || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  81. || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  82. #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  83. || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  84. #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  85. || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  86. #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  87. || ((__VALUE__) == LL_USART_PHASE_2EDGE))
  88. #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
  89. || ((__VALUE__) == LL_USART_POLARITY_HIGH))
  90. #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
  91. || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
  92. #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
  93. || ((__VALUE__) == LL_USART_STOPBITS_1) \
  94. || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
  95. || ((__VALUE__) == LL_USART_STOPBITS_2))
  96. #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
  97. || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
  98. || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
  99. || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
  100. /**
  101. * @}
  102. */
  103. /* Private function prototypes -----------------------------------------------*/
  104. /* Exported functions --------------------------------------------------------*/
  105. /** @addtogroup USART_LL_Exported_Functions
  106. * @{
  107. */
  108. /** @addtogroup USART_LL_EF_Init
  109. * @{
  110. */
  111. /**
  112. * @brief De-initialize USART registers (Registers restored to their default values).
  113. * @param USARTx USART Instance
  114. * @retval An ErrorStatus enumeration value:
  115. * - SUCCESS: USART registers are de-initialized
  116. * - ERROR: USART registers are not de-initialized
  117. */
  118. ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
  119. {
  120. ErrorStatus status = SUCCESS;
  121. /* Check the parameters */
  122. assert_param(IS_UART_INSTANCE(USARTx));
  123. if (USARTx == USART1)
  124. {
  125. /* Force reset of USART clock */
  126. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
  127. /* Release reset of USART clock */
  128. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
  129. }
  130. else if (USARTx == USART2)
  131. {
  132. /* Force reset of USART clock */
  133. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
  134. /* Release reset of USART clock */
  135. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
  136. }
  137. else if (USARTx == USART3)
  138. {
  139. /* Force reset of USART clock */
  140. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
  141. /* Release reset of USART clock */
  142. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
  143. }
  144. else if (USARTx == USART6)
  145. {
  146. /* Force reset of USART clock */
  147. LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
  148. /* Release reset of USART clock */
  149. LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
  150. }
  151. else if (USARTx == UART4)
  152. {
  153. /* Force reset of UART clock */
  154. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
  155. /* Release reset of UART clock */
  156. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
  157. }
  158. else if (USARTx == UART5)
  159. {
  160. /* Force reset of UART clock */
  161. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
  162. /* Release reset of UART clock */
  163. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
  164. }
  165. else if (USARTx == UART7)
  166. {
  167. /* Force reset of UART clock */
  168. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
  169. /* Release reset of UART clock */
  170. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
  171. }
  172. else if (USARTx == UART8)
  173. {
  174. /* Force reset of UART clock */
  175. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
  176. /* Release reset of UART clock */
  177. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
  178. }
  179. else
  180. {
  181. status = ERROR;
  182. }
  183. return (status);
  184. }
  185. /**
  186. * @brief Initialize USART registers according to the specified
  187. * parameters in USART_InitStruct.
  188. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  189. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  190. * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
  191. * @param USARTx USART Instance
  192. * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
  193. * that contains the configuration information for the specified USART peripheral.
  194. * @retval An ErrorStatus enumeration value:
  195. * - SUCCESS: USART registers are initialized according to USART_InitStruct content
  196. * - ERROR: Problem occurred during USART Registers initialization
  197. */
  198. ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
  199. {
  200. ErrorStatus status = ERROR;
  201. uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
  202. /* Check the parameters */
  203. assert_param(IS_UART_INSTANCE(USARTx));
  204. assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
  205. assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
  206. assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
  207. assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
  208. assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
  209. assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
  210. assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
  211. /* USART needs to be in disabled state, in order to be able to configure some bits in
  212. CRx registers */
  213. if (LL_USART_IsEnabled(USARTx) == 0U)
  214. {
  215. /*---------------------------- USART CR1 Configuration ---------------------
  216. * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
  217. * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
  218. * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
  219. * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
  220. * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
  221. */
  222. MODIFY_REG(USARTx->CR1,
  223. (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
  224. USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
  225. (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
  226. USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
  227. /*---------------------------- USART CR2 Configuration ---------------------
  228. * Configure USARTx CR2 (Stop bits) with parameters:
  229. * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
  230. * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
  231. */
  232. LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
  233. /*---------------------------- USART CR3 Configuration ---------------------
  234. * Configure USARTx CR3 (Hardware Flow Control) with parameters:
  235. * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
  236. */
  237. LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
  238. /*---------------------------- USART BRR Configuration ---------------------
  239. * Retrieve Clock frequency used for USART Peripheral
  240. */
  241. if (USARTx == USART1)
  242. {
  243. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
  244. }
  245. else if (USARTx == USART2)
  246. {
  247. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
  248. }
  249. else if (USARTx == USART3)
  250. {
  251. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
  252. }
  253. else if (USARTx == USART6)
  254. {
  255. periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
  256. }
  257. else if (USARTx == UART4)
  258. {
  259. periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
  260. }
  261. else if (USARTx == UART5)
  262. {
  263. periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
  264. }
  265. else if (USARTx == UART7)
  266. {
  267. periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
  268. }
  269. else if (USARTx == UART8)
  270. {
  271. periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
  272. }
  273. else
  274. {
  275. /* Nothing to do, as error code is already assigned to ERROR value */
  276. }
  277. /* Configure the USART Baud Rate :
  278. - valid baud rate value (different from 0) is required
  279. - Peripheral clock as returned by RCC service, should be valid (different from 0).
  280. */
  281. if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
  282. && (USART_InitStruct->BaudRate != 0U))
  283. {
  284. status = SUCCESS;
  285. LL_USART_SetBaudRate(USARTx,
  286. periphclk,
  287. USART_InitStruct->OverSampling,
  288. USART_InitStruct->BaudRate);
  289. /* Check BRR is greater than or equal to 16d */
  290. assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
  291. /* Check BRR is greater than or equal to 16d */
  292. assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
  293. }
  294. }
  295. /* Endif (=> USART not in Disabled state => return ERROR) */
  296. return (status);
  297. }
  298. /**
  299. * @brief Set each @ref LL_USART_InitTypeDef field to default value.
  300. * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
  301. * whose fields will be set to default values.
  302. * @retval None
  303. */
  304. void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
  305. {
  306. /* Set USART_InitStruct fields to default values */
  307. USART_InitStruct->BaudRate = 9600U;
  308. USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
  309. USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
  310. USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
  311. USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
  312. USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
  313. USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
  314. }
  315. /**
  316. * @brief Initialize USART Clock related settings according to the
  317. * specified parameters in the USART_ClockInitStruct.
  318. * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
  319. * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
  320. * @param USARTx USART Instance
  321. * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
  322. * that contains the Clock configuration information for the specified USART peripheral.
  323. * @retval An ErrorStatus enumeration value:
  324. * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
  325. * - ERROR: Problem occurred during USART Registers initialization
  326. */
  327. ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  328. {
  329. ErrorStatus status = SUCCESS;
  330. /* Check USART Instance and Clock signal output parameters */
  331. assert_param(IS_UART_INSTANCE(USARTx));
  332. assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
  333. /* USART needs to be in disabled state, in order to be able to configure some bits in
  334. CRx registers */
  335. if (LL_USART_IsEnabled(USARTx) == 0U)
  336. {
  337. /*---------------------------- USART CR2 Configuration -----------------------*/
  338. /* If Clock signal has to be output */
  339. if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
  340. {
  341. /* Deactivate Clock signal delivery :
  342. * - Disable Clock Output: USART_CR2_CLKEN cleared
  343. */
  344. LL_USART_DisableSCLKOutput(USARTx);
  345. }
  346. else
  347. {
  348. /* Ensure USART instance is USART capable */
  349. assert_param(IS_USART_INSTANCE(USARTx));
  350. /* Check clock related parameters */
  351. assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
  352. assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
  353. assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
  354. /*---------------------------- USART CR2 Configuration -----------------------
  355. * Configure USARTx CR2 (Clock signal related bits) with parameters:
  356. * - Enable Clock Output: USART_CR2_CLKEN set
  357. * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
  358. * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
  359. * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
  360. */
  361. MODIFY_REG(USARTx->CR2,
  362. USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
  363. USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
  364. USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
  365. }
  366. }
  367. /* Else (USART not in Disabled state => return ERROR */
  368. else
  369. {
  370. status = ERROR;
  371. }
  372. return (status);
  373. }
  374. /**
  375. * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
  376. * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
  377. * whose fields will be set to default values.
  378. * @retval None
  379. */
  380. void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
  381. {
  382. /* Set LL_USART_ClockInitStruct fields with default values */
  383. USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
  384. USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  385. USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  386. USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
  387. }
  388. /**
  389. * @}
  390. */
  391. /**
  392. * @}
  393. */
  394. /**
  395. * @}
  396. */
  397. #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
  398. /**
  399. * @}
  400. */
  401. #endif /* USE_FULL_LL_DRIVER */
  402. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/