stm32l0xx_hal_dma.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771
  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @version V1.7.0
  6. * @date 31-May-2016
  7. * @brief DMA HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Direct Memory Access (DMA) peripheral:
  11. * + Initialization/de-initialization functions
  12. * + I/O operation functions
  13. * + Peripheral State functions
  14. *
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### How to use this driver #####
  19. ==============================================================================
  20. [..]
  21. (#) Enable and configure the peripheral to be connected to the DMA Channel
  22. (except for internal SRAM / FLASH memories: no initialization is
  23. necessary).
  24. (#) For a given Channel, program the required configuration through the following parameters:
  25. Channel request, Transfer Direction, Source and Destination data formats,
  26. Circular, Normal or peripheral flow control mode, Channel Priority level,
  27. Source and Destination Increment mode using HAL_DMA_Init() function.
  28. *** Polling mode IO operation ***
  29. =================================
  30. [..]
  31. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  32. address and destination address and the Length of data to be transferred
  33. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  34. case a fixed Timeout can be configured by User depending from his application.
  35. *** Interrupt mode IO operation ***
  36. ===================================
  37. [..]
  38. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  39. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  40. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  41. Source address and destination address and the Length of data to be transferred. In this
  42. case the DMA interrupt is configured
  43. (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  44. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  45. add his own function by customization of function pointer XferCpltCallback and
  46. XferErrorCallback (i.e a member of DMA handle structure).
  47. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  48. detection.
  49. (#) Use HAL_DMA_Abort() function to abort the current transfer
  50. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  51. @endverbatim
  52. ******************************************************************************
  53. * @attention
  54. *
  55. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  56. *
  57. * Redistribution and use in source and binary forms, with or without modification,
  58. * are permitted provided that the following conditions are met:
  59. * 1. Redistributions of source code must retain the above copyright notice,
  60. * this list of conditions and the following disclaimer.
  61. * 2. Redistributions in binary form must reproduce the above copyright notice,
  62. * this list of conditions and the following disclaimer in the documentation
  63. * and/or other materials provided with the distribution.
  64. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  65. * may be used to endorse or promote products derived from this software
  66. * without specific prior written permission.
  67. *
  68. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  69. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  70. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  71. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  72. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  73. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  74. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  75. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  76. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  77. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78. *
  79. ******************************************************************************
  80. */
  81. /* Includes ------------------------------------------------------------------*/
  82. #include "stm32l0xx_hal.h"
  83. /** @addtogroup STM32L0xx_HAL_Driver
  84. * @{
  85. */
  86. #ifdef HAL_DMA_MODULE_ENABLED
  87. /** @addtogroup DMA DMA
  88. * @brief DMA HAL module driver
  89. * @{
  90. */
  91. /* Private typedef -----------------------------------------------------------*/
  92. /** @addtogroup DMA_Private
  93. *
  94. * @{
  95. */
  96. #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000U) /* 1s */
  97. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  98. /**
  99. * @}
  100. */
  101. /** @addtogroup DMA_Exported_Functions DMA Exported Functions
  102. * @{
  103. */
  104. /** @addtogroup DMA_Exported_Functions_Group1
  105. * @brief Initialization/de-initialization functions
  106. *
  107. @verbatim
  108. ===============================================================================
  109. ##### Initialization and de-initialization functions #####
  110. ===============================================================================
  111. [..] This section provides functions allowing to:
  112. (+) Initialize and configure the DMA
  113. (+) De-Initialize the DMA
  114. @endverbatim
  115. * @{
  116. */
  117. /**
  118. * @brief Initializes the DMA according to the specified
  119. * parameters in the DMA_InitTypeDef and create the associated handle.
  120. * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
  121. * the configuration information for the specified DMA Channel.
  122. * @retval HAL status
  123. */
  124. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  125. {
  126. uint32_t tmp = 0U;
  127. /* Check the DMA peripheral state */
  128. if(hdma == NULL)
  129. {
  130. return HAL_ERROR;
  131. }
  132. /* Check the parameters */
  133. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  134. assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
  135. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  136. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  137. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  138. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  139. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  140. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  141. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  142. if(hdma->State == HAL_DMA_STATE_RESET)
  143. {
  144. /* Allocate lock resource and initialize it */
  145. hdma->Lock = HAL_UNLOCKED;
  146. }
  147. /* Change DMA peripheral state */
  148. hdma->State = HAL_DMA_STATE_BUSY;
  149. /* Get the CR register value */
  150. tmp = hdma->Instance->CCR;
  151. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
  152. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
  153. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
  154. DMA_CCR_DIR));
  155. /* Prepare the DMA Channel configuration */
  156. tmp |= hdma->Init.Direction |
  157. hdma->Init.PeriphInc | hdma->Init.MemInc |
  158. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  159. hdma->Init.Mode | hdma->Init.Priority;
  160. /* Write to DMA Channel CR register */
  161. hdma->Instance->CCR = tmp;
  162. /* Write to DMA channel selection register */
  163. if (hdma->Instance == DMA1_Channel1)
  164. {
  165. /*Reset request selection for DMA1 Channel1*/
  166. DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
  167. /* Configure request selection for DMA1 Channel1 */
  168. DMA1_CSELR->CSELR |= hdma->Init.Request;
  169. }
  170. else if (hdma->Instance == DMA1_Channel2)
  171. {
  172. /*Reset request selection for DMA1 Channel2*/
  173. DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
  174. /* Configure request selection for DMA1 Channel2 */
  175. DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4U);
  176. }
  177. else if (hdma->Instance == DMA1_Channel3)
  178. {
  179. /*Reset request selection for DMA1 Channel3*/
  180. DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
  181. /* Configure request selection for DMA1 Channel3 */
  182. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8U);
  183. }
  184. else if (hdma->Instance == DMA1_Channel4)
  185. {
  186. /*Reset request selection for DMA1 Channel4*/
  187. DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
  188. /* Configure request selection for DMA1 Channel4 */
  189. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12U);
  190. }
  191. else if (hdma->Instance == DMA1_Channel5)
  192. {
  193. /*Reset request selection for DMA1 Channel5*/
  194. DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
  195. /* Configure request selection for DMA1 Channel5 */
  196. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16U);
  197. }
  198. #if !defined (STM32L011xx) && !defined (STM32L021xx)
  199. else if (hdma->Instance == DMA1_Channel6)
  200. {
  201. /*Reset request selection for DMA1 Channel6*/
  202. DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
  203. /* Configure request selection for DMA1 Channel6 */
  204. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20U);
  205. }
  206. else if (hdma->Instance == DMA1_Channel7)
  207. {
  208. /*Reset request selection for DMA1 Channel7*/
  209. DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
  210. /* Configure request selection for DMA1 Channel7 */
  211. DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24U);
  212. }
  213. #endif
  214. /* Initialize the DMA state*/
  215. hdma->State = HAL_DMA_STATE_READY;
  216. return HAL_OK;
  217. }
  218. /**
  219. * @brief DeInitializes the DMA peripheral
  220. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  221. * the configuration information for the specified DMA Channel.
  222. * @retval HAL status
  223. */
  224. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  225. {
  226. /* Check the DMA peripheral state */
  227. if(hdma == NULL)
  228. {
  229. return HAL_ERROR;
  230. }
  231. /* Check the DMA peripheral state */
  232. if(hdma->State == HAL_DMA_STATE_BUSY)
  233. {
  234. return HAL_ERROR;
  235. }
  236. /* Disable the selected DMA Channelx */
  237. __HAL_DMA_DISABLE(hdma);
  238. /* Reset DMA Channel control register */
  239. hdma->Instance->CCR = 0U;
  240. /* Reset DMA Channel Number of Data to Transfer register */
  241. hdma->Instance->CNDTR = 0U;
  242. /* Reset DMA Channel peripheral address register */
  243. hdma->Instance->CPAR = 0U;
  244. /* Reset DMA Channel memory address register */
  245. hdma->Instance->CMAR = 0U;
  246. /* Clear all flags */
  247. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  248. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  249. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  250. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  251. /* Reset DMA channel selection register */
  252. if (hdma->Instance == DMA1_Channel1)
  253. {
  254. /*Reset DMA request*/
  255. DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
  256. }
  257. else if (hdma->Instance == DMA1_Channel2)
  258. {
  259. /*Reset DMA request*/
  260. DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
  261. }
  262. else if (hdma->Instance == DMA1_Channel3)
  263. {
  264. /*Reset DMA request*/
  265. DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
  266. }
  267. else if (hdma->Instance == DMA1_Channel4)
  268. {
  269. /*Reset DMA request*/
  270. DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
  271. }
  272. else if (hdma->Instance == DMA1_Channel5)
  273. {
  274. /*Reset DMA request*/
  275. DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
  276. }
  277. #if !defined (STM32L011xx) && !defined (STM32L021xx)
  278. else if (hdma->Instance == DMA1_Channel6)
  279. {
  280. /*Reset DMA request*/
  281. DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
  282. }
  283. else if (hdma->Instance == DMA1_Channel7)
  284. {
  285. /*Reset DMA request*/
  286. DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
  287. }
  288. #endif
  289. /* Initialise the error code */
  290. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  291. /* Initialize the DMA state */
  292. hdma->State = HAL_DMA_STATE_RESET;
  293. /* Release Lock */
  294. __HAL_UNLOCK(hdma);
  295. return HAL_OK;
  296. }
  297. /**
  298. * @}
  299. */
  300. /** @addtogroup DMA_Exported_Functions_Group2
  301. * @brief I/O operation functions
  302. *
  303. @verbatim
  304. ===============================================================================
  305. ##### IO operation functions #####
  306. ===============================================================================
  307. [..] This section provides functions allowing to:
  308. (+) Configure the source, destination address and data length and Start DMA transfer
  309. (+) Configure the source, destination address and data length and
  310. Start DMA transfer with interrupt
  311. (+) Abort DMA transfer
  312. (+) Poll for transfer complete
  313. (+) Handle DMA interrupt request
  314. @endverbatim
  315. * @{
  316. */
  317. /**
  318. * @brief Starts the DMA Transfer.
  319. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  320. * the configuration information for the specified DMA Channel.
  321. * @param SrcAddress: The source memory Buffer address
  322. * @param DstAddress: The destination memory Buffer address
  323. * @param DataLength: The length of data to be transferred from source to destination
  324. * @retval HAL status
  325. */
  326. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  327. {
  328. /* Process locked */
  329. __HAL_LOCK(hdma);
  330. /* Change DMA peripheral state */
  331. hdma->State = HAL_DMA_STATE_BUSY;
  332. /* Check the parameters */
  333. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  334. /* Disable the peripheral */
  335. __HAL_DMA_DISABLE(hdma);
  336. /* Configure the source, destination address and the data length */
  337. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  338. /* Enable the Peripheral */
  339. __HAL_DMA_ENABLE(hdma);
  340. return HAL_OK;
  341. }
  342. /**
  343. * @brief Start the DMA Transfer with interrupt enabled.
  344. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  345. * the configuration information for the specified DMA Channel.
  346. * @param SrcAddress: The source memory Buffer address
  347. * @param DstAddress: The destination memory Buffer address
  348. * @param DataLength: The length of data to be transferred from source to destination
  349. * @retval HAL status
  350. */
  351. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  352. {
  353. /* Process locked */
  354. __HAL_LOCK(hdma);
  355. /* Change DMA peripheral state */
  356. hdma->State = HAL_DMA_STATE_BUSY;
  357. /* Check the parameters */
  358. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  359. /* Disable the peripheral */
  360. __HAL_DMA_DISABLE(hdma);
  361. /* Configure the source, destination address and the data length */
  362. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  363. /* Enable the transfer complete interrupt */
  364. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
  365. /* Enable the Half transfer complete interrupt */
  366. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
  367. /* Enable the transfer Error interrupt */
  368. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
  369. /* Enable the Peripheral */
  370. __HAL_DMA_ENABLE(hdma);
  371. return HAL_OK;
  372. }
  373. /**
  374. * @brief Aborts the DMA Transfer.
  375. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  376. * the configuration information for the specified DMA Channel.
  377. * @retval HAL status
  378. */
  379. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  380. {
  381. uint32_t tickstart = 0U;
  382. /* Disable the channel */
  383. __HAL_DMA_DISABLE(hdma);
  384. /* Get timeout */
  385. tickstart = HAL_GetTick();
  386. /* Check if the DMA Channel is effectively disabled */
  387. while((hdma->Instance->CCR & DMA_CCR_EN) != 0U)
  388. {
  389. /* Check for the Timeout */
  390. if( (HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
  391. {
  392. /* Update error code */
  393. hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
  394. /* Process Unlocked */
  395. __HAL_UNLOCK(hdma);
  396. /* Change the DMA state */
  397. hdma->State = HAL_DMA_STATE_TIMEOUT;
  398. return HAL_TIMEOUT;
  399. }
  400. }
  401. /* Process Unlocked */
  402. __HAL_UNLOCK(hdma);
  403. /* Change the DMA state*/
  404. hdma->State = HAL_DMA_STATE_READY;
  405. return HAL_OK;
  406. }
  407. /**
  408. * @brief Polling for transfer complete.
  409. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  410. * the configuration information for the specified DMA Channel.
  411. * @param CompleteLevel: Specifies the DMA level complete.
  412. * @param Timeout: Timeout duration.
  413. * @retval HAL status
  414. */
  415. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
  416. {
  417. uint32_t temp;
  418. uint32_t tickstart = 0U;
  419. /* Get the level transfer complete flag */
  420. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  421. {
  422. /* Transfer Complete flag */
  423. temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
  424. }
  425. else
  426. {
  427. /* Half Transfer Complete flag */
  428. temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
  429. }
  430. /* Get timeout */
  431. tickstart = HAL_GetTick();
  432. while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
  433. {
  434. if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
  435. {
  436. /* Clear the transfer error flags */
  437. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  438. /* Update error code */
  439. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
  440. /* Change the DMA state */
  441. hdma->State= HAL_DMA_STATE_ERROR;
  442. /* Process Unlocked */
  443. __HAL_UNLOCK(hdma);
  444. return HAL_ERROR;
  445. }
  446. /* Check for the Timeout */
  447. if(Timeout != HAL_MAX_DELAY)
  448. {
  449. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  450. {
  451. /* Update error code */
  452. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
  453. /* Change the DMA state */
  454. hdma->State= HAL_DMA_STATE_TIMEOUT;
  455. /* Process Unlocked */
  456. __HAL_UNLOCK(hdma);
  457. return HAL_TIMEOUT;
  458. }
  459. }
  460. }
  461. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  462. {
  463. /* Clear the transfer complete flag */
  464. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  465. /* The selected Channelx EN bit is cleared (DMA is disabled and
  466. all transfers are complete) */
  467. hdma->State = HAL_DMA_STATE_READY;
  468. /* Process unlocked */
  469. __HAL_UNLOCK(hdma);
  470. }
  471. else
  472. {
  473. /* Clear the half transfer complete flag */
  474. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  475. /* The selected Channelx EN bit is cleared (DMA is disabled and
  476. all transfers are complete) */
  477. hdma->State = HAL_DMA_STATE_READY_HALF;
  478. /* Process unlocked */
  479. __HAL_UNLOCK(hdma);
  480. }
  481. return HAL_OK;
  482. }
  483. /**
  484. * @brief Handles DMA interrupt request.
  485. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  486. * the configuration information for the specified DMA Channel.
  487. * @retval None
  488. */
  489. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  490. {
  491. /* Transfer Error Interrupt management ***************************************/
  492. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
  493. {
  494. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
  495. {
  496. /* Disable the transfer error interrupt */
  497. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
  498. /* Clear the transfer error flag */
  499. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  500. /* Update error code */
  501. hdma->ErrorCode |= HAL_DMA_ERROR_TE;
  502. /* Change the DMA state */
  503. hdma->State = HAL_DMA_STATE_ERROR;
  504. /* Process Unlocked */
  505. __HAL_UNLOCK(hdma);
  506. if (hdma->XferErrorCallback != NULL)
  507. {
  508. /* Transfer error callback */
  509. hdma->XferErrorCallback(hdma);
  510. }
  511. }
  512. }
  513. /* Half Transfer Complete Interrupt management ******************************/
  514. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
  515. {
  516. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
  517. {
  518. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  519. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  520. {
  521. /* Disable the half transfer interrupt */
  522. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  523. }
  524. /* Clear the half transfer complete flag */
  525. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  526. /* Change DMA peripheral state */
  527. hdma->State = HAL_DMA_STATE_READY_HALF;
  528. if(hdma->XferHalfCpltCallback != NULL)
  529. {
  530. /* Half transfer callback */
  531. hdma->XferHalfCpltCallback(hdma);
  532. }
  533. }
  534. }
  535. /* Transfer Complete Interrupt management ***********************************/
  536. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
  537. {
  538. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
  539. {
  540. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  541. {
  542. /* Disable the transfer complete interrupt */
  543. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
  544. }
  545. /* Clear the transfer complete flag */
  546. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  547. /* Update error code */
  548. hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
  549. /* Change the DMA state */
  550. hdma->State = HAL_DMA_STATE_READY;
  551. /* Process Unlocked */
  552. __HAL_UNLOCK(hdma);
  553. if(hdma->XferCpltCallback != NULL)
  554. {
  555. /* Transfer complete callback */
  556. hdma->XferCpltCallback(hdma);
  557. }
  558. }
  559. }
  560. }
  561. /**
  562. * @}
  563. */
  564. /** @addtogroup DMA_Exported_Functions_Group3
  565. * @brief Peripheral State functions
  566. *
  567. @verbatim
  568. ===============================================================================
  569. ##### Peripheral State functions #####
  570. ===============================================================================
  571. [..]
  572. This subsection provides functions allowing to
  573. (+) Check the DMA state
  574. (+) Get error code
  575. @endverbatim
  576. * @{
  577. */
  578. /**
  579. * @brief Returns the DMA state.
  580. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  581. * the configuration information for the specified DMA Channel.
  582. * @retval HAL state
  583. */
  584. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  585. {
  586. return hdma->State;
  587. }
  588. /**
  589. * @brief Return the DMA error code
  590. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  591. * the configuration information for the specified DMA Channel.
  592. * @retval DMA Error Code
  593. */
  594. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  595. {
  596. return hdma->ErrorCode;
  597. }
  598. /**
  599. * @}
  600. */
  601. /**
  602. * @}
  603. */
  604. /* Private macro -------------------------------------------------------------*/
  605. /* Private variables ---------------------------------------------------------*/
  606. /* Private function prototypes -----------------------------------------------*/
  607. /** @addtogroup DMA_Private
  608. * @{
  609. */
  610. /*
  611. * @brief Sets the DMA Transfer parameter.
  612. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  613. * the configuration information for the specified DMA Channel.
  614. * @param SrcAddress: The source memory Buffer address
  615. * @param DstAddress: The destination memory Buffer address
  616. * @param DataLength: The length of data to be transferred from source to destination
  617. * @retval HAL status
  618. */
  619. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  620. {
  621. /* Configure DMA Channel data length */
  622. hdma->Instance->CNDTR = DataLength;
  623. /* Peripheral to Memory */
  624. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  625. {
  626. /* Configure DMA Channel destination address */
  627. hdma->Instance->CPAR = DstAddress;
  628. /* Configure DMA Channel source address */
  629. hdma->Instance->CMAR = SrcAddress;
  630. }
  631. /* Memory to Peripheral */
  632. else
  633. {
  634. /* Configure DMA Channel source address */
  635. hdma->Instance->CPAR = SrcAddress;
  636. /* Configure DMA Channel destination address */
  637. hdma->Instance->CMAR = DstAddress;
  638. }
  639. }
  640. /**
  641. * @}
  642. */
  643. /**
  644. * @}
  645. */
  646. #endif /* HAL_DMA_MODULE_ENABLED */
  647. /**
  648. * @}
  649. */
  650. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/