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stm32l0xx_hal_spi.c 76 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l0xx_hal_spi.c
  4. * @author MCD Application Team
  5. * @version V1.7.0
  6. * @date 31-May-2016
  7. * @brief SPI HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The SPI HAL driver can be used as follows:
  21. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  22. SPI_HandleTypeDef hspi;
  23. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  24. (##) Enable the SPIx interface clock
  25. (##) SPI pins configuration
  26. (+++) Enable the clock for the SPI GPIOs
  27. (+++) Configure these SPI pins as alternate function push-pull
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the SPIx interrupt priority
  30. (+++) Enable the NVIC SPI IRQ handle
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
  33. (+++) Enable the DMAx clock
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Channel
  36. (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
  38. (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  39. management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  40. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  41. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  42. by calling the customed HAL_SPI_MspInit() API.
  43. [..]
  44. Circular mode restriction:
  45. (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  46. (##) Master 2Lines RxOnly
  47. (##) Master 1Line Rx
  48. (#) The CRC feature is not managed when the DMA circular mode is enabled
  49. (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  50. the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  51. [..]
  52. Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
  53. the following table resume the max SPI frequency reached with data size 8bits/16bits,
  54. according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
  55. DataSize = SPI_DATASIZE_8BIT:
  56. +----------------------------------------------------------------------------------------------+
  57. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  58. | Process | Tranfert mode |---------------------|----------------------|----------------------|
  59. | | | Master | Slave | Master | Slave | Master | Slave |
  60. |==============================================================================================|
  61. | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
  62. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  63. | / | Interrupt | Fpclk/64 | Fpclk/64 | NA | NA | NA | NA |
  64. | R |----------------|----------|----------|-----------|----------|-----------|----------|
  65. | X | DMA | Fpclk/2 | Fpclk/4 | NA | NA | NA | NA |
  66. |=========|================|==========|==========|===========|==========|===========|==========|
  67. | | Polling | Fpclk/2 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/8 |
  68. | |----------------|----------|----------|-----------|----------|-----------|----------|
  69. | R | Interrupt | Fpclk/64 | Fpclk/32 | Fpclk/32 | Fpclk/16 | Fpclk/32 | Fpclk/32 |
  70. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  71. | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/16 | Fpclk/2 | Fpclk/16 | Fpclk/2 |
  72. |=========|================|==========|==========|===========|==========|===========|==========|
  73. | | Polling | Fpclk/8 | Fpclk/8 | NA | NA | Fpclk/4 | Fpclk/16 |
  74. | |----------------|----------|----------|-----------|----------|-----------|----------|
  75. | T | Interrupt | Fpclk/8 | Fpclk/32 | NA | NA | Fpclk/8 | Fpclk/16 |
  76. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  77. | | DMA | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/2 |
  78. +----------------------------------------------------------------------------------------------+
  79. DataSize = SPI_DATASIZE_16BIT:
  80. +----------------------------------------------------------------------------------------------+
  81. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  82. | Process | Tranfert mode |---------------------|----------------------|----------------------|
  83. | | | Master | Slave | Master | Slave | Master | Slave |
  84. |==============================================================================================|
  85. | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
  86. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  87. | / | Interrupt | Fpclk/32 | Fpclk/16 | NA | NA | NA | NA |
  88. | R |----------------|----------|----------|-----------|----------|-----------|----------|
  89. | X | DMA | Fpclk/2 | Fpclk/4 | NA | NA | NA | NA |
  90. |=========|================|==========|==========|===========|==========|===========|==========|
  91. | | Polling | Fpclk/2 | Fpclk/4 | Fpclk/8 | Fpclk/4 | Fpclk/2 | Fpclk/8 |
  92. | |----------------|----------|----------|-----------|----------|-----------|----------|
  93. | R | Interrupt | Fpclk/32 | Fpclk/8 | Fpclk/16 | Fpclk/16 | Fpclk/16 | Fpclk/8 |
  94. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  95. | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/8 | Fpclk/2 | Fpclk/8 | Fpclk/2 |
  96. |=========|================|==========|==========|===========|==========|===========|==========|
  97. | | Polling | Fpclk/4 | Fpclk/4 | NA | NA | Fpclk/4 | Fpclk/8 |
  98. | |----------------|----------|----------|-----------|----------|-----------|----------|
  99. | T | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | Fpclk/8 | Fpclk/8 |
  100. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  101. | | DMA | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/2 |
  102. +----------------------------------------------------------------------------------------------+
  103. @note The max SPI frequency depend on SPI data size (8bits, 16bits),
  104. SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
  105. @note
  106. (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
  107. (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
  108. (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
  109. @endverbatim
  110. ******************************************************************************
  111. * @attention
  112. *
  113. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  114. *
  115. * Redistribution and use in source and binary forms, with or without modification,
  116. * are permitted provided that the following conditions are met:
  117. * 1. Redistributions of source code must retain the above copyright notice,
  118. * this list of conditions and the following disclaimer.
  119. * 2. Redistributions in binary form must reproduce the above copyright notice,
  120. * this list of conditions and the following disclaimer in the documentation
  121. * and/or other materials provided with the distribution.
  122. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  123. * may be used to endorse or promote products derived from this software
  124. * without specific prior written permission.
  125. *
  126. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  127. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  128. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  129. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  130. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  131. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  132. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  133. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  134. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  135. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  136. *
  137. ******************************************************************************
  138. */
  139. /* Includes ------------------------------------------------------------------*/
  140. #include "stm32l0xx_hal.h"
  141. /** @addtogroup STM32L0xx_HAL_Driver
  142. * @{
  143. */
  144. #ifdef HAL_SPI_MODULE_ENABLED
  145. /** @addtogroup SPI
  146. * @brief SPI HAL module driver
  147. * @{
  148. */
  149. /* Private typedef -----------------------------------------------------------*/
  150. /* Private define ------------------------------------------------------------*/
  151. /** @addtogroup SPI_Private
  152. * @{
  153. */
  154. #define SPI_TIMEOUT_VALUE 10U
  155. /* Private macro -------------------------------------------------------------*/
  156. /* Private variables ---------------------------------------------------------*/
  157. /* Private function prototypes -----------------------------------------------*/
  158. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  159. static void SPI_TxISR(SPI_HandleTypeDef *hspi);
  160. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  161. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
  162. static void SPI_RxISR(SPI_HandleTypeDef *hspi);
  163. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  164. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  165. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  166. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
  167. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
  168. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  169. static void SPI_DMAError(DMA_HandleTypeDef *hdma);
  170. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  171. /**
  172. * @}
  173. */
  174. /* Exported functions ---------------------------------------------------------*/
  175. /** @addtogroup SPI_Exported_Functions SPI Exported Functions
  176. * @{
  177. */
  178. /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  179. * @brief Initialization and Configuration functions
  180. *
  181. @verbatim
  182. ===============================================================================
  183. ##### Initialization and de-initialization functions #####
  184. ===============================================================================
  185. [..] This subsection provides a set of functions allowing to initialize and
  186. de-initialiaze the SPIx peripheral:
  187. (+) User must implement HAL_SPI_MspInit() function in which he configures
  188. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  189. (+) Call the function HAL_SPI_Init() to configure the selected device with
  190. the selected configuration:
  191. (++) Mode
  192. (++) Direction
  193. (++) Data Size
  194. (++) Clock Polarity and Phase
  195. (++) NSS Management
  196. (++) BaudRate Prescaler
  197. (++) FirstBit
  198. (++) TIMode
  199. (++) CRC Calculation
  200. (++) CRC Polynomial if CRC enabled
  201. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  202. of the selected SPIx periperal.
  203. @endverbatim
  204. * @{
  205. */
  206. /**
  207. * @brief Initializes the SPI according to the specified parameters
  208. * in the SPI_InitTypeDef and create the associated handle.
  209. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  210. * the configuration information for SPI module.
  211. * @retval HAL status
  212. */
  213. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  214. {
  215. /* Check the SPI handle allocation */
  216. if(hspi == NULL)
  217. {
  218. return HAL_ERROR;
  219. }
  220. /* Check the parameters */
  221. assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  222. assert_param(IS_SPI_MODE(hspi->Init.Mode));
  223. assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
  224. assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  225. assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  226. assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  227. assert_param(IS_SPI_NSS(hspi->Init.NSS));
  228. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  229. assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  230. assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  231. assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
  232. assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  233. if(hspi->State == HAL_SPI_STATE_RESET)
  234. {
  235. /* Allocate lock resource and initialize it */
  236. hspi->Lock = HAL_UNLOCKED;
  237. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  238. HAL_SPI_MspInit(hspi);
  239. }
  240. hspi->State = HAL_SPI_STATE_BUSY;
  241. /* Disble the selected SPI peripheral */
  242. __HAL_SPI_DISABLE(hspi);
  243. /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  244. /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  245. Communication speed, First bit and CRC calculation state */
  246. WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
  247. hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
  248. hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
  249. /* Configure : NSS management */
  250. WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
  251. /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
  252. /* Configure : CRC Polynomial */
  253. WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
  254. #if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
  255. /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  256. CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  257. #endif
  258. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  259. hspi->State = HAL_SPI_STATE_READY;
  260. return HAL_OK;
  261. }
  262. /**
  263. * @brief DeInitializes the SPI peripheral
  264. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  265. * the configuration information for SPI module.
  266. * @retval HAL status
  267. */
  268. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  269. {
  270. /* Check the SPI handle allocation */
  271. if(hspi == NULL)
  272. {
  273. return HAL_ERROR;
  274. }
  275. hspi->State = HAL_SPI_STATE_BUSY;
  276. /* Disable the SPI Peripheral Clock */
  277. __HAL_SPI_DISABLE(hspi);
  278. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  279. HAL_SPI_MspDeInit(hspi);
  280. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  281. hspi->State = HAL_SPI_STATE_RESET;
  282. /* Release Lock */
  283. __HAL_UNLOCK(hspi);
  284. return HAL_OK;
  285. }
  286. /**
  287. * @brief SPI MSP Init
  288. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  289. * the configuration information for SPI module.
  290. * @retval None
  291. */
  292. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  293. {
  294. /* Prevent unused argument(s) compilation warning */
  295. UNUSED(hspi);
  296. /* NOTE : This function Should not be modified, when the callback is needed,
  297. the HAL_SPI_MspInit could be implenetd in the user file
  298. */
  299. }
  300. /**
  301. * @brief SPI MSP DeInit
  302. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  303. * the configuration information for SPI module.
  304. * @retval None
  305. */
  306. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  307. {
  308. /* Prevent unused argument(s) compilation warning */
  309. UNUSED(hspi);
  310. /* NOTE : This function Should not be modified, when the callback is needed,
  311. the HAL_SPI_MspDeInit could be implenetd in the user file
  312. */
  313. }
  314. /**
  315. * @}
  316. */
  317. /** @addtogroup SPI_Exported_Functions_Group2
  318. * @brief Data transfers functions
  319. *
  320. @verbatim
  321. ==============================================================================
  322. ##### IO operation functions #####
  323. ===============================================================================
  324. This subsection provides a set of functions allowing to manage the SPI
  325. data transfers.
  326. [..] The SPI supports master and slave mode :
  327. (#) There are two modes of transfer:
  328. (++) Blocking mode: The communication is performed in polling mode.
  329. The HAL status of all data processing is returned by the same function
  330. after finishing transfer.
  331. (++) No-Blocking mode: The communication is performed using Interrupts
  332. or DMA, These APIs return the HAL status.
  333. The end of the data processing will be indicated through the
  334. dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  335. using DMA mode.
  336. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  337. will be executed respectivelly at the end of the transmit or Receive process
  338. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  339. (#) Blocking mode APIs are :
  340. (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
  341. (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
  342. (++) HAL_SPI_TransmitReceive() in full duplex mode
  343. (#) Non Blocking mode API's with Interrupt are :
  344. (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
  345. (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
  346. (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
  347. (++) HAL_SPI_IRQHandler()
  348. (#) Non Blocking mode functions with DMA are :
  349. (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
  350. (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
  351. (++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
  352. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  353. (++) HAL_SPI_TxCpltCallback()
  354. (++) HAL_SPI_RxCpltCallback()
  355. (++) HAL_SPI_TxRxCpltCallback()
  356. (++) HAL_SPI_TxHalfCpltCallback()
  357. (++) HAL_SPI_RxHalfCpltCallback()
  358. (++) HAL_SPI_TxRxHalfCpltCallback()
  359. (++) HAL_SPI_ErrorCallback()
  360. @endverbatim
  361. * @{
  362. */
  363. /**
  364. * @brief Transmit an amount of data in blocking mode
  365. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  366. * the configuration information for SPI module.
  367. * @param pData: pointer to data buffer
  368. * @param Size: amount of data to be sent
  369. * @param Timeout: Timeout duration
  370. * @retval HAL status
  371. */
  372. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  373. {
  374. if(hspi->State == HAL_SPI_STATE_READY)
  375. {
  376. if((pData == NULL ) || (Size == 0U))
  377. {
  378. return HAL_ERROR;
  379. }
  380. /* Check the parameters */
  381. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  382. /* Process Locked */
  383. __HAL_LOCK(hspi);
  384. /* Configure communication */
  385. hspi->State = HAL_SPI_STATE_BUSY_TX;
  386. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  387. hspi->pTxBuffPtr = pData;
  388. hspi->TxXferSize = Size;
  389. hspi->TxXferCount = Size;
  390. /*Init field not used in handle to zero */
  391. hspi->TxISR = 0U;
  392. hspi->RxISR = 0U;
  393. hspi->pRxBuffPtr = NULL;
  394. hspi->RxXferSize = 0U;
  395. hspi->RxXferCount = 0U;
  396. /* Reset CRC Calculation */
  397. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  398. {
  399. SPI_RESET_CRC(hspi);
  400. }
  401. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  402. {
  403. /* Configure communication direction : 1Line */
  404. SPI_1LINE_TX(hspi);
  405. }
  406. /* Check if the SPI is already enabled */
  407. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  408. {
  409. /* Enable SPI peripheral */
  410. __HAL_SPI_ENABLE(hspi);
  411. }
  412. /* Transmit data in 8 Bit mode */
  413. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  414. {
  415. if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01U))
  416. {
  417. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  418. hspi->TxXferCount--;
  419. }
  420. while(hspi->TxXferCount > 0U)
  421. {
  422. /* Wait until TXE flag is set to send data */
  423. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  424. {
  425. return HAL_TIMEOUT;
  426. }
  427. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  428. hspi->TxXferCount--;
  429. }
  430. /* Enable CRC Transmission */
  431. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  432. {
  433. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  434. }
  435. }
  436. /* Transmit data in 16 Bit mode */
  437. else
  438. {
  439. if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
  440. {
  441. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  442. hspi->pTxBuffPtr+=2U;
  443. hspi->TxXferCount--;
  444. }
  445. while(hspi->TxXferCount > 0U)
  446. {
  447. /* Wait until TXE flag is set to send data */
  448. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  449. {
  450. return HAL_TIMEOUT;
  451. }
  452. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  453. hspi->pTxBuffPtr+=2U;
  454. hspi->TxXferCount--;
  455. }
  456. /* Enable CRC Transmission */
  457. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  458. {
  459. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  460. }
  461. }
  462. /* Wait until TXE flag is set to send data */
  463. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  464. {
  465. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  466. return HAL_TIMEOUT;
  467. }
  468. /* Wait until Busy flag is reset before disabling SPI */
  469. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  470. {
  471. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  472. return HAL_TIMEOUT;
  473. }
  474. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  475. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  476. {
  477. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  478. }
  479. hspi->State = HAL_SPI_STATE_READY;
  480. /* Process Unlocked */
  481. __HAL_UNLOCK(hspi);
  482. return HAL_OK;
  483. }
  484. else
  485. {
  486. return HAL_BUSY;
  487. }
  488. }
  489. /**
  490. * @brief Receive an amount of data in blocking mode
  491. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  492. * the configuration information for SPI module.
  493. * @param pData: pointer to data buffer
  494. * @param Size: amount of data to be sent
  495. * @param Timeout: Timeout duration
  496. * @retval HAL status
  497. */
  498. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  499. {
  500. __IO uint16_t tmpreg = 0U;
  501. if(hspi->State == HAL_SPI_STATE_READY)
  502. {
  503. if((pData == NULL ) || (Size == 0U))
  504. {
  505. return HAL_ERROR;
  506. }
  507. /* Process Locked */
  508. __HAL_LOCK(hspi);
  509. /* Configure communication */
  510. hspi->State = HAL_SPI_STATE_BUSY_RX;
  511. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  512. hspi->pRxBuffPtr = pData;
  513. hspi->RxXferSize = Size;
  514. hspi->RxXferCount = Size;
  515. /*Init field not used in handle to zero */
  516. hspi->RxISR = 0U;
  517. hspi->TxISR = 0U;
  518. hspi->pTxBuffPtr = NULL;
  519. hspi->TxXferSize = 0U;
  520. hspi->TxXferCount = 0U;
  521. /* Configure communication direction : 1Line */
  522. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  523. {
  524. SPI_1LINE_RX(hspi);
  525. }
  526. /* Reset CRC Calculation */
  527. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  528. {
  529. SPI_RESET_CRC(hspi);
  530. }
  531. if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  532. {
  533. /* Process Unlocked */
  534. __HAL_UNLOCK(hspi);
  535. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  536. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  537. }
  538. /* Check if the SPI is already enabled */
  539. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  540. {
  541. /* Enable SPI peripheral */
  542. __HAL_SPI_ENABLE(hspi);
  543. }
  544. /* Receive data in 8 Bit mode */
  545. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  546. {
  547. while(hspi->RxXferCount > 1U)
  548. {
  549. /* Wait until RXNE flag is set */
  550. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  551. {
  552. return HAL_TIMEOUT;
  553. }
  554. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  555. hspi->RxXferCount--;
  556. }
  557. /* Enable CRC Reception */
  558. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  559. {
  560. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  561. }
  562. }
  563. /* Receive data in 16 Bit mode */
  564. else
  565. {
  566. while(hspi->RxXferCount > 1U)
  567. {
  568. /* Wait until RXNE flag is set to read data */
  569. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  570. {
  571. return HAL_TIMEOUT;
  572. }
  573. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  574. hspi->pRxBuffPtr+=2U;
  575. hspi->RxXferCount--;
  576. }
  577. /* Enable CRC Reception */
  578. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  579. {
  580. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  581. }
  582. }
  583. /* Wait until RXNE flag is set */
  584. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  585. {
  586. return HAL_TIMEOUT;
  587. }
  588. /* Receive last data in 8 Bit mode */
  589. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  590. {
  591. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  592. }
  593. /* Receive last data in 16 Bit mode */
  594. else
  595. {
  596. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  597. hspi->pRxBuffPtr+=2U;
  598. }
  599. hspi->RxXferCount--;
  600. /* If CRC computation is enabled */
  601. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  602. {
  603. /* Wait until RXNE flag is set: CRC Received */
  604. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  605. {
  606. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  607. return HAL_TIMEOUT;
  608. }
  609. /* Read CRC to clear RXNE flag */
  610. tmpreg = hspi->Instance->DR;
  611. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
  612. }
  613. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  614. {
  615. /* Disable SPI peripheral */
  616. __HAL_SPI_DISABLE(hspi);
  617. }
  618. hspi->State = HAL_SPI_STATE_READY;
  619. /* Check if CRC error occurred */
  620. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  621. {
  622. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  623. /* Reset CRC Calculation */
  624. SPI_RESET_CRC(hspi);
  625. /* Process Unlocked */
  626. __HAL_UNLOCK(hspi);
  627. return HAL_ERROR;
  628. }
  629. /* Process Unlocked */
  630. __HAL_UNLOCK(hspi);
  631. return HAL_OK;
  632. }
  633. else
  634. {
  635. return HAL_BUSY;
  636. }
  637. }
  638. /**
  639. * @brief Transmit and Receive an amount of data in blocking mode
  640. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  641. * the configuration information for SPI module.
  642. * @param pTxData: pointer to transmission data buffer
  643. * @param pRxData: pointer to reception data buffer to be
  644. * @param Size: amount of data to be sent
  645. * @param Timeout: Timeout duration
  646. * @retval HAL status
  647. */
  648. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  649. {
  650. __IO uint16_t tmpreg = 0U;
  651. if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
  652. {
  653. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U))
  654. {
  655. return HAL_ERROR;
  656. }
  657. /* Check the parameters */
  658. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  659. /* Process Locked */
  660. __HAL_LOCK(hspi);
  661. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  662. if(hspi->State == HAL_SPI_STATE_READY)
  663. {
  664. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  665. }
  666. /* Configure communication */
  667. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  668. hspi->pRxBuffPtr = pRxData;
  669. hspi->RxXferSize = Size;
  670. hspi->RxXferCount = Size;
  671. hspi->pTxBuffPtr = pTxData;
  672. hspi->TxXferSize = Size;
  673. hspi->TxXferCount = Size;
  674. /*Init field not used in handle to zero */
  675. hspi->RxISR = 0U;
  676. hspi->TxISR = 0U;
  677. /* Reset CRC Calculation */
  678. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  679. {
  680. SPI_RESET_CRC(hspi);
  681. }
  682. /* Check if the SPI is already enabled */
  683. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  684. {
  685. /* Enable SPI peripheral */
  686. __HAL_SPI_ENABLE(hspi);
  687. }
  688. /* Transmit and Receive data in 16 Bit mode */
  689. if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  690. {
  691. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01U)))
  692. {
  693. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  694. hspi->pTxBuffPtr+=2U;
  695. hspi->TxXferCount--;
  696. }
  697. if(hspi->TxXferCount == 0U)
  698. {
  699. /* Enable CRC Transmission */
  700. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  701. {
  702. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  703. }
  704. /* Wait until RXNE flag is set */
  705. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  706. {
  707. return HAL_TIMEOUT;
  708. }
  709. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  710. hspi->pRxBuffPtr+=2U;
  711. hspi->RxXferCount--;
  712. }
  713. else
  714. {
  715. while(hspi->TxXferCount > 0U)
  716. {
  717. /* Wait until TXE flag is set to send data */
  718. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  719. {
  720. return HAL_TIMEOUT;
  721. }
  722. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  723. hspi->pTxBuffPtr+=2U;
  724. hspi->TxXferCount--;
  725. /* Enable CRC Transmission */
  726. if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  727. {
  728. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  729. }
  730. /* Wait until RXNE flag is set */
  731. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  732. {
  733. return HAL_TIMEOUT;
  734. }
  735. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  736. hspi->pRxBuffPtr+=2U;
  737. hspi->RxXferCount--;
  738. }
  739. /* Receive the last byte */
  740. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  741. {
  742. /* Wait until RXNE flag is set */
  743. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  744. {
  745. return HAL_TIMEOUT;
  746. }
  747. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  748. hspi->pRxBuffPtr+=2U;
  749. hspi->RxXferCount--;
  750. }
  751. }
  752. }
  753. /* Transmit and Receive data in 8 Bit mode */
  754. else
  755. {
  756. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01U)))
  757. {
  758. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  759. hspi->TxXferCount--;
  760. }
  761. if(hspi->TxXferCount == 0U)
  762. {
  763. /* Enable CRC Transmission */
  764. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  765. {
  766. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  767. }
  768. /* Wait until RXNE flag is set */
  769. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  770. {
  771. return HAL_TIMEOUT;
  772. }
  773. (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  774. hspi->RxXferCount--;
  775. }
  776. else
  777. {
  778. while(hspi->TxXferCount > 0U)
  779. {
  780. /* Wait until TXE flag is set to send data */
  781. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  782. {
  783. return HAL_TIMEOUT;
  784. }
  785. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  786. hspi->TxXferCount--;
  787. /* Enable CRC Transmission */
  788. if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  789. {
  790. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  791. }
  792. /* Wait until RXNE flag is set */
  793. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  794. {
  795. return HAL_TIMEOUT;
  796. }
  797. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  798. hspi->RxXferCount--;
  799. }
  800. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  801. {
  802. /* Wait until RXNE flag is set */
  803. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  804. {
  805. return HAL_TIMEOUT;
  806. }
  807. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  808. hspi->RxXferCount--;
  809. }
  810. }
  811. }
  812. /* Read CRC from DR to close CRC calculation process */
  813. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  814. {
  815. /* Wait until RXNE flag is set */
  816. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  817. {
  818. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  819. return HAL_TIMEOUT;
  820. }
  821. /* Read CRC */
  822. tmpreg = hspi->Instance->DR;
  823. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
  824. }
  825. /* Wait until Busy flag is reset before disabling SPI */
  826. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  827. {
  828. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  829. return HAL_TIMEOUT;
  830. }
  831. hspi->State = HAL_SPI_STATE_READY;
  832. /* Check if CRC error occurred */
  833. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  834. {
  835. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  836. SPI_RESET_CRC(hspi);
  837. /* Process Unlocked */
  838. __HAL_UNLOCK(hspi);
  839. return HAL_ERROR;
  840. }
  841. /* Process Unlocked */
  842. __HAL_UNLOCK(hspi);
  843. return HAL_OK;
  844. }
  845. else
  846. {
  847. return HAL_BUSY;
  848. }
  849. }
  850. /**
  851. * @brief Transmit an amount of data in no-blocking mode with Interrupt
  852. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  853. * the configuration information for SPI module.
  854. * @param pData: pointer to data buffer
  855. * @param Size: amount of data to be sent
  856. * @retval HAL status
  857. */
  858. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  859. {
  860. if(hspi->State == HAL_SPI_STATE_READY)
  861. {
  862. if((pData == NULL) || (Size == 0U))
  863. {
  864. return HAL_ERROR;
  865. }
  866. /* Check the parameters */
  867. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  868. /* Process Locked */
  869. __HAL_LOCK(hspi);
  870. /* Configure communication */
  871. hspi->State = HAL_SPI_STATE_BUSY_TX;
  872. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  873. hspi->TxISR = &SPI_TxISR;
  874. hspi->pTxBuffPtr = pData;
  875. hspi->TxXferSize = Size;
  876. hspi->TxXferCount = Size;
  877. /*Init field not used in handle to zero */
  878. hspi->RxISR = 0U;
  879. hspi->pRxBuffPtr = NULL;
  880. hspi->RxXferSize = 0U;
  881. hspi->RxXferCount = 0U;
  882. /* Configure communication direction : 1Line */
  883. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  884. {
  885. SPI_1LINE_TX(hspi);
  886. }
  887. /* Reset CRC Calculation */
  888. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  889. {
  890. SPI_RESET_CRC(hspi);
  891. }
  892. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  893. {
  894. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  895. }
  896. else
  897. {
  898. /* Enable TXE and ERR interrupt */
  899. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  900. }
  901. /* Process Unlocked */
  902. __HAL_UNLOCK(hspi);
  903. /* Check if the SPI is already enabled */
  904. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  905. {
  906. /* Enable SPI peripheral */
  907. __HAL_SPI_ENABLE(hspi);
  908. }
  909. return HAL_OK;
  910. }
  911. else
  912. {
  913. return HAL_BUSY;
  914. }
  915. }
  916. /**
  917. * @brief Receive an amount of data in no-blocking mode with Interrupt
  918. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  919. * the configuration information for SPI module.
  920. * @param pData: pointer to data buffer
  921. * @param Size: amount of data to be sent
  922. * @retval HAL status
  923. */
  924. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  925. {
  926. if(hspi->State == HAL_SPI_STATE_READY)
  927. {
  928. if((pData == NULL) || (Size == 0U))
  929. {
  930. return HAL_ERROR;
  931. }
  932. /* Process Locked */
  933. __HAL_LOCK(hspi);
  934. /* Configure communication */
  935. hspi->State = HAL_SPI_STATE_BUSY_RX;
  936. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  937. hspi->RxISR = &SPI_RxISR;
  938. hspi->pRxBuffPtr = pData;
  939. hspi->RxXferSize = Size;
  940. hspi->RxXferCount = Size ;
  941. /*Init field not used in handle to zero */
  942. hspi->TxISR = 0U;
  943. hspi->pTxBuffPtr = NULL;
  944. hspi->TxXferSize = 0U;
  945. hspi->TxXferCount = 0U;
  946. /* Configure communication direction : 1Line */
  947. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  948. {
  949. SPI_1LINE_RX(hspi);
  950. }
  951. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  952. {
  953. /* Process Unlocked */
  954. __HAL_UNLOCK(hspi);
  955. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  956. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  957. }
  958. /* Reset CRC Calculation */
  959. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  960. {
  961. SPI_RESET_CRC(hspi);
  962. }
  963. /* Enable TXE and ERR interrupt */
  964. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  965. /* Process Unlocked */
  966. __HAL_UNLOCK(hspi);
  967. /* Note : The SPI must be enabled after unlocking current process
  968. to avoid the risk of SPI interrupt handle execution before current
  969. process unlock */
  970. /* Check if the SPI is already enabled */
  971. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  972. {
  973. /* Enable SPI peripheral */
  974. __HAL_SPI_ENABLE(hspi);
  975. }
  976. return HAL_OK;
  977. }
  978. else
  979. {
  980. return HAL_BUSY;
  981. }
  982. }
  983. /**
  984. * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
  985. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  986. * the configuration information for SPI module.
  987. * @param pTxData: pointer to transmission data buffer
  988. * @param pRxData: pointer to reception data buffer to be
  989. * @param Size: amount of data to be sent
  990. * @retval HAL status
  991. */
  992. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  993. {
  994. if((hspi->State == HAL_SPI_STATE_READY) || \
  995. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  996. {
  997. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U))
  998. {
  999. return HAL_ERROR;
  1000. }
  1001. /* Check the parameters */
  1002. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1003. /* Process locked */
  1004. __HAL_LOCK(hspi);
  1005. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1006. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1007. {
  1008. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1009. }
  1010. /* Configure communication */
  1011. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1012. hspi->TxISR = &SPI_TxISR;
  1013. hspi->pTxBuffPtr = pTxData;
  1014. hspi->TxXferSize = Size;
  1015. hspi->TxXferCount = Size;
  1016. hspi->RxISR = &SPI_2LinesRxISR;
  1017. hspi->pRxBuffPtr = pRxData;
  1018. hspi->RxXferSize = Size;
  1019. hspi->RxXferCount = Size;
  1020. /* Reset CRC Calculation */
  1021. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1022. {
  1023. SPI_RESET_CRC(hspi);
  1024. }
  1025. /* Enable TXE, RXNE and ERR interrupt */
  1026. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1027. /* Process Unlocked */
  1028. __HAL_UNLOCK(hspi);
  1029. /* Check if the SPI is already enabled */
  1030. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1031. {
  1032. /* Enable SPI peripheral */
  1033. __HAL_SPI_ENABLE(hspi);
  1034. }
  1035. return HAL_OK;
  1036. }
  1037. else
  1038. {
  1039. return HAL_BUSY;
  1040. }
  1041. }
  1042. /**
  1043. * @brief Transmit an amount of data in no-blocking mode with DMA
  1044. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1045. * the configuration information for SPI module.
  1046. * @param pData: pointer to data buffer
  1047. * @param Size: amount of data to be sent
  1048. * @retval HAL status
  1049. */
  1050. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1051. {
  1052. if(hspi->State == HAL_SPI_STATE_READY)
  1053. {
  1054. if((pData == NULL) || (Size == 0U))
  1055. {
  1056. /* Process Unlocked */
  1057. __HAL_UNLOCK(hspi);
  1058. return HAL_ERROR;
  1059. }
  1060. /* Check the parameters */
  1061. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1062. /* Process Locked */
  1063. __HAL_LOCK(hspi);
  1064. /* Configure communication */
  1065. hspi->State = HAL_SPI_STATE_BUSY_TX;
  1066. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1067. hspi->pTxBuffPtr = (uint8_t*)pData;
  1068. hspi->TxXferSize = Size;
  1069. hspi->TxXferCount = Size;
  1070. /*Init field not used in handle to zero */
  1071. hspi->TxISR = 0U;
  1072. hspi->RxISR = 0U;
  1073. hspi->pRxBuffPtr = NULL;
  1074. hspi->RxXferSize = 0U;
  1075. hspi->RxXferCount = 0U;
  1076. /* Configure communication direction : 1Line */
  1077. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1078. {
  1079. SPI_1LINE_TX(hspi);
  1080. }
  1081. /* Reset CRC Calculation */
  1082. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1083. {
  1084. SPI_RESET_CRC(hspi);
  1085. }
  1086. /* Set the SPI TxDMA Half transfer complete callback */
  1087. hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  1088. /* Set the SPI TxDMA transfer complete callback */
  1089. hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  1090. /* Set the DMA error callback */
  1091. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1092. /* Reset content of SPI RxDMA descriptor */
  1093. hspi->hdmarx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1094. hspi->hdmarx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1095. hspi->hdmarx->XferErrorCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1096. /* Enable the Tx DMA Channel */
  1097. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1098. /* Enable Tx DMA Request */
  1099. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1100. /* Process Unlocked */
  1101. __HAL_UNLOCK(hspi);
  1102. /* Check if the SPI is already enabled */
  1103. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1104. {
  1105. /* Enable SPI peripheral */
  1106. __HAL_SPI_ENABLE(hspi);
  1107. }
  1108. return HAL_OK;
  1109. }
  1110. else
  1111. {
  1112. /* Process Unlocked */
  1113. __HAL_UNLOCK(hspi);
  1114. return HAL_BUSY;
  1115. }
  1116. }
  1117. /**
  1118. * @brief Receive an amount of data in no-blocking mode with DMA
  1119. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1120. * the configuration information for SPI module.
  1121. * @param pData: pointer to data buffer
  1122. * @note When the CRC feature is enabled the pData Length must be Size + 1.
  1123. * @param Size: amount of data to be sent
  1124. * @retval HAL status
  1125. */
  1126. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1127. {
  1128. if(hspi->State == HAL_SPI_STATE_READY)
  1129. {
  1130. if((pData == NULL) || (Size == 0U))
  1131. {
  1132. /* Process Unlocked */
  1133. __HAL_UNLOCK(hspi);
  1134. return HAL_ERROR;
  1135. }
  1136. /* Process Locked */
  1137. __HAL_LOCK(hspi);
  1138. /* Configure communication */
  1139. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1140. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1141. hspi->pRxBuffPtr = (uint8_t*)pData;
  1142. hspi->RxXferSize = Size;
  1143. hspi->RxXferCount = Size;
  1144. /*Init field not used in handle to zero */
  1145. hspi->RxISR = 0U;
  1146. hspi->TxISR = 0U;
  1147. hspi->pTxBuffPtr = NULL;
  1148. hspi->TxXferSize = 0U;
  1149. hspi->TxXferCount = 0U;
  1150. /* Configure communication direction : 1Line */
  1151. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1152. {
  1153. SPI_1LINE_RX(hspi);
  1154. }
  1155. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1156. {
  1157. /* Process Unlocked */
  1158. __HAL_UNLOCK(hspi);
  1159. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1160. return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1161. }
  1162. /* Reset CRC Calculation */
  1163. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1164. {
  1165. SPI_RESET_CRC(hspi);
  1166. }
  1167. /* Set the SPI RxDMA Half transfer complete callback */
  1168. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1169. /* Set the SPI Rx DMA transfer complete callback */
  1170. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1171. /* Set the DMA error callback */
  1172. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1173. /* Reset content of SPI TxDMA descriptor */
  1174. hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1175. hspi->hdmatx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1176. hspi->hdmatx->XferErrorCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1177. /* Enable the Rx DMA Channel */
  1178. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1179. /* Enable Rx DMA Request */
  1180. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1181. /* Process Unlocked */
  1182. __HAL_UNLOCK(hspi);
  1183. /* Check if the SPI is already enabled */
  1184. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1185. {
  1186. /* Enable SPI peripheral */
  1187. __HAL_SPI_ENABLE(hspi);
  1188. }
  1189. return HAL_OK;
  1190. }
  1191. else
  1192. {
  1193. /* Process Unlocked */
  1194. __HAL_UNLOCK(hspi);
  1195. return HAL_BUSY;
  1196. }
  1197. }
  1198. /**
  1199. * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
  1200. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1201. * the configuration information for SPI module.
  1202. * @param pTxData: pointer to transmission data buffer
  1203. * @param pRxData: pointer to reception data buffer
  1204. * @note When the CRC feature is enabled the pRxData Length must be Size + 1
  1205. * @param Size: amount of data to be sent
  1206. * @retval HAL status
  1207. */
  1208. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1209. {
  1210. if((hspi->State == HAL_SPI_STATE_READY) || \
  1211. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1212. {
  1213. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U))
  1214. {
  1215. return HAL_ERROR;
  1216. }
  1217. /* Check the parameters */
  1218. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1219. /* Process locked */
  1220. __HAL_LOCK(hspi);
  1221. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1222. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1223. {
  1224. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1225. }
  1226. /* Configure communication */
  1227. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1228. hspi->pTxBuffPtr = (uint8_t*)pTxData;
  1229. hspi->TxXferSize = Size;
  1230. hspi->TxXferCount = Size;
  1231. hspi->pRxBuffPtr = (uint8_t*)pRxData;
  1232. hspi->RxXferSize = Size;
  1233. hspi->RxXferCount = Size;
  1234. /*Init field not used in handle to zero */
  1235. hspi->RxISR = 0U;
  1236. hspi->TxISR = 0U;
  1237. /* Reset CRC Calculation */
  1238. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1239. {
  1240. SPI_RESET_CRC(hspi);
  1241. }
  1242. /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1243. if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1244. {
  1245. /* Set the SPI Rx DMA Half transfer complete callback */
  1246. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1247. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1248. }
  1249. else
  1250. {
  1251. /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1252. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1253. hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1254. }
  1255. /* Set the DMA error callback */
  1256. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1257. /* Enable the Rx DMA Channel */
  1258. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1259. /* Enable Rx DMA Request */
  1260. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1261. /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1262. is performed in DMA reception complete callback */
  1263. hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1264. hspi->hdmatx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
  1265. /* Set the DMA error callback */
  1266. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1267. /* Enable the Tx DMA Channel */
  1268. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1269. /* Check if the SPI is already enabled */
  1270. if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1271. {
  1272. /* Enable SPI peripheral */
  1273. __HAL_SPI_ENABLE(hspi);
  1274. }
  1275. /* Enable Tx DMA Request */
  1276. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1277. /* Process Unlocked */
  1278. __HAL_UNLOCK(hspi);
  1279. return HAL_OK;
  1280. }
  1281. else
  1282. {
  1283. return HAL_BUSY;
  1284. }
  1285. }
  1286. /**
  1287. * @brief Pauses the DMA Transfer.
  1288. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1289. * the configuration information for the specified SPI module.
  1290. * @retval HAL status
  1291. */
  1292. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1293. {
  1294. /* Process Locked */
  1295. __HAL_LOCK(hspi);
  1296. /* Disable the SPI DMA Tx & Rx requests */
  1297. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1298. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1299. /* Process Unlocked */
  1300. __HAL_UNLOCK(hspi);
  1301. return HAL_OK;
  1302. }
  1303. /**
  1304. * @brief Resumes the DMA Transfer.
  1305. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1306. * the configuration information for the specified SPI module.
  1307. * @retval HAL status
  1308. */
  1309. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1310. {
  1311. /* Process Locked */
  1312. __HAL_LOCK(hspi);
  1313. /* Enable the SPI DMA Tx & Rx requests */
  1314. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1315. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1316. /* Process Unlocked */
  1317. __HAL_UNLOCK(hspi);
  1318. return HAL_OK;
  1319. }
  1320. /**
  1321. * @brief Stops the DMA Transfer.
  1322. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1323. * the configuration information for the specified SPI module.
  1324. * @retval HAL status
  1325. */
  1326. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1327. {
  1328. /* The Lock is not implemented on this API to allow the user application
  1329. to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1330. when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1331. and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1332. */
  1333. /* Abort the SPI DMA tx Channel */
  1334. if(hspi->hdmatx != NULL)
  1335. {
  1336. HAL_DMA_Abort(hspi->hdmatx);
  1337. }
  1338. /* Abort the SPI DMA rx Channel */
  1339. if(hspi->hdmarx != NULL)
  1340. {
  1341. HAL_DMA_Abort(hspi->hdmarx);
  1342. }
  1343. /* Disable the SPI DMA Tx & Rx requests */
  1344. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1345. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1346. hspi->State = HAL_SPI_STATE_READY;
  1347. return HAL_OK;
  1348. }
  1349. /**
  1350. * @brief This function handles SPI interrupt request.
  1351. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1352. * the configuration information for SPI module.
  1353. * @retval HAL status
  1354. */
  1355. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1356. {
  1357. /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1358. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
  1359. {
  1360. hspi->RxISR(hspi);
  1361. return;
  1362. }
  1363. /* SPI in mode Tramitter ---------------------------------------------------*/
  1364. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
  1365. {
  1366. hspi->TxISR(hspi);
  1367. return;
  1368. }
  1369. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1370. {
  1371. /* SPI CRC error interrupt occurred ---------------------------------------*/
  1372. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1373. {
  1374. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1375. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1376. }
  1377. /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1378. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1379. {
  1380. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1381. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1382. }
  1383. /* SPI Overrun error interrupt occurred -----------------------------------*/
  1384. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1385. {
  1386. if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1387. {
  1388. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1389. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1390. }
  1391. }
  1392. /* SPI Frame error interrupt occurred -------------------------------------*/
  1393. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
  1394. {
  1395. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
  1396. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1397. }
  1398. /* Call the Error call Back in case of Errors */
  1399. if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1400. {
  1401. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1402. hspi->State = HAL_SPI_STATE_READY;
  1403. HAL_SPI_ErrorCallback(hspi);
  1404. }
  1405. }
  1406. }
  1407. /**
  1408. * @brief Tx Transfer completed callbacks
  1409. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1410. * the configuration information for SPI module.
  1411. * @retval None
  1412. */
  1413. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1414. {
  1415. /* Prevent unused argument(s) compilation warning */
  1416. UNUSED(hspi);
  1417. /* NOTE : This function Should not be modified, when the callback is needed,
  1418. the HAL_SPI_TxCpltCallback could be implenetd in the user file
  1419. */
  1420. }
  1421. /**
  1422. * @brief Rx Transfer completed callbacks
  1423. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1424. * the configuration information for SPI module.
  1425. * @retval None
  1426. */
  1427. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1428. {
  1429. /* Prevent unused argument(s) compilation warning */
  1430. UNUSED(hspi);
  1431. /* NOTE : This function Should not be modified, when the callback is needed,
  1432. the HAL_SPI_RxCpltCallback() could be implenetd in the user file
  1433. */
  1434. }
  1435. /**
  1436. * @brief Tx and Rx Transfer completed callbacks
  1437. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1438. * the configuration information for SPI module.
  1439. * @retval None
  1440. */
  1441. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1442. {
  1443. /* Prevent unused argument(s) compilation warning */
  1444. UNUSED(hspi);
  1445. /* NOTE : This function Should not be modified, when the callback is needed,
  1446. the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
  1447. */
  1448. }
  1449. /**
  1450. * @brief Tx Half Transfer completed callbacks
  1451. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1452. * the configuration information for SPI module.
  1453. * @retval None
  1454. */
  1455. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1456. {
  1457. /* Prevent unused argument(s) compilation warning */
  1458. UNUSED(hspi);
  1459. /* NOTE : This function Should not be modified, when the callback is needed,
  1460. the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
  1461. */
  1462. }
  1463. /**
  1464. * @brief Rx Half Transfer completed callbacks
  1465. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1466. * the configuration information for SPI module.
  1467. * @retval None
  1468. */
  1469. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1470. {
  1471. /* Prevent unused argument(s) compilation warning */
  1472. UNUSED(hspi);
  1473. /* NOTE : This function Should not be modified, when the callback is needed,
  1474. the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
  1475. */
  1476. }
  1477. /**
  1478. * @brief Tx and Rx Transfer completed callbacks
  1479. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1480. * the configuration information for SPI module.
  1481. * @retval None
  1482. */
  1483. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1484. {
  1485. /* Prevent unused argument(s) compilation warning */
  1486. UNUSED(hspi);
  1487. /* NOTE : This function Should not be modified, when the callback is needed,
  1488. the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
  1489. */
  1490. }
  1491. /**
  1492. * @brief SPI error callbacks
  1493. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1494. * the configuration information for SPI module.
  1495. * @retval None
  1496. */
  1497. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1498. {
  1499. /* Prevent unused argument(s) compilation warning */
  1500. UNUSED(hspi);
  1501. /* NOTE : - This function Should not be modified, when the callback is needed,
  1502. the HAL_SPI_ErrorCallback() could be implenetd in the user file.
  1503. - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1504. and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1505. */
  1506. }
  1507. /**
  1508. * @}
  1509. */
  1510. /** @addtogroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1511. * @brief SPI control functions
  1512. *
  1513. @verbatim
  1514. ===============================================================================
  1515. ##### Peripheral State and Errors functions #####
  1516. ===============================================================================
  1517. [..]
  1518. This subsection provides a set of functions allowing to control the SPI.
  1519. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1520. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1521. @endverbatim
  1522. * @{
  1523. */
  1524. /**
  1525. * @brief Return the SPI state
  1526. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1527. * the configuration information for SPI module.
  1528. * @retval SPI state
  1529. */
  1530. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1531. {
  1532. return hspi->State;
  1533. }
  1534. /**
  1535. * @brief Return the SPI error code
  1536. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1537. * the configuration information for SPI module.
  1538. * @retval SPI Error Code
  1539. */
  1540. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1541. {
  1542. return hspi->ErrorCode;
  1543. }
  1544. /**
  1545. * @}
  1546. */
  1547. /**
  1548. * @}
  1549. */
  1550. /** @addtogroup SPI_Private
  1551. * @{
  1552. */
  1553. /**
  1554. * @brief Interrupt Handler to close Tx transfer
  1555. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1556. * the configuration information for SPI module.
  1557. * @retval void
  1558. */
  1559. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1560. {
  1561. /* Wait until TXE flag is set to send data */
  1562. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1563. {
  1564. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1565. }
  1566. /* Disable TXE interrupt */
  1567. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
  1568. /* Disable ERR interrupt if Receive process is finished */
  1569. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1570. {
  1571. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1572. /* Wait until Busy flag is reset before disabling SPI */
  1573. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1574. {
  1575. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1576. }
  1577. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1578. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1579. {
  1580. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1581. }
  1582. /* Check if Errors has been detected during transfer */
  1583. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1584. {
  1585. /* Check if we are in Tx or in Rx/Tx Mode */
  1586. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1587. {
  1588. /* Set state to READY before run the Callback Complete */
  1589. hspi->State = HAL_SPI_STATE_READY;
  1590. HAL_SPI_TxRxCpltCallback(hspi);
  1591. }
  1592. else
  1593. {
  1594. /* Set state to READY before run the Callback Complete */
  1595. hspi->State = HAL_SPI_STATE_READY;
  1596. HAL_SPI_TxCpltCallback(hspi);
  1597. }
  1598. }
  1599. else
  1600. {
  1601. /* Set state to READY before run the Callback Complete */
  1602. hspi->State = HAL_SPI_STATE_READY;
  1603. /* Call Error call back in case of Error */
  1604. HAL_SPI_ErrorCallback(hspi);
  1605. }
  1606. }
  1607. }
  1608. /**
  1609. * @brief Interrupt Handler to transmit amount of data in no-blocking mode
  1610. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1611. * the configuration information for SPI module.
  1612. * @retval void
  1613. */
  1614. static void SPI_TxISR(SPI_HandleTypeDef *hspi)
  1615. {
  1616. /* Transmit data in 8 Bit mode */
  1617. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1618. {
  1619. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1620. }
  1621. /* Transmit data in 16 Bit mode */
  1622. else
  1623. {
  1624. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1625. hspi->pTxBuffPtr+=2U;
  1626. }
  1627. hspi->TxXferCount--;
  1628. if(hspi->TxXferCount == 0U)
  1629. {
  1630. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1631. {
  1632. /* calculate and transfer CRC on Tx line */
  1633. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1634. }
  1635. SPI_TxCloseIRQHandler(hspi);
  1636. }
  1637. }
  1638. /**
  1639. * @brief Interrupt Handler to close Rx transfer
  1640. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1641. * the configuration information for SPI module.
  1642. * @retval void
  1643. */
  1644. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1645. {
  1646. __IO uint16_t tmpreg = 0U;
  1647. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1648. {
  1649. /* Wait until RXNE flag is set to read CRC data */
  1650. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1651. {
  1652. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1653. }
  1654. /* Read CRC to reset RXNE flag */
  1655. tmpreg = hspi->Instance->DR;
  1656. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
  1657. /* Wait until RXNE flag is reset */
  1658. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1659. {
  1660. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1661. }
  1662. /* Check if CRC error occurred */
  1663. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1664. {
  1665. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1666. /* Reset CRC Calculation */
  1667. SPI_RESET_CRC(hspi);
  1668. }
  1669. }
  1670. /* Disable RXNE interrupt */
  1671. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1672. /* if Transmit process is finished */
  1673. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1674. {
  1675. /* Disable ERR interrupt */
  1676. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1677. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1678. {
  1679. /* Disable SPI peripheral */
  1680. __HAL_SPI_DISABLE(hspi);
  1681. }
  1682. /* Check if Errors has been detected during transfer */
  1683. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1684. {
  1685. /* Check if we are in Rx or in Rx/Tx Mode */
  1686. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1687. {
  1688. /* Set state to READY before run the Callback Complete */
  1689. hspi->State = HAL_SPI_STATE_READY;
  1690. HAL_SPI_TxRxCpltCallback(hspi);
  1691. }
  1692. else
  1693. {
  1694. /* Set state to READY before run the Callback Complete */
  1695. hspi->State = HAL_SPI_STATE_READY;
  1696. HAL_SPI_RxCpltCallback(hspi);
  1697. }
  1698. }
  1699. else
  1700. {
  1701. /* Set state to READY before run the Callback Complete */
  1702. hspi->State = HAL_SPI_STATE_READY;
  1703. /* Call Error call back in case of Error */
  1704. HAL_SPI_ErrorCallback(hspi);
  1705. }
  1706. }
  1707. }
  1708. /**
  1709. * @brief Interrupt Handler to receive amount of data in 2Lines mode
  1710. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1711. * the configuration information for SPI module.
  1712. * @retval void
  1713. */
  1714. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
  1715. {
  1716. /* Receive data in 8 Bit mode */
  1717. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1718. {
  1719. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1720. }
  1721. /* Receive data in 16 Bit mode */
  1722. else
  1723. {
  1724. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1725. hspi->pRxBuffPtr+=2U;
  1726. }
  1727. hspi->RxXferCount--;
  1728. if(hspi->RxXferCount==0U)
  1729. {
  1730. SPI_RxCloseIRQHandler(hspi);
  1731. }
  1732. }
  1733. /**
  1734. * @brief Interrupt Handler to receive amount of data in no-blocking mode
  1735. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1736. * the configuration information for SPI module.
  1737. * @retval void
  1738. */
  1739. static void SPI_RxISR(SPI_HandleTypeDef *hspi)
  1740. {
  1741. /* Receive data in 8 Bit mode */
  1742. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1743. {
  1744. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1745. }
  1746. /* Receive data in 16 Bit mode */
  1747. else
  1748. {
  1749. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1750. hspi->pRxBuffPtr+=2U;
  1751. }
  1752. hspi->RxXferCount--;
  1753. /* Enable CRC Transmission */
  1754. if((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1755. {
  1756. /* Set CRC Next to calculate CRC on Rx side */
  1757. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1758. }
  1759. if(hspi->RxXferCount == 0U)
  1760. {
  1761. SPI_RxCloseIRQHandler(hspi);
  1762. }
  1763. }
  1764. /**
  1765. * @brief DMA SPI transmit process complete callback
  1766. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1767. * the configuration information for the specified DMA module.
  1768. * @retval None
  1769. */
  1770. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  1771. {
  1772. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1773. /* DMA Normal Mode */
  1774. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  1775. {
  1776. /* Wait until TXE flag is set to send data */
  1777. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1778. {
  1779. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1780. }
  1781. /* Disable Tx DMA Request */
  1782. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1783. /* Wait until Busy flag is reset before disabling SPI */
  1784. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1785. {
  1786. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1787. }
  1788. hspi->TxXferCount = 0U;
  1789. hspi->State = HAL_SPI_STATE_READY;
  1790. }
  1791. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1792. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1793. {
  1794. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1795. }
  1796. /* Check if Errors has been detected during transfer */
  1797. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1798. {
  1799. HAL_SPI_ErrorCallback(hspi);
  1800. }
  1801. else
  1802. {
  1803. HAL_SPI_TxCpltCallback(hspi);
  1804. }
  1805. }
  1806. /**
  1807. * @brief DMA SPI receive process complete callback
  1808. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1809. * the configuration information for the specified DMA module.
  1810. * @retval None
  1811. */
  1812. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  1813. {
  1814. __IO uint16_t tmpreg = 0U;
  1815. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1816. /* DMA Normal mode */
  1817. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  1818. {
  1819. /* Disable Rx DMA Request */
  1820. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1821. /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
  1822. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1823. /* CRC Calculation handling */
  1824. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1825. {
  1826. /* Wait until RXNE flag is set (CRC ready) */
  1827. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1828. {
  1829. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1830. }
  1831. /* Read CRC */
  1832. tmpreg = hspi->Instance->DR;
  1833. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
  1834. /* Wait until RXNE flag is reset */
  1835. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1836. {
  1837. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1838. }
  1839. /* Check if CRC error occurred */
  1840. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1841. {
  1842. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1843. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1844. }
  1845. }
  1846. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1847. {
  1848. /* Disable SPI peripheral */
  1849. __HAL_SPI_DISABLE(hspi);
  1850. }
  1851. hspi->RxXferCount = 0U;
  1852. hspi->State = HAL_SPI_STATE_READY;
  1853. /* Check if Errors has been detected during transfer */
  1854. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1855. {
  1856. HAL_SPI_ErrorCallback(hspi);
  1857. }
  1858. else
  1859. {
  1860. HAL_SPI_RxCpltCallback(hspi);
  1861. }
  1862. }
  1863. else
  1864. {
  1865. HAL_SPI_RxCpltCallback(hspi);
  1866. }
  1867. }
  1868. /**
  1869. * @brief DMA SPI transmit receive process complete callback
  1870. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1871. * the configuration information for the specified DMA module.
  1872. * @retval None
  1873. */
  1874. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1875. {
  1876. __IO uint16_t tmpreg = 0U;
  1877. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1878. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  1879. {
  1880. /* CRC Calculation handling */
  1881. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1882. {
  1883. /* Check if CRC is done on going (RXNE flag set) */
  1884. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  1885. {
  1886. /* Wait until RXNE flag is set to send data */
  1887. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1888. {
  1889. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1890. }
  1891. }
  1892. /* Read CRC */
  1893. tmpreg = hspi->Instance->DR;
  1894. UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
  1895. /* Check if CRC error occurred */
  1896. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1897. {
  1898. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1899. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1900. }
  1901. }
  1902. /* Wait until TXE flag is set to send data */
  1903. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1904. {
  1905. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1906. }
  1907. /* Disable Tx DMA Request */
  1908. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1909. /* Wait until Busy flag is reset before disabling SPI */
  1910. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1911. {
  1912. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1913. }
  1914. /* Disable Rx DMA Request */
  1915. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1916. hspi->TxXferCount = 0U;
  1917. hspi->RxXferCount = 0U;
  1918. hspi->State = HAL_SPI_STATE_READY;
  1919. /* Check if Errors has been detected during transfer */
  1920. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1921. {
  1922. HAL_SPI_ErrorCallback(hspi);
  1923. }
  1924. else
  1925. {
  1926. HAL_SPI_TxRxCpltCallback(hspi);
  1927. }
  1928. }
  1929. else
  1930. {
  1931. HAL_SPI_TxRxCpltCallback(hspi);
  1932. }
  1933. }
  1934. /**
  1935. * @brief DMA SPI half transmit process complete callback
  1936. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1937. * the configuration information for the specified DMA module.
  1938. * @retval None
  1939. */
  1940. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
  1941. {
  1942. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1943. HAL_SPI_TxHalfCpltCallback(hspi);
  1944. }
  1945. /**
  1946. * @brief DMA SPI half receive process complete callback
  1947. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1948. * the configuration information for the specified DMA module.
  1949. * @retval None
  1950. */
  1951. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
  1952. {
  1953. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1954. HAL_SPI_RxHalfCpltCallback(hspi);
  1955. }
  1956. /**
  1957. * @brief DMA SPI Half transmit receive process complete callback
  1958. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1959. * the configuration information for the specified DMA module.
  1960. * @retval None
  1961. */
  1962. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1963. {
  1964. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1965. HAL_SPI_TxRxHalfCpltCallback(hspi);
  1966. }
  1967. /**
  1968. * @brief DMA SPI communication error callback
  1969. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1970. * the configuration information for the specified DMA module.
  1971. * @retval None
  1972. */
  1973. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  1974. {
  1975. SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1976. hspi->TxXferCount = 0U;
  1977. hspi->RxXferCount = 0U;
  1978. hspi->State= HAL_SPI_STATE_READY;
  1979. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1980. HAL_SPI_ErrorCallback(hspi);
  1981. }
  1982. /**
  1983. * @brief This function handles SPI Communication Timeout.
  1984. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1985. * the configuration information for SPI module.
  1986. * @param Flag: SPI flag to check
  1987. * @param Status: Flag status to check: RESET or set
  1988. * @param Timeout: Timeout duration
  1989. * @retval HAL status
  1990. */
  1991. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1992. {
  1993. uint32_t tickstart = 0U;
  1994. /* Get tick */
  1995. tickstart = HAL_GetTick();
  1996. /* Wait until flag is set */
  1997. if(Status == RESET)
  1998. {
  1999. while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  2000. {
  2001. if(Timeout != HAL_MAX_DELAY)
  2002. {
  2003. if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
  2004. {
  2005. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  2006. on both master and slave sides in order to resynchronize the master
  2007. and slave for their respective CRC calculation */
  2008. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2009. __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2010. /* Disable SPI peripheral */
  2011. __HAL_SPI_DISABLE(hspi);
  2012. /* Reset CRC Calculation */
  2013. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2014. {
  2015. SPI_RESET_CRC(hspi);
  2016. }
  2017. hspi->State= HAL_SPI_STATE_READY;
  2018. /* Process Unlocked */
  2019. __HAL_UNLOCK(hspi);
  2020. return HAL_TIMEOUT;
  2021. }
  2022. }
  2023. }
  2024. }
  2025. else
  2026. {
  2027. while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  2028. {
  2029. if(Timeout != HAL_MAX_DELAY)
  2030. {
  2031. if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
  2032. {
  2033. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  2034. on both master and slave sides in order to resynchronize the master
  2035. and slave for their respective CRC calculation */
  2036. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2037. __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2038. /* Disable SPI peripheral */
  2039. __HAL_SPI_DISABLE(hspi);
  2040. /* Reset CRC Calculation */
  2041. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2042. {
  2043. SPI_RESET_CRC(hspi);
  2044. }
  2045. hspi->State= HAL_SPI_STATE_READY;
  2046. /* Process Unlocked */
  2047. __HAL_UNLOCK(hspi);
  2048. return HAL_TIMEOUT;
  2049. }
  2050. }
  2051. }
  2052. }
  2053. return HAL_OK;
  2054. }
  2055. /**
  2056. * @}
  2057. */
  2058. /**
  2059. * @}
  2060. */
  2061. #endif /* HAL_SPI_MODULE_ENABLED */
  2062. /**
  2063. * @}
  2064. */
  2065. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/