frd450h40014.c 7.8 KB

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  1. /* drivers/video/fbdev/sunxi/disp2/disp/lcd/frd450h40014.c
  2. *
  3. * Copyright (c) 2017 Allwinnertech Co., Ltd.
  4. * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
  5. *
  6. * frd450h40014 panel driver
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * [lcd0]
  13. * lcd_used = 1
  14. * lcd_driver_name = "frd450h40014"
  15. * lcd_backlight = 100
  16. * lcd_if = 4
  17. * lcd_x = 480
  18. * lcd_y = 854
  19. * lcd_width = 55
  20. * lcd_height = 99
  21. * lcd_dclk_freq = 34
  22. * lcd_pwm_used = 1
  23. * lcd_pwm_ch = 8
  24. * lcd_pwm_freq = 50000
  25. * lcd_pwm_pol = 1
  26. * lcd_pwm_max_limit = 255
  27. * lcd_hbp = 112
  28. * lcd_ht = 640
  29. * lcd_hspw = 32
  30. * lcd_vbp = 20
  31. * lcd_vt = 879
  32. * lcd_vspw = 2
  33. * lcd_dsi_if = 0
  34. * lcd_dsi_lane = 2
  35. * lcd_dsi_format = 0
  36. * lcd_dsi_te = 0
  37. * lcd_dsi_eotp = 0
  38. * lcd_frm = 1
  39. * lcd_io_phase = 0x0000
  40. * lcd_hv_clk_phase = 0
  41. * lcd_hv_sync_polarity= 0
  42. * lcd_gamma_en = 0
  43. * lcd_bright_curve_en = 0
  44. * lcd_cmap_en = 0
  45. * lcdgamma4iep = 22
  46. * lcd_bl_en = port:PB07<1><0><default><1>
  47. * lcd_pin_power = "vcc18-dsi"
  48. * lcd_pin_power1 = "vcc-pd"
  49. * lcd_power = "vcc-lcd"
  50. * lcd_gpio_0 = port:PB06<1><0><default><1>
  51. */
  52. #include "frd450h40014.h"
  53. static void lcd_power_on(u32 sel);
  54. static void lcd_power_off(u32 sel);
  55. static void lcd_bl_open(u32 sel);
  56. static void lcd_bl_close(u32 sel);
  57. static void lcd_panel_init(u32 sel);
  58. static void lcd_panel_exit(u32 sel);
  59. #define panel_reset(sel, val) sunxi_lcd_gpio_set_value(sel, 0, val)
  60. static void lcd_cfg_panel_info(struct panel_extend_para *info)
  61. {
  62. u32 i = 0, j = 0;
  63. u32 items;
  64. u8 lcd_gamma_tbl[][2] = {
  65. {0, 0},
  66. {15, 15},
  67. {30, 30},
  68. {45, 45},
  69. {60, 60},
  70. {75, 75},
  71. {90, 90},
  72. {105, 105},
  73. {120, 120},
  74. {135, 135},
  75. {150, 150},
  76. {165, 165},
  77. {180, 180},
  78. {195, 195},
  79. {210, 210},
  80. {225, 225},
  81. {240, 240},
  82. {255, 255},
  83. };
  84. u32 lcd_cmap_tbl[2][3][4] = {
  85. {
  86. {LCD_CMAP_G0, LCD_CMAP_B1, LCD_CMAP_G2, LCD_CMAP_B3},
  87. {LCD_CMAP_B0, LCD_CMAP_R1, LCD_CMAP_B2, LCD_CMAP_R3},
  88. {LCD_CMAP_R0, LCD_CMAP_G1, LCD_CMAP_R2, LCD_CMAP_G3},
  89. },
  90. {
  91. {LCD_CMAP_B3, LCD_CMAP_G2, LCD_CMAP_B1, LCD_CMAP_G0},
  92. {LCD_CMAP_R3, LCD_CMAP_B2, LCD_CMAP_R1, LCD_CMAP_B0},
  93. {LCD_CMAP_G3, LCD_CMAP_R2, LCD_CMAP_G1, LCD_CMAP_R0},
  94. },
  95. };
  96. items = sizeof(lcd_gamma_tbl) / 2;
  97. for (i = 0; i < items - 1; i++) {
  98. u32 num = lcd_gamma_tbl[i+1][0] - lcd_gamma_tbl[i][0];
  99. for (j = 0; j < num; j++) {
  100. u32 value = 0;
  101. value = lcd_gamma_tbl[i][1] +
  102. ((lcd_gamma_tbl[i+1][1] - lcd_gamma_tbl[i][1])
  103. * j) / num;
  104. info->lcd_gamma_tbl[lcd_gamma_tbl[i][0] + j] =
  105. (value<<16)
  106. + (value<<8) + value;
  107. }
  108. }
  109. info->lcd_gamma_tbl[255] = (lcd_gamma_tbl[items-1][1]<<16) +
  110. (lcd_gamma_tbl[items-1][1]<<8)
  111. + lcd_gamma_tbl[items-1][1];
  112. memcpy(info->lcd_cmap_tbl, lcd_cmap_tbl, sizeof(lcd_cmap_tbl));
  113. }
  114. static s32 lcd_open_flow(u32 sel)
  115. {
  116. LCD_OPEN_FUNC(sel, lcd_power_on, 120);
  117. LCD_OPEN_FUNC(sel, lcd_panel_init, 10);
  118. LCD_OPEN_FUNC(sel, sunxi_lcd_tcon_enable, 10);
  119. LCD_OPEN_FUNC(sel, lcd_bl_open, 0);
  120. return 0;
  121. }
  122. static s32 lcd_close_flow(u32 sel)
  123. {
  124. LCD_CLOSE_FUNC(sel, lcd_bl_close, 0);
  125. LCD_CLOSE_FUNC(sel, lcd_panel_exit, 10);
  126. LCD_CLOSE_FUNC(sel, sunxi_lcd_tcon_disable, 10);
  127. LCD_CLOSE_FUNC(sel, lcd_power_off, 10);
  128. return 0;
  129. }
  130. static void lcd_power_on(u32 sel)
  131. {
  132. sunxi_lcd_pin_cfg(sel, 1);
  133. sunxi_lcd_power_enable(sel, 0);
  134. sunxi_lcd_delay_ms(2);
  135. panel_reset(sel, 1);
  136. sunxi_lcd_delay_ms(2);
  137. panel_reset(sel, 0);
  138. sunxi_lcd_delay_ms(2);
  139. panel_reset(sel, 1);
  140. }
  141. static void lcd_power_off(u32 sel)
  142. {
  143. panel_reset(sel, 0);
  144. sunxi_lcd_pin_cfg(sel, 0);
  145. sunxi_lcd_delay_ms(5);
  146. sunxi_lcd_power_disable(sel, 0);
  147. }
  148. static void lcd_bl_open(u32 sel)
  149. {
  150. sunxi_lcd_pwm_enable(sel);
  151. sunxi_lcd_backlight_enable(sel);
  152. }
  153. static void lcd_bl_close(u32 sel)
  154. {
  155. sunxi_lcd_backlight_disable(sel);
  156. sunxi_lcd_pwm_disable(sel);
  157. }
  158. struct LCM_setting_table {
  159. u8 cmd;
  160. u32 count;
  161. u8 para_list[64];
  162. };
  163. #define REGFLAG_DELAY 0x00
  164. #define REGFLAG_END_OF_TABLE 0xFE /* END OF REGISTERS MARKER */
  165. static struct LCM_setting_table lcm_initialization_setting[] = {
  166. { 0x11, 1, {0x00} },
  167. { REGFLAG_DELAY, 120, {} },
  168. { 0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x10} },
  169. { 0xC0, 2, {0xe9, 0x03} },
  170. { 0xC1, 2, {0x11, 0x02} },
  171. { 0xC2, 2, {0x31, 0x08} },
  172. { 0xCC, 1, {0x10} },
  173. { 0xB0, 16, {0x00, 0x03, 0x8A, 0x10, 0x15, 0x09, 0x05, 0x0A,
  174. 0x0A, 0x1A, 0x07, 0x13, 0x0F, 0x0D, 0x10, 0x19} },
  175. { 0xB1, 16, {0x00, 0x03, 0x08, 0x0F, 0x14, 0x0A, 0x04, 0x09,
  176. 0x09, 0x1E, 0x0A, 0x17, 0x15, 0x14, 0x1A, 0x19} },
  177. { 0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x11} },
  178. { 0xB0, 1, {0x50} },
  179. { 0xB1, 1, {0x49} },
  180. { 0xB2, 1, {0x07} },
  181. { 0xB3, 1, {0x80} },
  182. { 0xB5, 1, {0x47} },
  183. { 0xB7, 1, {0x85} },
  184. { 0xB8, 1, {0x21} },
  185. { 0xB9, 1, {0x10} },
  186. { 0xC1, 1, {0x78} },
  187. { 0xC2, 1, {0x78} },
  188. { 0xD0, 1, {0x88} },
  189. { REGFLAG_DELAY, 100, {} },
  190. { 0xE0, 3, {0x00, 0x00, 0x02} },
  191. { 0xE1, 11, {0x08, 0x00, 0x0A, 0x00, 0x07, 0x00, 0x09, 0x00,
  192. 0x00, 0x33, 0x33} },
  193. { 0xE2, 11, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  194. 0x00, 0x00, 0x00} },
  195. { 0xE3, 4, {0x00, 0x00, 0x33, 0x33} },
  196. { 0xE4, 2, {0x44, 0x44} },
  197. { 0xE5, 16, {0x0E, 0x60, 0xA0, 0xA0, 0x10, 0x60, 0xA0, 0xA0,
  198. 0x0A, 0x60, 0xA0, 0xA0, 0x0C, 0x60, 0xA0, 0xA0} },
  199. { 0xE6, 4, {0x00, 0x00, 0x33, 0x33} },
  200. { 0xE7, 2, {0x44, 0x44} },
  201. { 0xE8, 16, {0x0D, 0x60, 0xA0, 0xA0, 0x0F, 0x60, 0xA0, 0xA0,
  202. 0x09, 0x60, 0xA0, 0xA0, 0x0B, 0x60, 0xA0, 0xA0} },
  203. { 0xEB, 7, {0x02, 0x01, 0xE4, 0xE4, 0x44, 0x00, 0x40} },
  204. { 0xEC, 2, {0x02, 0x01} },
  205. { 0xED, 16, {0xAB, 0x89, 0x76, 0x54, 0x01, 0xFF, 0xFF, 0xFF,
  206. 0xFF, 0xFF, 0xFF, 0x10, 0x45, 0x67, 0x98, 0xBA} },
  207. { 0xFF, 5, {0x77, 0x01, 0x00, 0x00, 0x00} },
  208. { 0x29, 1, {0x00} },
  209. { REGFLAG_DELAY, 5, {} },
  210. { REGFLAG_END_OF_TABLE, 0x00, {} }
  211. };
  212. static void lcd_panel_init(u32 sel)
  213. {
  214. u32 i;
  215. sunxi_lcd_dsi_clk_enable(sel);
  216. for (i = 0; ; i++) {
  217. if (lcm_initialization_setting[i].cmd == REGFLAG_END_OF_TABLE)
  218. break;
  219. else if (lcm_initialization_setting[i].cmd == REGFLAG_DELAY)
  220. sunxi_lcd_delay_ms(lcm_initialization_setting[i].count);
  221. else {
  222. dsi_dcs_wr(0, lcm_initialization_setting[i].cmd,
  223. lcm_initialization_setting[i].para_list,
  224. lcm_initialization_setting[i].count);
  225. }
  226. }
  227. }
  228. static void lcd_panel_exit(u32 sel)
  229. {
  230. sunxi_lcd_dsi_dcs_write_0para(sel, 0x28);
  231. sunxi_lcd_delay_ms(5);
  232. sunxi_lcd_dsi_dcs_write_0para(sel, 0x10);
  233. }
  234. /*sel: 0:lcd0; 1:lcd1*/
  235. static s32 lcd_user_defined_func(u32 sel, u32 para1, u32 para2, u32 para3)
  236. {
  237. return 0;
  238. }
  239. struct __lcd_panel frd450h40014_panel = {
  240. /* panel driver name, must mach the name of
  241. * lcd_drv_name in sys_config.fex
  242. */
  243. .name = "frd450h40014",
  244. .func = {
  245. .cfg_panel_info = lcd_cfg_panel_info,
  246. .cfg_open_flow = lcd_open_flow,
  247. .cfg_close_flow = lcd_close_flow,
  248. .lcd_user_defined_func = lcd_user_defined_func,
  249. },
  250. };