board.c 4.6 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2015, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2009-01-05 Bernard first implementation
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <components.h>
  27. #include "board.h"
  28. #include "drv_usart.h"
  29. #include "drv_mpu.h"
  30. /**
  31. * @addtogroup STM32
  32. */
  33. /**
  34. * @brief System Clock Configuration
  35. * The system Clock is configured as follow :
  36. * System Clock source = PLL (HSE)
  37. * SYSCLK(Hz) = 200000000
  38. * HCLK(Hz) = 200000000
  39. * AHB Prescaler = 1
  40. * APB1 Prescaler = 4
  41. * APB2 Prescaler = 2
  42. * HSE Frequency(Hz) = 25000000
  43. * PLL_M = 25
  44. * PLL_N = 400
  45. * PLL_P = 2
  46. * PLLSAI_N = 384
  47. * PLLSAI_P = 8
  48. * VDD(V) = 3.3
  49. * Main regulator output voltage = Scale1 mode
  50. * Flash Latency(WS) = 6
  51. * @param None
  52. * @retval None
  53. */
  54. static void SystemClock_Config(void)
  55. {
  56. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  57. RCC_OscInitTypeDef RCC_OscInitStruct;
  58. HAL_StatusTypeDef ret = HAL_OK;
  59. /* Enable HSE Oscillator and activate PLL with HSE as source */
  60. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  61. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  62. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  63. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  64. RCC_OscInitStruct.PLL.PLLM = 25;
  65. RCC_OscInitStruct.PLL.PLLN = 400;
  66. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  67. HAL_RCC_OscConfig(&RCC_OscInitStruct);
  68. ret = HAL_PWREx_EnableOverDrive();
  69. if (ret != HAL_OK)
  70. {
  71. while (1)
  72. {
  73. ;
  74. }
  75. }
  76. /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
  77. clocks dividers */
  78. RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  79. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  80. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  81. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  82. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  83. HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6);
  84. }
  85. /**
  86. * @brief CPU L1-Cache enable.
  87. * @param None
  88. * @retval None
  89. */
  90. static void CPU_CACHE_Enable(void)
  91. {
  92. /* Enable branch prediction */
  93. SCB->CCR |= (1 << 18);
  94. __DSB();
  95. /* Enable I-Cache */
  96. SCB_EnableICache();
  97. /* Enable D-Cache */
  98. SCB_EnableDCache();
  99. }
  100. /**
  101. * This is the timer interrupt service routine.
  102. *
  103. */
  104. void SysTick_Handler(void)
  105. {
  106. /* tick for HAL Library */
  107. HAL_IncTick();
  108. /* enter interrupt */
  109. rt_interrupt_enter();
  110. rt_tick_increase();
  111. /* leave interrupt */
  112. rt_interrupt_leave();
  113. }
  114. /**
  115. * This function will initial STM32 board.
  116. */
  117. void rt_hw_board_init()
  118. {
  119. /* Configure the MPU attributes as Write Through */
  120. mpu_init();
  121. /* Enable the CPU Cache */
  122. CPU_CACHE_Enable();
  123. /* STM32F7xx HAL library initialization:
  124. - Configure the Flash ART accelerator on ITCM interface
  125. - Configure the Systick to generate an interrupt each 1 msec
  126. - Set NVIC Group Priority to 4
  127. - Global MSP (MCU Support Package) initialization
  128. */
  129. HAL_Init();
  130. /* Configure the system clock @ 200 Mhz */
  131. SystemClock_Config();
  132. /* init systick */
  133. SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
  134. /* set pend exception priority */
  135. NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
  136. rt_components_board_init();
  137. #ifdef RT_USING_CONSOLE
  138. rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
  139. #endif
  140. }
  141. /*@}*/