drv_usart.c 32 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. * 2020-03-16 SummerGift add device close feature
  10. * 2020-03-20 SummerGift fix bug caused by ORE
  11. * 2020-05-02 whj4674672 support stm32h7 uart dma
  12. * 2020-09-09 forest-rain support stm32wl uart
  13. * 2020-10-14 Dozingfiretruck Porting for stm32wbxx
  14. */
  15. #include "board.h"
  16. #include "drv_usart.h"
  17. #include "drv_config.h"
  18. #ifdef RT_USING_SERIAL
  19. //#define DRV_DEBUG
  20. #define LOG_TAG "drv.usart"
  21. #include <drv_log.h>
  22. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
  23. !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \
  24. !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1)
  25. #error "Please define at least one BSP_USING_UARTx"
  26. /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
  27. #endif
  28. #ifdef RT_SERIAL_USING_DMA
  29. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  30. #endif
  31. enum
  32. {
  33. #ifdef BSP_USING_UART1
  34. UART1_INDEX,
  35. #endif
  36. #ifdef BSP_USING_UART2
  37. UART2_INDEX,
  38. #endif
  39. #ifdef BSP_USING_UART3
  40. UART3_INDEX,
  41. #endif
  42. #ifdef BSP_USING_UART4
  43. UART4_INDEX,
  44. #endif
  45. #ifdef BSP_USING_UART5
  46. UART5_INDEX,
  47. #endif
  48. #ifdef BSP_USING_UART6
  49. UART6_INDEX,
  50. #endif
  51. #ifdef BSP_USING_UART7
  52. UART7_INDEX,
  53. #endif
  54. #ifdef BSP_USING_UART8
  55. UART8_INDEX,
  56. #endif
  57. #ifdef BSP_USING_LPUART1
  58. LPUART1_INDEX,
  59. #endif
  60. };
  61. static struct stm32_uart_config uart_config[] =
  62. {
  63. #ifdef BSP_USING_UART1
  64. UART1_CONFIG,
  65. #endif
  66. #ifdef BSP_USING_UART2
  67. UART2_CONFIG,
  68. #endif
  69. #ifdef BSP_USING_UART3
  70. UART3_CONFIG,
  71. #endif
  72. #ifdef BSP_USING_UART4
  73. UART4_CONFIG,
  74. #endif
  75. #ifdef BSP_USING_UART5
  76. UART5_CONFIG,
  77. #endif
  78. #ifdef BSP_USING_UART6
  79. UART6_CONFIG,
  80. #endif
  81. #ifdef BSP_USING_UART7
  82. UART7_CONFIG,
  83. #endif
  84. #ifdef BSP_USING_UART8
  85. UART8_CONFIG,
  86. #endif
  87. #ifdef BSP_USING_LPUART1
  88. LPUART1_CONFIG,
  89. #endif
  90. };
  91. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  92. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  93. {
  94. struct stm32_uart *uart;
  95. RT_ASSERT(serial != RT_NULL);
  96. RT_ASSERT(cfg != RT_NULL);
  97. uart = rt_container_of(serial, struct stm32_uart, serial);
  98. uart->handle.Instance = uart->config->Instance;
  99. uart->handle.Init.BaudRate = cfg->baud_rate;
  100. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  101. uart->handle.Init.Mode = UART_MODE_TX_RX;
  102. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  103. switch (cfg->data_bits)
  104. {
  105. case DATA_BITS_8:
  106. if (cfg->parity == PARITY_ODD || cfg->parity == PARITY_EVEN)
  107. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  108. else
  109. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  110. break;
  111. case DATA_BITS_9:
  112. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  113. break;
  114. default:
  115. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  116. break;
  117. }
  118. switch (cfg->stop_bits)
  119. {
  120. case STOP_BITS_1:
  121. uart->handle.Init.StopBits = UART_STOPBITS_1;
  122. break;
  123. case STOP_BITS_2:
  124. uart->handle.Init.StopBits = UART_STOPBITS_2;
  125. break;
  126. default:
  127. uart->handle.Init.StopBits = UART_STOPBITS_1;
  128. break;
  129. }
  130. switch (cfg->parity)
  131. {
  132. case PARITY_NONE:
  133. uart->handle.Init.Parity = UART_PARITY_NONE;
  134. break;
  135. case PARITY_ODD:
  136. uart->handle.Init.Parity = UART_PARITY_ODD;
  137. break;
  138. case PARITY_EVEN:
  139. uart->handle.Init.Parity = UART_PARITY_EVEN;
  140. break;
  141. default:
  142. uart->handle.Init.Parity = UART_PARITY_NONE;
  143. break;
  144. }
  145. #ifdef RT_SERIAL_USING_DMA
  146. uart->dma_rx.last_index = 0;
  147. #endif
  148. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  149. {
  150. return -RT_ERROR;
  151. }
  152. return RT_EOK;
  153. }
  154. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  155. {
  156. struct stm32_uart *uart;
  157. #ifdef RT_SERIAL_USING_DMA
  158. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  159. #endif
  160. RT_ASSERT(serial != RT_NULL);
  161. uart = rt_container_of(serial, struct stm32_uart, serial);
  162. switch (cmd)
  163. {
  164. /* disable interrupt */
  165. case RT_DEVICE_CTRL_CLR_INT:
  166. /* disable rx irq */
  167. NVIC_DisableIRQ(uart->config->irq_type);
  168. /* disable interrupt */
  169. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  170. #ifdef RT_SERIAL_USING_DMA
  171. /* disable DMA */
  172. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  173. {
  174. HAL_NVIC_DisableIRQ(uart->config->dma_rx->dma_irq);
  175. if (HAL_DMA_Abort(&(uart->dma_rx.handle)) != HAL_OK)
  176. {
  177. RT_ASSERT(0);
  178. }
  179. if (HAL_DMA_DeInit(&(uart->dma_rx.handle)) != HAL_OK)
  180. {
  181. RT_ASSERT(0);
  182. }
  183. }
  184. else if(ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
  185. {
  186. HAL_NVIC_DisableIRQ(uart->config->dma_tx->dma_irq);
  187. if (HAL_DMA_DeInit(&(uart->dma_tx.handle)) != HAL_OK)
  188. {
  189. RT_ASSERT(0);
  190. }
  191. }
  192. #endif
  193. break;
  194. /* enable interrupt */
  195. case RT_DEVICE_CTRL_SET_INT:
  196. /* enable rx irq */
  197. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  198. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  199. /* enable interrupt */
  200. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  201. break;
  202. #ifdef RT_SERIAL_USING_DMA
  203. case RT_DEVICE_CTRL_CONFIG:
  204. stm32_dma_config(serial, ctrl_arg);
  205. break;
  206. #endif
  207. case RT_DEVICE_CTRL_CLOSE:
  208. if (HAL_UART_DeInit(&(uart->handle)) != HAL_OK )
  209. {
  210. RT_ASSERT(0)
  211. }
  212. break;
  213. }
  214. return RT_EOK;
  215. }
  216. static int stm32_putc(struct rt_serial_device *serial, char c)
  217. {
  218. struct stm32_uart *uart;
  219. RT_ASSERT(serial != RT_NULL);
  220. uart = rt_container_of(serial, struct stm32_uart, serial);
  221. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  222. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  223. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  224. || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB)
  225. uart->handle.Instance->TDR = c;
  226. #else
  227. uart->handle.Instance->DR = c;
  228. #endif
  229. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  230. return 1;
  231. }
  232. static int stm32_getc(struct rt_serial_device *serial)
  233. {
  234. int ch;
  235. struct stm32_uart *uart;
  236. RT_ASSERT(serial != RT_NULL);
  237. uart = rt_container_of(serial, struct stm32_uart, serial);
  238. ch = -1;
  239. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  240. {
  241. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  242. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  243. || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB)
  244. ch = uart->handle.Instance->RDR & 0xff;
  245. #else
  246. ch = uart->handle.Instance->DR & 0xff;
  247. #endif
  248. }
  249. return ch;
  250. }
  251. static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  252. {
  253. struct stm32_uart *uart;
  254. RT_ASSERT(serial != RT_NULL);
  255. RT_ASSERT(buf != RT_NULL);
  256. uart = rt_container_of(serial, struct stm32_uart, serial);
  257. if (size == 0)
  258. {
  259. return 0;
  260. }
  261. if (RT_SERIAL_DMA_TX == direction)
  262. {
  263. if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
  264. {
  265. return size;
  266. }
  267. else
  268. {
  269. return 0;
  270. }
  271. }
  272. return 0;
  273. }
  274. /**
  275. * Uart common interrupt process. This need add to uart ISR.
  276. *
  277. * @param serial serial device
  278. */
  279. static void uart_isr(struct rt_serial_device *serial)
  280. {
  281. struct stm32_uart *uart;
  282. #ifdef RT_SERIAL_USING_DMA
  283. rt_size_t recv_total_index, recv_len;
  284. rt_base_t level;
  285. #endif
  286. RT_ASSERT(serial != RT_NULL);
  287. uart = rt_container_of(serial, struct stm32_uart, serial);
  288. /* UART in mode Receiver -------------------------------------------------*/
  289. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  290. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  291. {
  292. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  293. }
  294. #ifdef RT_SERIAL_USING_DMA
  295. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  296. && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  297. {
  298. level = rt_hw_interrupt_disable();
  299. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  300. recv_len = recv_total_index - uart->dma_rx.last_index;
  301. uart->dma_rx.last_index = recv_total_index;
  302. rt_hw_interrupt_enable(level);
  303. if (recv_len)
  304. {
  305. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  306. }
  307. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  308. }
  309. else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) &&
  310. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_TC) != RESET))
  311. {
  312. if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
  313. {
  314. HAL_UART_IRQHandler(&(uart->handle));
  315. }
  316. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  317. }
  318. #endif
  319. else
  320. {
  321. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  322. {
  323. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  324. }
  325. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  326. {
  327. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  328. }
  329. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  330. {
  331. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  332. }
  333. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  334. {
  335. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  336. }
  337. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32WL) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  338. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \
  339. && !defined(SOC_SERIES_STM32G4) && !defined(SOC_SERIES_STM32MP1) && !defined(SOC_SERIES_STM32WB)
  340. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  341. {
  342. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  343. }
  344. #endif
  345. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  346. {
  347. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  348. }
  349. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  350. {
  351. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  352. }
  353. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  354. {
  355. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  356. }
  357. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  358. {
  359. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  360. }
  361. }
  362. }
  363. #ifdef RT_SERIAL_USING_DMA
  364. static void dma_isr(struct rt_serial_device *serial)
  365. {
  366. struct stm32_uart *uart;
  367. rt_size_t recv_total_index, recv_len;
  368. rt_base_t level;
  369. RT_ASSERT(serial != RT_NULL);
  370. uart = rt_container_of(serial, struct stm32_uart, serial);
  371. if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
  372. (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
  373. {
  374. level = rt_hw_interrupt_disable();
  375. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  376. if (recv_total_index == 0)
  377. {
  378. recv_len = serial->config.bufsz - uart->dma_rx.last_index;
  379. }
  380. else
  381. {
  382. recv_len = recv_total_index - uart->dma_rx.last_index;
  383. }
  384. uart->dma_rx.last_index = recv_total_index;
  385. rt_hw_interrupt_enable(level);
  386. if (recv_len)
  387. {
  388. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  389. }
  390. }
  391. }
  392. #endif
  393. #if defined(BSP_USING_UART1)
  394. void USART1_IRQHandler(void)
  395. {
  396. /* enter interrupt */
  397. rt_interrupt_enter();
  398. uart_isr(&(uart_obj[UART1_INDEX].serial));
  399. /* leave interrupt */
  400. rt_interrupt_leave();
  401. }
  402. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  403. void UART1_DMA_RX_IRQHandler(void)
  404. {
  405. /* enter interrupt */
  406. rt_interrupt_enter();
  407. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
  408. /* leave interrupt */
  409. rt_interrupt_leave();
  410. }
  411. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  412. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
  413. void UART1_DMA_TX_IRQHandler(void)
  414. {
  415. /* enter interrupt */
  416. rt_interrupt_enter();
  417. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
  418. /* leave interrupt */
  419. rt_interrupt_leave();
  420. }
  421. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
  422. #endif /* BSP_USING_UART1 */
  423. #if defined(BSP_USING_UART2)
  424. void USART2_IRQHandler(void)
  425. {
  426. /* enter interrupt */
  427. rt_interrupt_enter();
  428. uart_isr(&(uart_obj[UART2_INDEX].serial));
  429. /* leave interrupt */
  430. rt_interrupt_leave();
  431. }
  432. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  433. void UART2_DMA_RX_IRQHandler(void)
  434. {
  435. /* enter interrupt */
  436. rt_interrupt_enter();
  437. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
  438. /* leave interrupt */
  439. rt_interrupt_leave();
  440. }
  441. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  442. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
  443. void UART2_DMA_TX_IRQHandler(void)
  444. {
  445. /* enter interrupt */
  446. rt_interrupt_enter();
  447. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
  448. /* leave interrupt */
  449. rt_interrupt_leave();
  450. }
  451. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
  452. #endif /* BSP_USING_UART2 */
  453. #if defined(BSP_USING_UART3)
  454. void USART3_IRQHandler(void)
  455. {
  456. /* enter interrupt */
  457. rt_interrupt_enter();
  458. uart_isr(&(uart_obj[UART3_INDEX].serial));
  459. /* leave interrupt */
  460. rt_interrupt_leave();
  461. }
  462. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  463. void UART3_DMA_RX_IRQHandler(void)
  464. {
  465. /* enter interrupt */
  466. rt_interrupt_enter();
  467. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
  468. /* leave interrupt */
  469. rt_interrupt_leave();
  470. }
  471. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  472. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
  473. void UART3_DMA_TX_IRQHandler(void)
  474. {
  475. /* enter interrupt */
  476. rt_interrupt_enter();
  477. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
  478. /* leave interrupt */
  479. rt_interrupt_leave();
  480. }
  481. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
  482. #endif /* BSP_USING_UART3*/
  483. #if defined(BSP_USING_UART4)
  484. void UART4_IRQHandler(void)
  485. {
  486. /* enter interrupt */
  487. rt_interrupt_enter();
  488. uart_isr(&(uart_obj[UART4_INDEX].serial));
  489. /* leave interrupt */
  490. rt_interrupt_leave();
  491. }
  492. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  493. void UART4_DMA_RX_IRQHandler(void)
  494. {
  495. /* enter interrupt */
  496. rt_interrupt_enter();
  497. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
  498. /* leave interrupt */
  499. rt_interrupt_leave();
  500. }
  501. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  502. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
  503. void UART4_DMA_TX_IRQHandler(void)
  504. {
  505. /* enter interrupt */
  506. rt_interrupt_enter();
  507. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
  508. /* leave interrupt */
  509. rt_interrupt_leave();
  510. }
  511. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
  512. #endif /* BSP_USING_UART4*/
  513. #if defined(BSP_USING_UART5)
  514. void UART5_IRQHandler(void)
  515. {
  516. /* enter interrupt */
  517. rt_interrupt_enter();
  518. uart_isr(&(uart_obj[UART5_INDEX].serial));
  519. /* leave interrupt */
  520. rt_interrupt_leave();
  521. }
  522. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  523. void UART5_DMA_RX_IRQHandler(void)
  524. {
  525. /* enter interrupt */
  526. rt_interrupt_enter();
  527. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
  528. /* leave interrupt */
  529. rt_interrupt_leave();
  530. }
  531. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  532. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
  533. void UART5_DMA_TX_IRQHandler(void)
  534. {
  535. /* enter interrupt */
  536. rt_interrupt_enter();
  537. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
  538. /* leave interrupt */
  539. rt_interrupt_leave();
  540. }
  541. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
  542. #endif /* BSP_USING_UART5*/
  543. #if defined(BSP_USING_UART6)
  544. void USART6_IRQHandler(void)
  545. {
  546. /* enter interrupt */
  547. rt_interrupt_enter();
  548. uart_isr(&(uart_obj[UART6_INDEX].serial));
  549. /* leave interrupt */
  550. rt_interrupt_leave();
  551. }
  552. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  553. void UART6_DMA_RX_IRQHandler(void)
  554. {
  555. /* enter interrupt */
  556. rt_interrupt_enter();
  557. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
  558. /* leave interrupt */
  559. rt_interrupt_leave();
  560. }
  561. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  562. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
  563. void UART6_DMA_TX_IRQHandler(void)
  564. {
  565. /* enter interrupt */
  566. rt_interrupt_enter();
  567. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
  568. /* leave interrupt */
  569. rt_interrupt_leave();
  570. }
  571. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
  572. #endif /* BSP_USING_UART6*/
  573. #if defined(BSP_USING_UART7)
  574. void UART7_IRQHandler(void)
  575. {
  576. /* enter interrupt */
  577. rt_interrupt_enter();
  578. uart_isr(&(uart_obj[UART7_INDEX].serial));
  579. /* leave interrupt */
  580. rt_interrupt_leave();
  581. }
  582. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
  583. void UART7_DMA_RX_IRQHandler(void)
  584. {
  585. /* enter interrupt */
  586. rt_interrupt_enter();
  587. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_rx.handle);
  588. /* leave interrupt */
  589. rt_interrupt_leave();
  590. }
  591. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
  592. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
  593. void UART7_DMA_TX_IRQHandler(void)
  594. {
  595. /* enter interrupt */
  596. rt_interrupt_enter();
  597. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_tx.handle);
  598. /* leave interrupt */
  599. rt_interrupt_leave();
  600. }
  601. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
  602. #endif /* BSP_USING_UART7*/
  603. #if defined(BSP_USING_UART8)
  604. void UART8_IRQHandler(void)
  605. {
  606. /* enter interrupt */
  607. rt_interrupt_enter();
  608. uart_isr(&(uart_obj[UART8_INDEX].serial));
  609. /* leave interrupt */
  610. rt_interrupt_leave();
  611. }
  612. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
  613. void UART8_DMA_RX_IRQHandler(void)
  614. {
  615. /* enter interrupt */
  616. rt_interrupt_enter();
  617. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_rx.handle);
  618. /* leave interrupt */
  619. rt_interrupt_leave();
  620. }
  621. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
  622. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
  623. void UART8_DMA_TX_IRQHandler(void)
  624. {
  625. /* enter interrupt */
  626. rt_interrupt_enter();
  627. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_tx.handle);
  628. /* leave interrupt */
  629. rt_interrupt_leave();
  630. }
  631. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
  632. #endif /* BSP_USING_UART8*/
  633. #if defined(BSP_USING_LPUART1)
  634. void LPUART1_IRQHandler(void)
  635. {
  636. /* enter interrupt */
  637. rt_interrupt_enter();
  638. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  639. /* leave interrupt */
  640. rt_interrupt_leave();
  641. }
  642. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  643. void LPUART1_DMA_RX_IRQHandler(void)
  644. {
  645. /* enter interrupt */
  646. rt_interrupt_enter();
  647. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
  648. /* leave interrupt */
  649. rt_interrupt_leave();
  650. }
  651. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  652. #endif /* BSP_USING_LPUART1*/
  653. static void stm32_uart_get_dma_config(void)
  654. {
  655. #ifdef BSP_USING_UART1
  656. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  657. #ifdef BSP_UART1_RX_USING_DMA
  658. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  659. static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
  660. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  661. #endif
  662. #ifdef BSP_UART1_TX_USING_DMA
  663. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  664. static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
  665. uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
  666. #endif
  667. #endif
  668. #ifdef BSP_USING_UART2
  669. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  670. #ifdef BSP_UART2_RX_USING_DMA
  671. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  672. static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
  673. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  674. #endif
  675. #ifdef BSP_UART2_TX_USING_DMA
  676. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  677. static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
  678. uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
  679. #endif
  680. #endif
  681. #ifdef BSP_USING_UART3
  682. uart_obj[UART3_INDEX].uart_dma_flag = 0;
  683. #ifdef BSP_UART3_RX_USING_DMA
  684. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  685. static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
  686. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  687. #endif
  688. #ifdef BSP_UART3_TX_USING_DMA
  689. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  690. static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
  691. uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
  692. #endif
  693. #endif
  694. #ifdef BSP_USING_UART4
  695. uart_obj[UART4_INDEX].uart_dma_flag = 0;
  696. #ifdef BSP_UART4_RX_USING_DMA
  697. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  698. static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
  699. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  700. #endif
  701. #ifdef BSP_UART4_TX_USING_DMA
  702. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  703. static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
  704. uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
  705. #endif
  706. #endif
  707. #ifdef BSP_USING_UART5
  708. uart_obj[UART5_INDEX].uart_dma_flag = 0;
  709. #ifdef BSP_UART5_RX_USING_DMA
  710. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  711. static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
  712. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  713. #endif
  714. #ifdef BSP_UART5_TX_USING_DMA
  715. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  716. static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
  717. uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
  718. #endif
  719. #endif
  720. #ifdef BSP_USING_UART6
  721. uart_obj[UART6_INDEX].uart_dma_flag = 0;
  722. #ifdef BSP_UART6_RX_USING_DMA
  723. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  724. static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
  725. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  726. #endif
  727. #ifdef BSP_UART6_TX_USING_DMA
  728. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  729. static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
  730. uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
  731. #endif
  732. #endif
  733. }
  734. #ifdef RT_SERIAL_USING_DMA
  735. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  736. {
  737. struct rt_serial_rx_fifo *rx_fifo;
  738. DMA_HandleTypeDef *DMA_Handle;
  739. struct dma_config *dma_config;
  740. struct stm32_uart *uart;
  741. RT_ASSERT(serial != RT_NULL);
  742. uart = rt_container_of(serial, struct stm32_uart, serial);
  743. if (RT_DEVICE_FLAG_DMA_RX == flag)
  744. {
  745. DMA_Handle = &uart->dma_rx.handle;
  746. dma_config = uart->config->dma_rx;
  747. }
  748. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  749. {
  750. DMA_Handle = &uart->dma_tx.handle;
  751. dma_config = uart->config->dma_tx;
  752. }
  753. LOG_D("%s dma config start", uart->config->name);
  754. {
  755. rt_uint32_t tmpreg = 0x00U;
  756. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  757. || defined(SOC_SERIES_STM32L0)
  758. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  759. SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
  760. tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
  761. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) \
  762. || defined(SOC_SERIES_STM32G4)|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32WB)
  763. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  764. SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  765. tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  766. #elif defined(SOC_SERIES_STM32MP1)
  767. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  768. SET_BIT(RCC->MP_AHB2ENSETR, dma_config->dma_rcc);
  769. tmpreg = READ_BIT(RCC->MP_AHB2ENSETR, dma_config->dma_rcc);
  770. #endif
  771. #if (defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)) && defined(DMAMUX1)
  772. /* enable DMAMUX clock for L4+ and G4 */
  773. __HAL_RCC_DMAMUX1_CLK_ENABLE();
  774. #elif defined(SOC_SERIES_STM32MP1)
  775. __HAL_RCC_DMAMUX_CLK_ENABLE();
  776. #endif
  777. UNUSED(tmpreg); /* To avoid compiler warnings */
  778. }
  779. if (RT_DEVICE_FLAG_DMA_RX == flag)
  780. {
  781. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
  782. }
  783. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  784. {
  785. __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
  786. }
  787. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  788. DMA_Handle->Instance = dma_config->Instance;
  789. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  790. DMA_Handle->Instance = dma_config->Instance;
  791. DMA_Handle->Init.Channel = dma_config->channel;
  792. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)\
  793. || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
  794. DMA_Handle->Instance = dma_config->Instance;
  795. DMA_Handle->Init.Request = dma_config->request;
  796. #endif
  797. DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
  798. DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
  799. DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  800. DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  801. if (RT_DEVICE_FLAG_DMA_RX == flag)
  802. {
  803. DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
  804. DMA_Handle->Init.Mode = DMA_CIRCULAR;
  805. }
  806. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  807. {
  808. DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
  809. DMA_Handle->Init.Mode = DMA_NORMAL;
  810. }
  811. DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
  812. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
  813. DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  814. #endif
  815. if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
  816. {
  817. RT_ASSERT(0);
  818. }
  819. if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
  820. {
  821. RT_ASSERT(0);
  822. }
  823. /* enable interrupt */
  824. if (flag == RT_DEVICE_FLAG_DMA_RX)
  825. {
  826. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  827. /* Start DMA transfer */
  828. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  829. {
  830. /* Transfer error in reception process */
  831. RT_ASSERT(0);
  832. }
  833. CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
  834. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  835. }
  836. /* DMA irq should set in DMA TX mode, or HAL_UART_TxCpltCallback function will not be called */
  837. HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
  838. HAL_NVIC_EnableIRQ(dma_config->dma_irq);
  839. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  840. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  841. LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
  842. LOG_D("%s dma config done", uart->config->name);
  843. }
  844. /**
  845. * @brief UART error callbacks
  846. * @param huart: UART handle
  847. * @note This example shows a simple way to report transfer error, and you can
  848. * add your own implementation.
  849. * @retval None
  850. */
  851. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  852. {
  853. RT_ASSERT(huart != NULL);
  854. struct stm32_uart *uart = (struct stm32_uart *)huart;
  855. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  856. UNUSED(uart);
  857. }
  858. /**
  859. * @brief Rx Transfer completed callback
  860. * @param huart: UART handle
  861. * @note This example shows a simple way to report end of DMA Rx transfer, and
  862. * you can add your own implementation.
  863. * @retval None
  864. */
  865. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  866. {
  867. struct stm32_uart *uart;
  868. RT_ASSERT(huart != NULL);
  869. uart = (struct stm32_uart *)huart;
  870. dma_isr(&uart->serial);
  871. }
  872. /**
  873. * @brief Rx Half transfer completed callback
  874. * @param huart: UART handle
  875. * @note This example shows a simple way to report end of DMA Rx Half transfer,
  876. * and you can add your own implementation.
  877. * @retval None
  878. */
  879. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
  880. {
  881. struct stm32_uart *uart;
  882. RT_ASSERT(huart != NULL);
  883. uart = (struct stm32_uart *)huart;
  884. dma_isr(&uart->serial);
  885. }
  886. static void _dma_tx_complete(struct rt_serial_device *serial)
  887. {
  888. struct stm32_uart *uart;
  889. rt_size_t trans_total_index;
  890. rt_base_t level;
  891. RT_ASSERT(serial != RT_NULL);
  892. uart = rt_container_of(serial, struct stm32_uart, serial);
  893. level = rt_hw_interrupt_disable();
  894. trans_total_index = __HAL_DMA_GET_COUNTER(&(uart->dma_tx.handle));
  895. rt_hw_interrupt_enable(level);
  896. if (trans_total_index == 0)
  897. {
  898. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE);
  899. }
  900. }
  901. /**
  902. * @brief HAL_UART_TxCpltCallback
  903. * @param huart: UART handle
  904. * @note This callback can be called by two functions, first in UART_EndTransmit_IT when
  905. * UART Tx complete and second in UART_DMATransmitCplt function in DMA Circular mode.
  906. * @retval None
  907. */
  908. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
  909. {
  910. struct stm32_uart *uart;
  911. RT_ASSERT(huart != NULL);
  912. uart = (struct stm32_uart *)huart;
  913. _dma_tx_complete(&uart->serial);
  914. }
  915. #endif /* RT_SERIAL_USING_DMA */
  916. static const struct rt_uart_ops stm32_uart_ops =
  917. {
  918. .configure = stm32_configure,
  919. .control = stm32_control,
  920. .putc = stm32_putc,
  921. .getc = stm32_getc,
  922. .dma_transmit = stm32_dma_transmit
  923. };
  924. int rt_hw_usart_init(void)
  925. {
  926. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  927. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  928. rt_err_t result = 0;
  929. stm32_uart_get_dma_config();
  930. for (int i = 0; i < obj_num; i++)
  931. {
  932. /* init UART object */
  933. uart_obj[i].config = &uart_config[i];
  934. uart_obj[i].serial.ops = &stm32_uart_ops;
  935. uart_obj[i].serial.config = config;
  936. /* register UART device */
  937. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  938. RT_DEVICE_FLAG_RDWR
  939. | RT_DEVICE_FLAG_INT_RX
  940. | RT_DEVICE_FLAG_INT_TX
  941. | uart_obj[i].uart_dma_flag
  942. , NULL);
  943. RT_ASSERT(result == RT_EOK);
  944. }
  945. return result;
  946. }
  947. #endif /* RT_USING_SERIAL */