drv_crypto.c 5.5 KB

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  1. /*
  2. * Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-07-10 lik first version
  9. */
  10. #include "drv_crypto.h"
  11. #include <string.h>
  12. #ifdef RT_USING_HWCRYPTO
  13. struct swm_hwcrypto_device
  14. {
  15. struct rt_hwcrypto_device dev;
  16. struct rt_mutex mutex;
  17. };
  18. #ifdef BSP_USING_CRC
  19. struct hash_ctx_des
  20. {
  21. struct swm_crc_cfg contex;
  22. };
  23. static struct hwcrypto_crc_cfg crc_backup_cfg;
  24. static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
  25. {
  26. rt_uint32_t result = 0;
  27. struct swm_hwcrypto_device *swm_hw_dev = (struct swm_hwcrypto_device *)ctx->parent.device->user_data;
  28. struct swm_crc_cfg *hw_crc_cfg = (struct swm_crc_cfg *)(ctx->parent.contex);
  29. rt_mutex_take(&swm_hw_dev->mutex, RT_WAITING_FOREVER);
  30. if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
  31. {
  32. hw_crc_cfg->CRCx = CRC;
  33. hw_crc_cfg->inival = ctx->crc_cfg.last_val;
  34. switch (ctx->crc_cfg.width)
  35. {
  36. case 8:
  37. hw_crc_cfg->crc_inbits = 2;
  38. break;
  39. case 16:
  40. hw_crc_cfg->crc_inbits = 1;
  41. break;
  42. case 32:
  43. hw_crc_cfg->crc_inbits = 0;
  44. break;
  45. default:
  46. goto _exit;
  47. }
  48. switch (ctx->crc_cfg.poly)
  49. {
  50. case 0x1021:
  51. hw_crc_cfg->crc_1632 = 1;
  52. break;
  53. case 0x04C11DB7:
  54. hw_crc_cfg->crc_1632 = 0;
  55. break;
  56. default:
  57. goto _exit;
  58. }
  59. hw_crc_cfg->crc_out_not = 0;
  60. switch (ctx->crc_cfg.flags)
  61. {
  62. case 0:
  63. case CRC_FLAG_REFIN:
  64. hw_crc_cfg->crc_out_rev = 0;
  65. break;
  66. case CRC_FLAG_REFOUT:
  67. case CRC_FLAG_REFIN | CRC_FLAG_REFOUT:
  68. hw_crc_cfg->crc_out_rev = 1;
  69. break;
  70. default:
  71. goto _exit;
  72. }
  73. CRC_Init(hw_crc_cfg->CRCx, (hw_crc_cfg->crc_inbits << 1) | hw_crc_cfg->crc_1632, hw_crc_cfg->crc_out_not, hw_crc_cfg->crc_out_rev, hw_crc_cfg->inival);
  74. memcpy(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
  75. }
  76. for (uint32_t i = 0; i < length; i++)
  77. CRC_Write((uint32_t)in[i]);
  78. result = CRC_Result();
  79. ctx->crc_cfg.last_val = result;
  80. crc_backup_cfg.last_val = ctx->crc_cfg.last_val;
  81. result = (result ? result ^ (ctx->crc_cfg.xorout) : result);
  82. _exit:
  83. rt_mutex_release(&swm_hw_dev->mutex);
  84. return result;
  85. }
  86. static const struct hwcrypto_crc_ops crc_ops =
  87. {
  88. .update = _crc_update,
  89. };
  90. static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
  91. {
  92. rt_err_t res = RT_EOK;
  93. switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
  94. {
  95. #if defined(BSP_USING_CRC)
  96. case HWCRYPTO_TYPE_CRC:
  97. {
  98. struct swm_crc_cfg *contex = rt_calloc(1, sizeof(struct swm_crc_cfg));
  99. if (RT_NULL == contex)
  100. {
  101. res = -RT_ERROR;
  102. break;
  103. }
  104. contex->CRCx = DEFAULT_CRC;
  105. contex->inival = DEFAULT_INIVAL;
  106. contex->crc_inbits = DEFAULT_INBITS;
  107. contex->crc_1632 = DEFAULT_CRC1632;
  108. contex->crc_out_not = DEFAULT_OUT_NOT;
  109. contex->crc_out_rev = DEFAULT_OUT_REV;
  110. ctx->contex = contex;
  111. ((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
  112. break;
  113. }
  114. #endif /* BSP_USING_CRC */
  115. default:
  116. res = -RT_ERROR;
  117. break;
  118. }
  119. return res;
  120. }
  121. static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
  122. {
  123. struct swm_crc_cfg *hw_crc_cfg = (struct swm_crc_cfg *)(ctx->contex);
  124. switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
  125. {
  126. #if defined(BSP_USING_CRC)
  127. case HWCRYPTO_TYPE_CRC:
  128. hw_crc_cfg->CRCx->CR &= ~CRC_CR_EN_Msk;
  129. break;
  130. #endif /* BSP_USING_CRC */
  131. default:
  132. break;
  133. }
  134. rt_free(ctx->contex);
  135. }
  136. static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
  137. {
  138. rt_err_t res = RT_EOK;
  139. switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
  140. {
  141. #if defined(BSP_USING_CRC)
  142. case HWCRYPTO_TYPE_CRC:
  143. if (des->contex && src->contex)
  144. {
  145. rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
  146. }
  147. break;
  148. #endif /* BSP_USING_CRC */
  149. default:
  150. res = -RT_ERROR;
  151. break;
  152. }
  153. return res;
  154. }
  155. static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
  156. {
  157. struct swm_crc_cfg *hw_crc_cfg = (struct swm_crc_cfg *)(ctx->contex);
  158. switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
  159. {
  160. #if defined(BSP_USING_CRC)
  161. case HWCRYPTO_TYPE_CRC:
  162. hw_crc_cfg->CRCx->CR &= ~CRC_CR_EN_Msk;
  163. break;
  164. #endif /* BSP_USING_CRC */
  165. default:
  166. break;
  167. }
  168. }
  169. static const struct rt_hwcrypto_ops _ops =
  170. {
  171. .create = _crypto_create,
  172. .destroy = _crypto_destroy,
  173. .copy = _crypto_clone,
  174. .reset = _crypto_reset,
  175. };
  176. int rt_hw_crypto_init(void)
  177. {
  178. static struct swm_hwcrypto_device _crypto_dev;
  179. rt_uint32_t cpuid[2] = {0};
  180. _crypto_dev.dev.ops = &_ops;
  181. cpuid[0] = SCB->CPUID;
  182. _crypto_dev.dev.id = 0;
  183. rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
  184. _crypto_dev.dev.user_data = &_crypto_dev;
  185. if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
  186. {
  187. return -1;
  188. }
  189. rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_FIFO);
  190. return 0;
  191. }
  192. INIT_BOARD_EXPORT(rt_hw_crypto_init);
  193. #endif /* BSP_USING_WDT */
  194. #endif /* RT_USING_WDT */