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context_rvds.S 4.7 KB

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  1. ;/*
  2. ; * File : context.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2009-01-17 Bernard first version
  13. ; */
  14. ;/**
  15. ; * @addtogroup STM32
  16. ; */
  17. ;/*@{*/
  18. NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
  19. NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
  20. NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
  21. NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
  22. AREA |.text|, CODE, READONLY, ALIGN=2
  23. THUMB
  24. REQUIRE8
  25. PRESERVE8
  26. IMPORT rt_thread_switch_interrput_flag
  27. IMPORT rt_interrupt_from_thread
  28. IMPORT rt_interrupt_to_thread
  29. ;/*
  30. ; * rt_base_t rt_hw_interrupt_disable();
  31. ; */
  32. rt_hw_interrupt_disable PROC
  33. EXPORT rt_hw_interrupt_disable
  34. MRS r0, PRIMASK
  35. CPSID I
  36. BX LR
  37. ENDP
  38. ;/*
  39. ; * void rt_hw_interrupt_enable(rt_base_t level);
  40. ; */
  41. rt_hw_interrupt_enable PROC
  42. EXPORT rt_hw_interrupt_enable
  43. MSR PRIMASK, r0
  44. BX LR
  45. ENDP
  46. ;/*
  47. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  48. ; * r0 --> from
  49. ; * r1 --> to
  50. ; */
  51. rt_hw_context_switch PROC
  52. EXPORT rt_hw_context_switch
  53. ; set rt_thread_switch_interrput_flag to 1
  54. LDR r2, =rt_thread_switch_interrput_flag
  55. LDR r3, [r2]
  56. MOV r3, #1
  57. STR r3, [r2]
  58. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  59. STR r0, [r2]
  60. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  61. STR r1, [r2]
  62. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  63. LDR r1, =NVIC_PENDSVSET
  64. STR r1, [r0]
  65. ; CPSIE I ; enable interrupts at processor level
  66. BX LR
  67. ENDP
  68. ; r0 --> swith from thread stack
  69. ; r1 --> swith to thread stack
  70. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  71. rt_hw_pend_sv PROC
  72. EXPORT rt_hw_pend_sv
  73. ; clear rt_thread_switch_interrput_flag to 0
  74. LDR r0, =rt_thread_switch_interrput_flag
  75. MOV r1, #0x00
  76. STR r1, [r0]
  77. LDR r0, =rt_interrupt_from_thread
  78. LDR r1, [r0]
  79. CBZ r1, swtich_to_thread ; skip register save at the first time
  80. MRS r1, psp ; get from thread stack pointer
  81. STMFD r1!, {r4 - r11} ; push r4 - r11 register
  82. LDR r0, [r0]
  83. STR r1, [r0] ; update from thread stack pointer
  84. swtich_to_thread
  85. LDR r1, =rt_interrupt_to_thread
  86. LDR r1, [r1]
  87. LDR r1, [r1] ; load thread stack pointer
  88. LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
  89. MSR psp, r1 ; update stack pointer
  90. ORR lr, lr, #0x04
  91. BX lr
  92. ENDP
  93. ;/*
  94. ; * void rt_hw_context_switch_to(rt_uint32 to);
  95. ; * r0 --> to
  96. ; */
  97. rt_hw_context_switch_to PROC
  98. EXPORT rt_hw_context_switch_to
  99. LDR r1, =rt_interrupt_to_thread
  100. STR r0, [r1]
  101. ; set from thread to 0
  102. LDR r1, =rt_interrupt_from_thread
  103. MOV r0, #0x0
  104. STR r0, [r1]
  105. ; set the PendSV exception priority
  106. LDR r0, =NVIC_SYSPRI2
  107. LDR r1, =NVIC_PENDSV_PRI
  108. STR r1, [r0]
  109. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  110. LDR r1, =NVIC_PENDSVSET
  111. STR r1, [r0]
  112. CPSIE I ; enable interrupts at processor level
  113. ; never reach here!
  114. ENDP
  115. ;/*
  116. ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)
  117. ; * {
  118. ; * if (rt_thread_switch_interrput_flag == 1)
  119. ; * {
  120. ; * rt_interrupt_to_thread = to;
  121. ; * }
  122. ; * else
  123. ; * {
  124. ; * rt_thread_switch_interrput_flag = 1;
  125. ; * rt_interrupt_from_thread = from;
  126. ; * rt_interrupt_to_thread = to;
  127. ; * }
  128. ; * }
  129. ; */
  130. rt_hw_context_switch_interrupt PROC
  131. EXPORT rt_hw_context_switch_interrupt
  132. LDR r2, =rt_thread_switch_interrput_flag
  133. LDR r3, [r2]
  134. CMP r3, #1
  135. BEQ _reswitch
  136. MOV r3, #1 ; set rt_thread_switch_interrput_flag to 1
  137. STR r3, [r2]
  138. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  139. STR r0, [r2]
  140. _reswitch
  141. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  142. STR r1, [r2]
  143. BX lr
  144. ENDP
  145. rt_hw_interrupt_thread_switch PROC
  146. EXPORT rt_hw_interrupt_thread_switch
  147. LDR r0, =rt_thread_switch_interrput_flag
  148. LDR r1, [r0]
  149. CBZ r1, _no_switch
  150. ; clear rt_thread_switch_interrput_flag to 0
  151. ; MOV r1, #0x00
  152. ; STR r1, [r0]
  153. ; trigger context switch
  154. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  155. LDR r1, =NVIC_PENDSVSET
  156. STR r1, [r0]
  157. _no_switch
  158. BX lr
  159. NOP
  160. ENDP
  161. END