fsl_ctimer.h 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
  1. /*
  2. * Copyright (c) 2016, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #ifndef _FSL_CTIMER_H_
  31. #define _FSL_CTIMER_H_
  32. #include "fsl_common.h"
  33. /*!
  34. * @addtogroup ctimer
  35. * @{
  36. */
  37. /*! @file */
  38. /*******************************************************************************
  39. * Definitions
  40. ******************************************************************************/
  41. /*! @name Driver version */
  42. /*@{*/
  43. #define FSL_CTIMER_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
  44. /*@}*/
  45. /*! @brief List of Timer capture channels */
  46. typedef enum _ctimer_capture_channel
  47. {
  48. kCTIMER_Capture_0 = 0U, /*!< Timer capture channel 0 */
  49. kCTIMER_Capture_1, /*!< Timer capture channel 1 */
  50. kCTIMER_Capture_2, /*!< Timer capture channel 2 */
  51. kCTIMER_Capture_3 /*!< Timer capture channel 3 */
  52. } ctimer_capture_channel_t;
  53. /*! @brief List of capture edge options */
  54. typedef enum _ctimer_capture_edge
  55. {
  56. kCTIMER_Capture_RiseEdge = 1U, /*!< Capture on rising edge */
  57. kCTIMER_Capture_FallEdge = 2U, /*!< Capture on falling edge */
  58. kCTIMER_Capture_BothEdge = 3U, /*!< Capture on rising and falling edge */
  59. } ctimer_capture_edge_t;
  60. /*! @brief List of Timer match registers */
  61. typedef enum _ctimer_match
  62. {
  63. kCTIMER_Match_0 = 0U, /*!< Timer match register 0 */
  64. kCTIMER_Match_1, /*!< Timer match register 1 */
  65. kCTIMER_Match_2, /*!< Timer match register 2 */
  66. kCTIMER_Match_3 /*!< Timer match register 3 */
  67. } ctimer_match_t;
  68. /*! @brief List of output control options */
  69. typedef enum _ctimer_match_output_control
  70. {
  71. kCTIMER_Output_NoAction = 0U, /*!< No action is taken */
  72. kCTIMER_Output_Clear, /*!< Clear the EM bit/output to 0 */
  73. kCTIMER_Output_Set, /*!< Set the EM bit/output to 1 */
  74. kCTIMER_Output_Toggle /*!< Toggle the EM bit/output */
  75. } ctimer_match_output_control_t;
  76. /*! @brief List of Timer modes */
  77. typedef enum _ctimer_timer_mode
  78. {
  79. kCTIMER_TimerMode = 0U, /* TC is incremented every rising APB bus clock edge */
  80. kCTIMER_IncreaseOnRiseEdge, /* TC is incremented on rising edge of input signal */
  81. kCTIMER_IncreaseOnFallEdge, /* TC is incremented on falling edge of input signal */
  82. kCTIMER_IncreaseOnBothEdge /* TC is incremented on both edges of input signal */
  83. } ctimer_timer_mode_t;
  84. /*! @brief List of Timer interrupts */
  85. typedef enum _ctimer_interrupt_enable
  86. {
  87. kCTIMER_Match0InterruptEnable = CTIMER_MCR_MR0I_MASK, /*!< Match 0 interrupt */
  88. kCTIMER_Match1InterruptEnable = CTIMER_MCR_MR1I_MASK, /*!< Match 1 interrupt */
  89. kCTIMER_Match2InterruptEnable = CTIMER_MCR_MR2I_MASK, /*!< Match 2 interrupt */
  90. kCTIMER_Match3InterruptEnable = CTIMER_MCR_MR3I_MASK, /*!< Match 3 interrupt */
  91. kCTIMER_Capture0InterruptEnable = CTIMER_CCR_CAP0I_MASK, /*!< Capture 0 interrupt */
  92. kCTIMER_Capture1InterruptEnable = CTIMER_CCR_CAP1I_MASK, /*!< Capture 1 interrupt */
  93. kCTIMER_Capture2InterruptEnable = CTIMER_CCR_CAP2I_MASK, /*!< Capture 2 interrupt */
  94. kCTIMER_Capture3InterruptEnable = CTIMER_CCR_CAP3I_MASK, /*!< Capture 3 interrupt */
  95. } ctimer_interrupt_enable_t;
  96. /*! @brief List of Timer flags */
  97. typedef enum _ctimer_status_flags
  98. {
  99. kCTIMER_Match0Flag = CTIMER_IR_MR0INT_MASK, /*!< Match 0 interrupt flag */
  100. kCTIMER_Match1Flag = CTIMER_IR_MR1INT_MASK, /*!< Match 1 interrupt flag */
  101. kCTIMER_Match2Flag = CTIMER_IR_MR2INT_MASK, /*!< Match 2 interrupt flag */
  102. kCTIMER_Match3Flag = CTIMER_IR_MR3INT_MASK, /*!< Match 3 interrupt flag */
  103. kCTIMER_Capture0Flag = CTIMER_IR_CR0INT_MASK, /*!< Capture 0 interrupt flag */
  104. kCTIMER_Capture1Flag = CTIMER_IR_CR1INT_MASK, /*!< Capture 1 interrupt flag */
  105. kCTIMER_Capture2Flag = CTIMER_IR_CR2INT_MASK, /*!< Capture 2 interrupt flag */
  106. kCTIMER_Capture3Flag = CTIMER_IR_CR3INT_MASK, /*!< Capture 3 interrupt flag */
  107. } ctimer_status_flags_t;
  108. typedef void (*ctimer_callback_t)(uint32_t flags);
  109. /*! @brief Callback type when registering for a callback. When registering a callback
  110. * an array of function pointers is passed the size could be 1 or 8, the callback
  111. * type will tell that.
  112. */
  113. typedef enum
  114. {
  115. kCTIMER_SingleCallback, /*!< Single Callback type where there is only one callback for the timer.
  116. based on the status flags different channels needs to be handled differently */
  117. kCTIMER_MultipleCallback /*!< Multiple Callback type where there can be 8 valid callbacks, one per channel.
  118. for both match/capture */
  119. } ctimer_callback_type_t;
  120. /*!
  121. * @brief Match configuration
  122. *
  123. * This structure holds the configuration settings for each match register.
  124. */
  125. typedef struct _ctimer_match_config
  126. {
  127. uint32_t matchValue; /*!< This is stored in the match register */
  128. bool enableCounterReset; /*!< true: Match will reset the counter
  129. false: Match will not reser the counter */
  130. bool enableCounterStop; /*!< true: Match will stop the counter
  131. false: Match will not stop the counter */
  132. ctimer_match_output_control_t outControl; /*!< Action to be taken on a match on the EM bit/output */
  133. bool outPinInitState; /*!< Initial value of the EM bit/output */
  134. bool enableInterrupt; /*!< true: Generate interrupt upon match
  135. false: Do not generate interrupt on match */
  136. } ctimer_match_config_t;
  137. /*!
  138. * @brief Timer configuration structure
  139. *
  140. * This structure holds the configuration settings for the Timer peripheral. To initialize this
  141. * structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a
  142. * pointer to the configuration structure instance.
  143. *
  144. * The configuration structure can be made constant so as to reside in flash.
  145. */
  146. typedef struct _ctimer_config
  147. {
  148. ctimer_timer_mode_t mode; /*!< Timer mode */
  149. ctimer_capture_channel_t input; /*!< Input channel to increment the timer, used only in timer
  150. modes that rely on this input signal to increment TC */
  151. uint32_t prescale; /*!< Prescale value */
  152. } ctimer_config_t;
  153. /*******************************************************************************
  154. * API
  155. ******************************************************************************/
  156. #if defined(__cplusplus)
  157. extern "C" {
  158. #endif
  159. /*!
  160. * @name Initialization and deinitialization
  161. * @{
  162. */
  163. /*!
  164. * @brief Ungates the clock and configures the peripheral for basic operation.
  165. *
  166. * @note This API should be called at the beginning of the application before using the driver.
  167. *
  168. * @param base Ctimer peripheral base address
  169. * @param config Pointer to the user configuration structure.
  170. */
  171. void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config);
  172. /*!
  173. * @brief Gates the timer clock.
  174. *
  175. * @param base Ctimer peripheral base address
  176. */
  177. void CTIMER_Deinit(CTIMER_Type *base);
  178. /*!
  179. * @brief Fills in the timers configuration structure with the default settings.
  180. *
  181. * The default values are:
  182. * @code
  183. * config->mode = kCTIMER_TimerMode;
  184. * config->input = kCTIMER_Capture_0;
  185. * config->prescale = 0;
  186. * @endcode
  187. * @param config Pointer to the user configuration structure.
  188. */
  189. void CTIMER_GetDefaultConfig(ctimer_config_t *config);
  190. /*! @}*/
  191. /*!
  192. * @name PWM setup operations
  193. * @{
  194. */
  195. /*!
  196. * @brief Configures the PWM signal parameters.
  197. *
  198. * Enables PWM mode on the match channel passed in and will then setup the match value
  199. * and other match parameters to generate a PWM signal.
  200. * This function will assign match channel 3 to set the PWM cycle.
  201. *
  202. * @note When setting PWM output from multiple output pins, all should use the same PWM
  203. * frequency
  204. *
  205. * @param base Ctimer peripheral base address
  206. * @param matchChannel Match pin to be used to output the PWM signal
  207. * @param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
  208. * @param pwmFreq_Hz PWM signal frequency in Hz
  209. * @param srcClock_Hz Timer counter clock in Hz
  210. * @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
  211. * if it is 0 then no interrupt is generated
  212. *
  213. * @return kStatus_Success on success
  214. * kStatus_Fail If matchChannel passed in is 3; this channel is reserved to set the PWM cycle
  215. */
  216. status_t CTIMER_SetupPwm(CTIMER_Type *base,
  217. ctimer_match_t matchChannel,
  218. uint8_t dutyCyclePercent,
  219. uint32_t pwmFreq_Hz,
  220. uint32_t srcClock_Hz,
  221. bool enableInt);
  222. /*!
  223. * @brief Updates the duty cycle of an active PWM signal.
  224. *
  225. * @param base Ctimer peripheral base address
  226. * @param matchChannel Match pin to be used to output the PWM signal
  227. * @param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
  228. */
  229. void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, ctimer_match_t matchChannel, uint8_t dutyCyclePercent);
  230. /*! @}*/
  231. /*!
  232. * @brief Setup the match register.
  233. *
  234. * User configuration is used to setup the match value and action to be taken when a match occurs.
  235. *
  236. * @param base Ctimer peripheral base address
  237. * @param matchChannel Match register to configure
  238. * @param config Pointer to the match configuration structure
  239. */
  240. void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config);
  241. /*!
  242. * @brief Setup the capture.
  243. *
  244. * @param base Ctimer peripheral base address
  245. * @param capture Capture channel to configure
  246. * @param edge Edge on the channel that will trigger a capture
  247. * @param enableInt Flag to enable channel interrupts, if enabled then the registered call back
  248. * is called upon capture
  249. */
  250. void CTIMER_SetupCapture(CTIMER_Type *base,
  251. ctimer_capture_channel_t capture,
  252. ctimer_capture_edge_t edge,
  253. bool enableInt);
  254. /*!
  255. * @brief Register callback.
  256. *
  257. * @param base Ctimer peripheral base address
  258. * @param cb_func callback function
  259. * @param cb_type callback function type, singular or multiple
  260. */
  261. void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type);
  262. /*!
  263. * @name Interrupt Interface
  264. * @{
  265. */
  266. /*!
  267. * @brief Enables the selected Timer interrupts.
  268. *
  269. * @param base Ctimer peripheral base address
  270. * @param mask The interrupts to enable. This is a logical OR of members of the
  271. * enumeration ::ctimer_interrupt_enable_t
  272. */
  273. static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
  274. {
  275. /* Enable match interrupts */
  276. base->MCR |= mask;
  277. /* Enable capture interrupts */
  278. base->CCR |= mask;
  279. }
  280. /*!
  281. * @brief Disables the selected Timer interrupts.
  282. *
  283. * @param base Ctimer peripheral base address
  284. * @param mask The interrupts to enable. This is a logical OR of members of the
  285. * enumeration ::ctimer_interrupt_enable_t
  286. */
  287. static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
  288. {
  289. /* Disable match interrupts */
  290. base->MCR &= ~mask;
  291. /* Disable capture interrupts */
  292. base->CCR &= ~mask;
  293. }
  294. /*!
  295. * @brief Gets the enabled Timer interrupts.
  296. *
  297. * @param base Ctimer peripheral base address
  298. *
  299. * @return The enabled interrupts. This is the logical OR of members of the
  300. * enumeration ::ctimer_interrupt_enable_t
  301. */
  302. static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
  303. {
  304. uint32_t enabledIntrs = 0;
  305. /* Get all the match interrupts enabled */
  306. enabledIntrs =
  307. base->MCR & (CTIMER_MCR_MR0I_SHIFT | CTIMER_MCR_MR1I_SHIFT | CTIMER_MCR_MR2I_SHIFT | CTIMER_MCR_MR3I_SHIFT);
  308. /* Get all the capture interrupts enabled */
  309. enabledIntrs |=
  310. base->CCR & (CTIMER_CCR_CAP0I_SHIFT | CTIMER_CCR_CAP1I_SHIFT | CTIMER_CCR_CAP2I_SHIFT | CTIMER_CCR_CAP3I_SHIFT);
  311. return enabledIntrs;
  312. }
  313. /*! @}*/
  314. /*!
  315. * @name Status Interface
  316. * @{
  317. */
  318. /*!
  319. * @brief Gets the Timer status flags.
  320. *
  321. * @param base Ctimer peripheral base address
  322. *
  323. * @return The status flags. This is the logical OR of members of the
  324. * enumeration ::ctimer_status_flags_t
  325. */
  326. static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
  327. {
  328. return base->IR;
  329. }
  330. /*!
  331. * @brief Clears the Timer status flags.
  332. *
  333. * @param base Ctimer peripheral base address
  334. * @param mask The status flags to clear. This is a logical OR of members of the
  335. * enumeration ::ctimer_status_flags_t
  336. */
  337. static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
  338. {
  339. base->IR = mask;
  340. }
  341. /*! @}*/
  342. /*!
  343. * @name Counter Start and Stop
  344. * @{
  345. */
  346. /*!
  347. * @brief Starts the Timer counter.
  348. *
  349. * @param base Ctimer peripheral base address
  350. */
  351. static inline void CTIMER_StartTimer(CTIMER_Type *base)
  352. {
  353. base->TCR |= CTIMER_TCR_CEN_MASK;
  354. }
  355. /*!
  356. * @brief Stops the Timer counter.
  357. *
  358. * @param base Ctimer peripheral base address
  359. */
  360. static inline void CTIMER_StopTimer(CTIMER_Type *base)
  361. {
  362. base->TCR &= ~CTIMER_TCR_CEN_MASK;
  363. }
  364. /*! @}*/
  365. /*!
  366. * @brief Reset the counter.
  367. *
  368. * The timer counter and prescale counter are reset on the next positive edge of the APB clock.
  369. *
  370. * @param base Ctimer peripheral base address
  371. */
  372. static inline void CTIMER_Reset(CTIMER_Type *base)
  373. {
  374. base->TCR |= CTIMER_TCR_CRST_MASK;
  375. base->TCR &= ~CTIMER_TCR_CRST_MASK;
  376. }
  377. #if defined(__cplusplus)
  378. }
  379. #endif
  380. /*! @}*/
  381. #endif /* _FSL_CTIMER_H_ */