serial_dm.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154
  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-11-16 GuEe-GUI first version
  9. */
  10. #include <rtatomic.h>
  11. #include "serial_dm.h"
  12. int serial_dev_set_name(struct rt_serial_device *sdev)
  13. {
  14. int id = -1;
  15. static int uid_min = -1;
  16. static volatile rt_atomic_t uid = 0;
  17. RT_ASSERT(sdev != RT_NULL);
  18. #ifdef RT_USING_OFW
  19. if (sdev->parent.ofw_node)
  20. {
  21. id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "serial");
  22. if (id < 0)
  23. {
  24. id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "uart");
  25. }
  26. if (uid_min < 0)
  27. {
  28. uid_min = rt_ofw_get_alias_last_id("serial");
  29. if (uid_min < 0)
  30. {
  31. uid_min = rt_ofw_get_alias_last_id("uart");
  32. }
  33. uid_min = uid_min < 0 ? 0 : (uid_min + 1);
  34. rt_hw_atomic_store(&uid, uid_min);
  35. }
  36. }
  37. #endif
  38. if (id < 0)
  39. {
  40. id = (int)rt_hw_atomic_add(&uid, 1);
  41. }
  42. return rt_dm_dev_set_name(&sdev->parent, "uart%u", id);
  43. }
  44. void *serial_base_from_args(char *str)
  45. {
  46. rt_ubase_t base = 0;
  47. while (*str && !(*str == 'x' || *str == 'X'))
  48. {
  49. ++str;
  50. }
  51. ++str;
  52. /* The str may get from bootargs that we need check it */
  53. while (*str)
  54. {
  55. if ((*str >= 'a' && *str <= 'f') || (*str >= 'A' && *str <= 'F'))
  56. {
  57. base = (base << 4) | (((*str | ' ') - 'a') + 10);
  58. }
  59. else if (*str >= '0' && *str <= '9')
  60. {
  61. base = (base << 4) | (*str - '0');
  62. }
  63. else break;
  64. ++str;
  65. }
  66. return (void *)base;
  67. }
  68. struct serial_configure serial_cfg_from_args(char *str)
  69. {
  70. struct serial_configure cfg = RT_SERIAL_CONFIG_DEFAULT;
  71. /* Format baudrate/parity/bits/flow (BBBBPNF), Default is 115200n8 */
  72. if (str && *str)
  73. {
  74. rt_uint32_t baudrate = 0;
  75. /* BBBB is the speed */
  76. while (*str && (*str >= '0' && *str <= '9'))
  77. {
  78. baudrate *= 10;
  79. baudrate += *str - '0';
  80. ++str;
  81. }
  82. if (baudrate)
  83. {
  84. cfg.baud_rate = baudrate;
  85. }
  86. /* P is parity (n/o/e) */
  87. switch (*str)
  88. {
  89. case 'n':
  90. cfg.parity = PARITY_NONE;
  91. break;
  92. case 'o':
  93. cfg.parity = PARITY_ODD;
  94. break;
  95. case 'e':
  96. cfg.parity = PARITY_EVEN;
  97. break;
  98. default:
  99. --str;
  100. break;
  101. }
  102. ++str;
  103. /* N is number of bits */
  104. if (*str && (*str >= '0' && *str <= '9'))
  105. {
  106. cfg.data_bits = *str - '0';
  107. ++str;
  108. }
  109. /* F is flow ontrol ('r' for RTS) */
  110. if (*str)
  111. {
  112. cfg.flowcontrol = (*str == 'r' ? RT_SERIAL_FLOWCONTROL_CTSRTS : RT_SERIAL_FLOWCONTROL_NONE);
  113. ++str;
  114. }
  115. #ifdef RT_USING_OFW
  116. if (*str == '\0')
  117. {
  118. const char earlycon_magic[] = { 'O', 'F', 'W', '\0' };
  119. if (!rt_strcmp(++str, earlycon_magic))
  120. {
  121. /* Is OFW earlycon, we should ACK it */
  122. rt_memset(str, 0, RT_ARRAY_SIZE(earlycon_magic));
  123. }
  124. }
  125. #endif
  126. }
  127. return cfg;
  128. }