serial_v2.h 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-06-01 KyleChan first version
  9. */
  10. #ifndef __SERIAL_V2_H__
  11. #define __SERIAL_V2_H__
  12. #include <rtthread.h>
  13. #define BAUD_RATE_2400 2400
  14. #define BAUD_RATE_4800 4800
  15. #define BAUD_RATE_9600 9600
  16. #define BAUD_RATE_19200 19200
  17. #define BAUD_RATE_38400 38400
  18. #define BAUD_RATE_57600 57600
  19. #define BAUD_RATE_115200 115200
  20. #define BAUD_RATE_230400 230400
  21. #define BAUD_RATE_460800 460800
  22. #define BAUD_RATE_921600 921600
  23. #define BAUD_RATE_2000000 2000000
  24. #define BAUD_RATE_2500000 2500000
  25. #define BAUD_RATE_3000000 3000000
  26. #define DATA_BITS_5 5
  27. #define DATA_BITS_6 6
  28. #define DATA_BITS_7 7
  29. #define DATA_BITS_8 8
  30. #define DATA_BITS_9 9
  31. #define STOP_BITS_1 0
  32. #define STOP_BITS_2 1
  33. #define STOP_BITS_3 2
  34. #define STOP_BITS_4 3
  35. #ifdef _WIN32
  36. #include <windows.h>
  37. #else
  38. #define PARITY_NONE 0
  39. #define PARITY_ODD 1
  40. #define PARITY_EVEN 2
  41. #endif
  42. #define BIT_ORDER_LSB 0
  43. #define BIT_ORDER_MSB 1
  44. #define NRZ_NORMAL 0 /* Non Return to Zero : normal mode */
  45. #define NRZ_INVERTED 1 /* Non Return to Zero : inverted mode */
  46. #define RT_DEVICE_FLAG_RX_BLOCKING 0x1000
  47. #define RT_DEVICE_FLAG_RX_NON_BLOCKING 0x2000
  48. #define RT_DEVICE_FLAG_TX_BLOCKING 0x4000
  49. #define RT_DEVICE_FLAG_TX_NON_BLOCKING 0x8000
  50. #define RT_SERIAL_RX_BLOCKING RT_DEVICE_FLAG_RX_BLOCKING
  51. #define RT_SERIAL_RX_NON_BLOCKING RT_DEVICE_FLAG_RX_NON_BLOCKING
  52. #define RT_SERIAL_TX_BLOCKING RT_DEVICE_FLAG_TX_BLOCKING
  53. #define RT_SERIAL_TX_NON_BLOCKING RT_DEVICE_FLAG_TX_NON_BLOCKING
  54. #define RT_DEVICE_CHECK_OPTMODE 0x20
  55. #define RT_SERIAL_EVENT_RX_IND 0x01 /* Rx indication */
  56. #define RT_SERIAL_EVENT_TX_DONE 0x02 /* Tx complete */
  57. #define RT_SERIAL_EVENT_RX_DMADONE 0x03 /* Rx DMA transfer done */
  58. #define RT_SERIAL_EVENT_TX_DMADONE 0x04 /* Tx DMA transfer done */
  59. #define RT_SERIAL_EVENT_RX_TIMEOUT 0x05 /* Rx timeout */
  60. #define RT_SERIAL_ERR_OVERRUN 0x01
  61. #define RT_SERIAL_ERR_FRAMING 0x02
  62. #define RT_SERIAL_ERR_PARITY 0x03
  63. #define RT_SERIAL_TX_DATAQUEUE_SIZE 2048
  64. #define RT_SERIAL_TX_DATAQUEUE_LWM 30
  65. #define RT_SERIAL_RX_MINBUFSZ 64
  66. #define RT_SERIAL_TX_MINBUFSZ 64
  67. #define RT_SERIAL_TX_BLOCKING_BUFFER 1
  68. #define RT_SERIAL_TX_BLOCKING_NO_BUFFER 0
  69. #define RT_SERIAL_FLOWCONTROL_CTSRTS 1
  70. #define RT_SERIAL_FLOWCONTROL_NONE 0
  71. /* Default config for serial_configure structure */
  72. #define RT_SERIAL_CONFIG_DEFAULT \
  73. { \
  74. BAUD_RATE_115200, /* 115200 bits/s */ \
  75. DATA_BITS_8, /* 8 databits */ \
  76. STOP_BITS_1, /* 1 stopbit */ \
  77. PARITY_NONE, /* No parity */ \
  78. BIT_ORDER_LSB, /* LSB first sent */ \
  79. NRZ_NORMAL, /* Normal mode */ \
  80. RT_SERIAL_RX_MINBUFSZ, /* rxBuf size */ \
  81. RT_SERIAL_TX_MINBUFSZ, /* txBuf size */ \
  82. RT_SERIAL_FLOWCONTROL_NONE, /* Off flowcontrol */ \
  83. 0 \
  84. }
  85. struct serial_configure
  86. {
  87. rt_uint32_t baud_rate;
  88. rt_uint32_t data_bits :4;
  89. rt_uint32_t stop_bits :2;
  90. rt_uint32_t parity :2;
  91. rt_uint32_t bit_order :1;
  92. rt_uint32_t invert :1;
  93. rt_uint32_t rx_bufsz :16;
  94. rt_uint32_t tx_bufsz :16;
  95. rt_uint32_t flowcontrol :1;
  96. rt_uint32_t reserved :5;
  97. };
  98. /*
  99. * Serial Receive FIFO mode
  100. */
  101. struct rt_serial_rx_fifo
  102. {
  103. struct rt_ringbuffer rb;
  104. struct rt_completion rx_cpt;
  105. rt_uint16_t rx_cpt_index;
  106. /* software fifo */
  107. rt_uint8_t buffer[];
  108. };
  109. /*
  110. * Serial Transmit FIFO mode
  111. */
  112. struct rt_serial_tx_fifo
  113. {
  114. struct rt_ringbuffer rb;
  115. rt_size_t put_size;
  116. rt_bool_t activated;
  117. struct rt_completion tx_cpt;
  118. /* software fifo */
  119. rt_uint8_t buffer[];
  120. };
  121. struct rt_serial_device
  122. {
  123. struct rt_device parent;
  124. const struct rt_uart_ops *ops;
  125. struct serial_configure config;
  126. void *serial_rx;
  127. void *serial_tx;
  128. };
  129. /**
  130. * uart operators
  131. */
  132. struct rt_uart_ops
  133. {
  134. rt_err_t (*configure)(struct rt_serial_device *serial,
  135. struct serial_configure *cfg);
  136. rt_err_t (*control)(struct rt_serial_device *serial,
  137. int cmd,
  138. void *arg);
  139. int (*putc)(struct rt_serial_device *serial, char c);
  140. int (*getc)(struct rt_serial_device *serial);
  141. rt_size_t (*transmit)(struct rt_serial_device *serial,
  142. rt_uint8_t *buf,
  143. rt_size_t size,
  144. rt_uint32_t tx_flag);
  145. };
  146. void rt_hw_serial_isr(struct rt_serial_device *serial, int event);
  147. rt_err_t rt_hw_serial_register(struct rt_serial_device *serial,
  148. const char *name,
  149. rt_uint32_t flag,
  150. void *data);
  151. #endif