mmcsd_core.c 17 KB

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  1. /*
  2. * File : mmcsd_core.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2011-07-25 weety first version
  23. */
  24. #include <rtthread.h>
  25. #include <drivers/mmcsd_core.h>
  26. #include <drivers/sd.h>
  27. #include <drivers/mmc.h>
  28. #ifndef RT_MMCSD_STACK_SIZE
  29. #define RT_MMCSD_STACK_SIZE 1024
  30. #endif
  31. #ifndef RT_MMCSD_THREAD_PREORITY
  32. #if (RT_THREAD_PRIORITY_MAX == 32)
  33. #define RT_MMCSD_THREAD_PREORITY 0x16
  34. #else
  35. #define RT_MMCSD_THREAD_PREORITY 0x40
  36. #endif
  37. #endif
  38. //static struct rt_semaphore mmcsd_sem;
  39. static struct rt_thread mmcsd_detect_thread;
  40. static rt_uint8_t mmcsd_stack[RT_MMCSD_STACK_SIZE];
  41. static struct rt_mailbox mmcsd_detect_mb;
  42. static rt_uint32_t mmcsd_detect_mb_pool[4];
  43. void mmcsd_host_lock(struct rt_mmcsd_host *host)
  44. {
  45. rt_sem_take(&host->bus_lock, RT_WAITING_FOREVER);
  46. }
  47. void mmcsd_host_unlock(struct rt_mmcsd_host *host)
  48. {
  49. rt_sem_release(&host->bus_lock);
  50. }
  51. void mmcsd_req_complete(struct rt_mmcsd_host *host)
  52. {
  53. rt_sem_release(&host->sem_ack);
  54. }
  55. void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  56. {
  57. do {
  58. req->cmd->retries--;
  59. req->cmd->err = 0;
  60. req->cmd->mrq = req;
  61. if (req->data)
  62. {
  63. req->cmd->data = req->data;
  64. req->data->err = 0;
  65. req->data->mrq = req;
  66. if (req->stop)
  67. {
  68. req->data->stop = req->stop;
  69. req->stop->err = 0;
  70. req->stop->mrq = req;
  71. }
  72. }
  73. host->ops->request(host, req);
  74. rt_sem_take(&host->sem_ack, RT_WAITING_FOREVER);
  75. } while(req->cmd->err && (req->cmd->retries > 0));
  76. }
  77. rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host,
  78. struct rt_mmcsd_cmd *cmd,
  79. int retries)
  80. {
  81. struct rt_mmcsd_req req;
  82. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  83. rt_memset(cmd->resp, 0, sizeof(cmd->resp));
  84. cmd->retries = retries;
  85. req.cmd = cmd;
  86. cmd->data = RT_NULL;
  87. mmcsd_send_request(host, &req);
  88. return cmd->err;
  89. }
  90. rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host)
  91. {
  92. rt_int32_t err;
  93. struct rt_mmcsd_cmd cmd;
  94. if (!controller_is_spi(host))
  95. {
  96. mmcsd_set_chip_select(host, MMCSD_CS_HIGH);
  97. mmcsd_delay_ms(1);
  98. }
  99. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  100. cmd.cmd_code = GO_IDLE_STATE;
  101. cmd.arg = 0;
  102. cmd.flags = RESP_SPI_R1 | RESP_NONE | CMD_BC;
  103. err = mmcsd_send_cmd(host, &cmd, 0);
  104. mmcsd_delay_ms(1);
  105. if (!controller_is_spi(host))
  106. {
  107. mmcsd_set_chip_select(host, MMCSD_CS_IGNORE);
  108. mmcsd_delay_ms(1);
  109. }
  110. return err;
  111. }
  112. rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host,
  113. rt_int32_t high_capacity,
  114. rt_uint32_t *ocr)
  115. {
  116. struct rt_mmcsd_cmd cmd;
  117. rt_int32_t err;
  118. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  119. cmd.cmd_code = SPI_READ_OCR;
  120. cmd.arg = high_capacity ? (1 << 30) : 0;
  121. cmd.flags = RESP_SPI_R3;
  122. err = mmcsd_send_cmd(host, &cmd, 0);
  123. *ocr = cmd.resp[1];
  124. return err;
  125. }
  126. rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  127. {
  128. rt_int32_t err;
  129. struct rt_mmcsd_cmd cmd;
  130. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  131. cmd.cmd_code = ALL_SEND_CID;
  132. cmd.arg = 0;
  133. cmd.flags = RESP_R2 | CMD_BCR;
  134. err = mmcsd_send_cmd(host, &cmd, 3);
  135. if (err)
  136. return err;
  137. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  138. return 0;
  139. }
  140. rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  141. {
  142. rt_int32_t err, i;
  143. struct rt_mmcsd_req req;
  144. struct rt_mmcsd_cmd cmd;
  145. struct rt_mmcsd_data data;
  146. rt_uint32_t *buf = RT_NULL;
  147. if (!controller_is_spi(host))
  148. {
  149. if (!host->card)
  150. return -RT_ERROR;
  151. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  152. cmd.cmd_code = SEND_CID;
  153. cmd.arg = host->card->rca << 16;
  154. cmd.flags = RESP_R2 | CMD_AC;
  155. err = mmcsd_send_cmd(host, &cmd, 3);
  156. if (err)
  157. return err;
  158. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  159. return 0;
  160. }
  161. buf = (rt_uint32_t *)rt_malloc(16);
  162. if (!buf)
  163. {
  164. rt_kprintf("allocate memory failed\n");
  165. return -RT_ENOMEM;
  166. }
  167. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  168. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  169. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  170. req.cmd = &cmd;
  171. req.data = &data;
  172. cmd.cmd_code = SEND_CID;
  173. cmd.arg = 0;
  174. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  175. * rely on callers to never use this with "native" calls for reading
  176. * CSD or CID. Native versions of those commands use the R2 type,
  177. * not R1 plus a data block.
  178. */
  179. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  180. data.blksize = 16;
  181. data.blks = 1;
  182. data.flags = DATA_DIR_READ;
  183. data.buf = buf;
  184. /*
  185. * The spec states that CSR and CID accesses have a timeout
  186. * of 64 clock cycles.
  187. */
  188. data.timeout_ns = 0;
  189. data.timeout_clks = 64;
  190. mmcsd_send_request(host, &req);
  191. if (cmd.err || data.err)
  192. {
  193. rt_free(buf);
  194. return -RT_ERROR;
  195. }
  196. for (i = 0;i < 4;i++)
  197. cid[i] = buf[i];
  198. rt_free(buf);
  199. return 0;
  200. }
  201. rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd)
  202. {
  203. rt_int32_t err, i;
  204. struct rt_mmcsd_req req;
  205. struct rt_mmcsd_cmd cmd;
  206. struct rt_mmcsd_data data;
  207. rt_uint32_t *buf = RT_NULL;
  208. if (!controller_is_spi(card->host))
  209. {
  210. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  211. cmd.cmd_code = SEND_CSD;
  212. cmd.arg = card->rca << 16;
  213. cmd.flags = RESP_R2 | CMD_AC;
  214. err = mmcsd_send_cmd(card->host, &cmd, 3);
  215. if (err)
  216. return err;
  217. rt_memcpy(csd, cmd.resp, sizeof(rt_uint32_t) * 4);
  218. return 0;
  219. }
  220. buf = (rt_uint32_t*)rt_malloc(16);
  221. if (!buf)
  222. {
  223. rt_kprintf("allocate memory failed\n");
  224. return -RT_ENOMEM;
  225. }
  226. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  227. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  228. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  229. req.cmd = &cmd;
  230. req.data = &data;
  231. cmd.cmd_code = SEND_CSD;
  232. cmd.arg = 0;
  233. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  234. * rely on callers to never use this with "native" calls for reading
  235. * CSD or CID. Native versions of those commands use the R2 type,
  236. * not R1 plus a data block.
  237. */
  238. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  239. data.blksize = 16;
  240. data.blks = 1;
  241. data.flags = DATA_DIR_READ;
  242. data.buf = buf;
  243. /*
  244. * The spec states that CSR and CID accesses have a timeout
  245. * of 64 clock cycles.
  246. */
  247. data.timeout_ns = 0;
  248. data.timeout_clks = 64;
  249. mmcsd_send_request(card->host, &req);
  250. if (cmd.err || data.err)
  251. {
  252. rt_free(buf);
  253. return -RT_ERROR;
  254. }
  255. for (i = 0;i < 4;i++)
  256. csd[i] = buf[i];
  257. rt_free(buf);
  258. return 0;
  259. }
  260. static rt_int32_t _mmcsd_select_card(struct rt_mmcsd_host *host,
  261. struct rt_mmcsd_card *card)
  262. {
  263. rt_int32_t err;
  264. struct rt_mmcsd_cmd cmd;
  265. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  266. cmd.cmd_code = SELECT_CARD;
  267. if (card)
  268. {
  269. cmd.arg = card->rca << 16;
  270. cmd.flags = RESP_R1 | CMD_AC;
  271. }
  272. else
  273. {
  274. cmd.arg = 0;
  275. cmd.flags = RESP_NONE | CMD_AC;
  276. }
  277. err = mmcsd_send_cmd(host, &cmd, 3);
  278. if (err)
  279. return err;
  280. return 0;
  281. }
  282. rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card)
  283. {
  284. return _mmcsd_select_card(card->host, card);
  285. }
  286. rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *card)
  287. {
  288. return _mmcsd_select_card(card->host, RT_NULL);
  289. }
  290. rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc)
  291. {
  292. struct rt_mmcsd_cmd cmd;
  293. rt_int32_t err;
  294. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  295. cmd.cmd_code = SPI_CRC_ON_OFF;
  296. cmd.flags = RESP_SPI_R1;
  297. cmd.arg = use_crc;
  298. err = mmcsd_send_cmd(host, &cmd, 0);
  299. if (!err)
  300. host->spi_use_crc = use_crc;
  301. return err;
  302. }
  303. rt_inline void mmcsd_set_iocfg(struct rt_mmcsd_host *host)
  304. {
  305. struct rt_mmcsd_io_cfg *io_cfg = &host->io_cfg;
  306. mmcsd_dbg("clock %uHz busmode %u powermode %u cs %u Vdd %u "
  307. "width %u \n",
  308. io_cfg->clock, io_cfg->bus_mode,
  309. io_cfg->power_mode, io_cfg->chip_select, io_cfg->vdd,
  310. io_cfg->bus_width);
  311. host->ops->set_iocfg(host, io_cfg);
  312. }
  313. /*
  314. * Control chip select pin on a host.
  315. */
  316. void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode)
  317. {
  318. host->io_cfg.chip_select = mode;
  319. mmcsd_set_iocfg(host);
  320. }
  321. /*
  322. * Sets the host clock to the highest possible frequency that
  323. * is below "hz".
  324. */
  325. void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk)
  326. {
  327. if (clk < host->freq_min)
  328. {
  329. rt_kprintf("clock too low\n");
  330. }
  331. host->io_cfg.clock = clk;
  332. mmcsd_set_iocfg(host);
  333. }
  334. /*
  335. * Change the bus mode (open drain/push-pull) of a host.
  336. */
  337. void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode)
  338. {
  339. host->io_cfg.bus_mode = mode;
  340. mmcsd_set_iocfg(host);
  341. }
  342. /*
  343. * Change data bus width of a host.
  344. */
  345. void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width)
  346. {
  347. host->io_cfg.bus_width = width;
  348. mmcsd_set_iocfg(host);
  349. }
  350. void mmcsd_set_data_timeout(struct rt_mmcsd_data *data,
  351. const struct rt_mmcsd_card *card)
  352. {
  353. rt_uint32_t mult;
  354. if (card->card_type == CARD_TYPE_SDIO)
  355. {
  356. data->timeout_ns = 1000000000; /* SDIO card 1s */
  357. data->timeout_clks = 0;
  358. return;
  359. }
  360. /*
  361. * SD cards use a 100 multiplier rather than 10
  362. */
  363. mult = (card->card_type == CARD_TYPE_SD) ? 100 : 10;
  364. /*
  365. * Scale up the multiplier (and therefore the timeout) by
  366. * the r2w factor for writes.
  367. */
  368. if (data->flags & DATA_DIR_WRITE)
  369. mult <<= card->csd.r2w_factor;
  370. data->timeout_ns = card->tacc_ns * mult;
  371. data->timeout_clks = card->tacc_clks * mult;
  372. /*
  373. * SD cards also have an upper limit on the timeout.
  374. */
  375. if (card->card_type == CARD_TYPE_SD)
  376. {
  377. rt_uint32_t timeout_us, limit_us;
  378. timeout_us = data->timeout_ns / 1000;
  379. timeout_us += data->timeout_clks * 1000 /
  380. (card->host->io_cfg.clock / 1000);
  381. if (data->flags & DATA_DIR_WRITE)
  382. /*
  383. * The limit is really 250 ms, but that is
  384. * insufficient for some crappy cards.
  385. */
  386. limit_us = 300000;
  387. else
  388. limit_us = 100000;
  389. /*
  390. * SDHC cards always use these fixed values.
  391. */
  392. if (timeout_us > limit_us || card->flags & CARD_FLAG_SDHC)
  393. {
  394. data->timeout_ns = limit_us * 1000; /* SDHC card fixed 250ms */
  395. data->timeout_clks = 0;
  396. }
  397. }
  398. if (controller_is_spi(card->host))
  399. {
  400. if (data->flags & DATA_DIR_WRITE)
  401. {
  402. if (data->timeout_ns < 1000000000)
  403. data->timeout_ns = 1000000000; /* 1s */
  404. }
  405. else
  406. {
  407. if (data->timeout_ns < 100000000)
  408. data->timeout_ns = 100000000; /* 100ms */
  409. }
  410. }
  411. }
  412. /*
  413. * Mask off any voltages we don't support and select
  414. * the lowest voltage
  415. */
  416. rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr)
  417. {
  418. int bit;
  419. ocr &= host->valid_ocr;
  420. bit = __rt_ffs(ocr);
  421. if (bit)
  422. {
  423. bit -= 1;
  424. ocr &= 3 << bit;
  425. host->io_cfg.vdd = bit;
  426. mmcsd_set_iocfg(host);
  427. }
  428. else
  429. {
  430. rt_kprintf("host doesn't support card's voltages\n");
  431. ocr = 0;
  432. }
  433. return ocr;
  434. }
  435. static void mmcsd_power_up(struct rt_mmcsd_host *host)
  436. {
  437. int bit = fls(host->valid_ocr) - 1;
  438. host->io_cfg.vdd = bit;
  439. if (controller_is_spi(host))
  440. {
  441. host->io_cfg.chip_select = MMCSD_CS_HIGH;
  442. host->io_cfg.bus_mode = MMCSD_BUSMODE_PUSHPULL;
  443. }
  444. else
  445. {
  446. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  447. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  448. }
  449. host->io_cfg.power_mode = MMCSD_POWER_UP;
  450. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  451. mmcsd_set_iocfg(host);
  452. /*
  453. * This delay should be sufficient to allow the power supply
  454. * to reach the minimum voltage.
  455. */
  456. mmcsd_delay_ms(10);
  457. host->io_cfg.clock = host->freq_min;
  458. host->io_cfg.power_mode = MMCSD_POWER_ON;
  459. mmcsd_set_iocfg(host);
  460. /*
  461. * This delay must be at least 74 clock sizes, or 1 ms, or the
  462. * time required to reach a stable voltage.
  463. */
  464. mmcsd_delay_ms(10);
  465. }
  466. static void mmcsd_power_off(struct rt_mmcsd_host *host)
  467. {
  468. host->io_cfg.clock = 0;
  469. host->io_cfg.vdd = 0;
  470. if (!controller_is_spi(host))
  471. {
  472. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  473. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  474. }
  475. host->io_cfg.power_mode = MMCSD_POWER_OFF;
  476. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  477. mmcsd_set_iocfg(host);
  478. }
  479. void mmcsd_change(struct rt_mmcsd_host *host)
  480. {
  481. rt_mb_send(&mmcsd_detect_mb, (rt_uint32_t)host);
  482. }
  483. void mmcsd_detect(void *param)
  484. {
  485. struct rt_mmcsd_host *host;
  486. rt_uint32_t ocr;
  487. rt_int32_t err;
  488. while (1)
  489. {
  490. if (rt_mb_recv(&mmcsd_detect_mb, (rt_uint32_t*)&host, RT_WAITING_FOREVER) == RT_EOK)
  491. {
  492. if (host->card == RT_NULL)
  493. {
  494. mmcsd_host_lock(host);
  495. mmcsd_power_up(host);
  496. mmcsd_go_idle(host);
  497. mmcsd_send_if_cond(host, host->valid_ocr);
  498. err = sdio_io_send_op_cond(host, 0, &ocr);
  499. if (!err)
  500. {
  501. if (init_sdio(host, ocr))
  502. mmcsd_power_off(host);
  503. mmcsd_host_unlock(host);
  504. continue;
  505. }
  506. /*
  507. * detect SD card
  508. */
  509. err = mmcsd_send_app_op_cond(host, 0, &ocr);
  510. if (!err)
  511. {
  512. if (init_sd(host, ocr))
  513. mmcsd_power_off(host);
  514. mmcsd_host_unlock(host);
  515. continue;
  516. }
  517. /*
  518. * detect mmc card
  519. */
  520. err = mmc_send_op_cond(host, 0, &ocr);
  521. if (!err)
  522. {
  523. if (init_mmc(host, ocr))
  524. mmcsd_power_off(host);
  525. mmcsd_host_unlock(host);
  526. continue;
  527. }
  528. mmcsd_host_unlock(host);
  529. }
  530. }
  531. }
  532. }
  533. struct rt_mmcsd_host *mmcsd_alloc_host(void)
  534. {
  535. struct rt_mmcsd_host *host;
  536. host = rt_malloc(sizeof(struct rt_mmcsd_host));
  537. if (!host)
  538. {
  539. rt_kprintf("alloc host failed\n");
  540. return RT_NULL;
  541. }
  542. rt_memset(host, 0, sizeof(struct rt_mmcsd_host));
  543. host->max_seg_size = 65535;
  544. host->max_dma_segs = 1;
  545. host->max_blk_size = 512;
  546. host->max_blk_count = 4096;
  547. rt_sem_init(&host->bus_lock, "sd_bus_lock", 1, RT_IPC_FLAG_FIFO);
  548. rt_sem_init(&host->sem_ack, "sd_ack", 0, RT_IPC_FLAG_FIFO);
  549. return host;
  550. }
  551. void mmcsd_free_host(struct rt_mmcsd_host *host)
  552. {
  553. rt_sem_detach(&host->bus_lock);
  554. rt_sem_detach(&host->sem_ack);
  555. rt_free(host);
  556. }
  557. void rt_mmcsd_core_init(void)
  558. {
  559. rt_err_t ret;
  560. /* init detect sd cart thread */
  561. /* init mailbox and create detect sd card thread */
  562. ret = rt_mb_init(&mmcsd_detect_mb, "mmcsdmb",
  563. &mmcsd_detect_mb_pool[0], sizeof(mmcsd_detect_mb_pool),
  564. RT_IPC_FLAG_FIFO);
  565. RT_ASSERT(ret == RT_EOK);
  566. ret = rt_thread_init(&mmcsd_detect_thread, "mmcsd_detect", mmcsd_detect, RT_NULL,
  567. &mmcsd_stack[0], RT_MMCSD_STACK_SIZE, RT_MMCSD_THREAD_PREORITY, 20);
  568. if (ret == RT_EOK)
  569. {
  570. rt_thread_startup(&mmcsd_detect_thread);
  571. }
  572. rt_sdio_init();
  573. }