drv_pwm.c 16 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-13 zylx first version
  9. * 2021-01-23 thread-liu Fix the timer clock frequency doubling problem
  10. */
  11. #include <board.h>
  12. #ifdef BSP_USING_PWM
  13. #include "drv_config.h"
  14. #include "drv_tim.h"
  15. #include <drivers/rt_drv_pwm.h>
  16. //#define DRV_DEBUG
  17. #define LOG_TAG "drv.pwm"
  18. #include <drv_log.h>
  19. #define MAX_PERIOD 65535
  20. #define MIN_PERIOD 3
  21. #define MIN_PULSE 2
  22. extern void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
  23. enum
  24. {
  25. #ifdef BSP_USING_PWM1
  26. PWM1_INDEX,
  27. #endif
  28. #ifdef BSP_USING_PWM2
  29. PWM2_INDEX,
  30. #endif
  31. #ifdef BSP_USING_PWM3
  32. PWM3_INDEX,
  33. #endif
  34. #ifdef BSP_USING_PWM4
  35. PWM4_INDEX,
  36. #endif
  37. #ifdef BSP_USING_PWM5
  38. PWM5_INDEX,
  39. #endif
  40. #ifdef BSP_USING_PWM6
  41. PWM6_INDEX,
  42. #endif
  43. #ifdef BSP_USING_PWM7
  44. PWM7_INDEX,
  45. #endif
  46. #ifdef BSP_USING_PWM8
  47. PWM8_INDEX,
  48. #endif
  49. #ifdef BSP_USING_PWM9
  50. PWM9_INDEX,
  51. #endif
  52. #ifdef BSP_USING_PWM10
  53. PWM10_INDEX,
  54. #endif
  55. #ifdef BSP_USING_PWM11
  56. PWM11_INDEX,
  57. #endif
  58. #ifdef BSP_USING_PWM12
  59. PWM12_INDEX,
  60. #endif
  61. #ifdef BSP_USING_PWM13
  62. PWM13_INDEX,
  63. #endif
  64. #ifdef BSP_USING_PWM14
  65. PWM14_INDEX,
  66. #endif
  67. #ifdef BSP_USING_PWM15
  68. PWM15_INDEX,
  69. #endif
  70. #ifdef BSP_USING_PWM16
  71. PWM16_INDEX,
  72. #endif
  73. #ifdef BSP_USING_PWM17
  74. PWM17_INDEX,
  75. #endif
  76. };
  77. struct stm32_pwm
  78. {
  79. struct rt_device_pwm pwm_device;
  80. TIM_HandleTypeDef tim_handle;
  81. rt_uint8_t channel;
  82. char *name;
  83. };
  84. static struct stm32_pwm stm32_pwm_obj[] =
  85. {
  86. #ifdef BSP_USING_PWM1
  87. PWM1_CONFIG,
  88. #endif
  89. #ifdef BSP_USING_PWM2
  90. PWM2_CONFIG,
  91. #endif
  92. #ifdef BSP_USING_PWM3
  93. PWM3_CONFIG,
  94. #endif
  95. #ifdef BSP_USING_PWM4
  96. PWM4_CONFIG,
  97. #endif
  98. #ifdef BSP_USING_PWM5
  99. PWM5_CONFIG,
  100. #endif
  101. #ifdef BSP_USING_PWM6
  102. PWM6_CONFIG,
  103. #endif
  104. #ifdef BSP_USING_PWM7
  105. PWM7_CONFIG,
  106. #endif
  107. #ifdef BSP_USING_PWM8
  108. PWM8_CONFIG,
  109. #endif
  110. #ifdef BSP_USING_PWM9
  111. PWM9_CONFIG,
  112. #endif
  113. #ifdef BSP_USING_PWM10
  114. PWM10_CONFIG,
  115. #endif
  116. #ifdef BSP_USING_PWM11
  117. PWM11_CONFIG,
  118. #endif
  119. #ifdef BSP_USING_PWM12
  120. PWM12_CONFIG,
  121. #endif
  122. #ifdef BSP_USING_PWM13
  123. PWM13_CONFIG,
  124. #endif
  125. #ifdef BSP_USING_PWM14
  126. PWM14_CONFIG,
  127. #endif
  128. #ifdef BSP_USING_PWM15
  129. PWM15_CONFIG,
  130. #endif
  131. #ifdef BSP_USING_PWM16
  132. PWM16_CONFIG,
  133. #endif
  134. #ifdef BSP_USING_PWM17
  135. PWM17_CONFIG,
  136. #endif
  137. };
  138. static rt_uint64_t tim_clock_get(TIM_HandleTypeDef *htim)
  139. {
  140. rt_uint32_t pclk1_doubler, pclk2_doubler;
  141. rt_uint64_t tim_clock;
  142. stm32_tim_pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  143. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  144. if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
  145. #elif defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32H7)
  146. if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
  147. #elif defined(SOC_SERIES_STM32MP1)
  148. if (htim->Instance == TIM4)
  149. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  150. if (0)
  151. #else
  152. #error "This driver has not supported this series yet!"
  153. #endif
  154. {
  155. #if !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)) /* don't have HAL_RCC_GetPCLK2Freq */
  156. tim_clock = (rt_uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler);
  157. #endif
  158. }
  159. else
  160. {
  161. tim_clock = (rt_uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler);
  162. }
  163. return tim_clock;
  164. }
  165. static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
  166. static struct rt_pwm_ops drv_ops =
  167. {
  168. drv_pwm_control
  169. };
  170. static rt_err_t drv_pwm_enable(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration, rt_bool_t enable)
  171. {
  172. /* Converts the channel number to the channel number of Hal library */
  173. rt_uint32_t channel = 0x04 * (configuration->channel - 1);
  174. if (!configuration->complementary)
  175. {
  176. if (!enable)
  177. {
  178. HAL_TIM_PWM_Stop(htim, channel);
  179. }
  180. else
  181. {
  182. HAL_TIM_PWM_Start(htim, channel);
  183. }
  184. }
  185. else if (configuration->complementary)
  186. {
  187. if (!enable)
  188. {
  189. HAL_TIMEx_PWMN_Stop(htim, channel);
  190. }
  191. else
  192. {
  193. HAL_TIMEx_PWMN_Start(htim, channel);
  194. }
  195. }
  196. return RT_EOK;
  197. }
  198. static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
  199. {
  200. /* Converts the channel number to the channel number of Hal library */
  201. rt_uint32_t channel = 0x04 * (configuration->channel - 1);
  202. rt_uint64_t tim_clock;
  203. tim_clock = tim_clock_get(htim);
  204. if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV2)
  205. {
  206. tim_clock = tim_clock / 2;
  207. }
  208. else if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV4)
  209. {
  210. tim_clock = tim_clock / 4;
  211. }
  212. /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
  213. tim_clock /= 1000000UL;
  214. configuration->period = (__HAL_TIM_GET_AUTORELOAD(htim) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
  215. configuration->pulse = (__HAL_TIM_GET_COMPARE(htim, channel) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
  216. return RT_EOK;
  217. }
  218. static rt_err_t drv_pwm_set(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
  219. {
  220. rt_uint32_t period, pulse;
  221. rt_uint64_t tim_clock, psc;
  222. /* Converts the channel number to the channel number of Hal library */
  223. rt_uint32_t channel = 0x04 * (configuration->channel - 1);
  224. tim_clock = tim_clock_get(htim);
  225. /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
  226. tim_clock /= 1000000UL;
  227. period = (rt_uint64_t)configuration->period * tim_clock / 1000ULL ;
  228. psc = period / MAX_PERIOD + 1;
  229. period = period / psc;
  230. __HAL_TIM_SET_PRESCALER(htim, psc - 1);
  231. if (period < MIN_PERIOD)
  232. {
  233. period = MIN_PERIOD;
  234. }
  235. __HAL_TIM_SET_AUTORELOAD(htim, period - 1);
  236. pulse = (rt_uint64_t)configuration->pulse * tim_clock / psc / 1000ULL;
  237. if (pulse < MIN_PULSE)
  238. {
  239. pulse = MIN_PULSE;
  240. }
  241. else if (pulse > period)
  242. {
  243. pulse = period;
  244. }
  245. __HAL_TIM_SET_COMPARE(htim, channel, pulse - 1);
  246. /* If you want the PWM setting to take effect immediately,
  247. please uncommon the following code, but it will cause the last PWM cycle not complete. */
  248. //__HAL_TIM_SET_COUNTER(htim, 0);
  249. //HAL_TIM_GenerateEvent(htim, TIM_EVENTSOURCE_UPDATE); /* Update frequency value */
  250. return RT_EOK;
  251. }
  252. static rt_err_t drv_pwm_set_period(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
  253. {
  254. rt_uint32_t period;
  255. rt_uint64_t tim_clock, psc;
  256. tim_clock = tim_clock_get(htim);
  257. /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
  258. tim_clock /= 1000000UL;
  259. period = (rt_uint64_t)configuration->period * tim_clock / 1000ULL ;
  260. psc = period / MAX_PERIOD + 1;
  261. period = period / psc;
  262. __HAL_TIM_SET_PRESCALER(htim, psc - 1);
  263. if (period < MIN_PERIOD)
  264. {
  265. period = MIN_PERIOD;
  266. }
  267. __HAL_TIM_SET_AUTORELOAD(htim, period - 1);
  268. return RT_EOK;
  269. }
  270. static rt_err_t drv_pwm_set_pulse(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
  271. {
  272. rt_uint32_t period, pulse;
  273. rt_uint64_t tim_clock;
  274. /* Converts the channel number to the channel number of Hal library */
  275. rt_uint32_t channel = 0x04 * (configuration->channel - 1);
  276. tim_clock = tim_clock_get(htim);
  277. /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
  278. tim_clock /= 1000000UL;
  279. period = (__HAL_TIM_GET_AUTORELOAD(htim) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
  280. pulse = (rt_uint64_t)configuration->pulse * (__HAL_TIM_GET_AUTORELOAD(htim) + 1) / period;
  281. if (pulse < MIN_PULSE)
  282. {
  283. pulse = MIN_PULSE;
  284. }
  285. else if (pulse > period)
  286. {
  287. pulse = period;
  288. }
  289. __HAL_TIM_SET_COMPARE(htim, channel, pulse - 1);
  290. return RT_EOK;
  291. }
  292. static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
  293. {
  294. struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
  295. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)device->parent.user_data;
  296. switch (cmd)
  297. {
  298. case PWM_CMD_ENABLE:
  299. return drv_pwm_enable(htim, configuration, RT_TRUE);
  300. case PWM_CMD_DISABLE:
  301. return drv_pwm_enable(htim, configuration, RT_FALSE);
  302. case PWM_CMD_SET:
  303. return drv_pwm_set(htim, configuration);
  304. case PWM_CMD_SET_PERIOD:
  305. return drv_pwm_set_period(htim, configuration);
  306. case PWM_CMD_SET_PULSE:
  307. return drv_pwm_set_pulse(htim, configuration);
  308. case PWM_CMD_GET:
  309. return drv_pwm_get(htim, configuration);
  310. default:
  311. return -RT_EINVAL;
  312. }
  313. }
  314. static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device)
  315. {
  316. rt_err_t result = RT_EOK;
  317. TIM_HandleTypeDef *tim = RT_NULL;
  318. TIM_OC_InitTypeDef oc_config = {0};
  319. TIM_MasterConfigTypeDef master_config = {0};
  320. TIM_ClockConfigTypeDef clock_config = {0};
  321. RT_ASSERT(device != RT_NULL);
  322. tim = (TIM_HandleTypeDef *)&device->tim_handle;
  323. /* configure the timer to pwm mode */
  324. tim->Init.Prescaler = 0;
  325. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  326. tim->Init.Period = 0;
  327. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  328. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
  329. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  330. #endif
  331. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  332. {
  333. LOG_E("%s pwm init failed", device->name);
  334. result = -RT_ERROR;
  335. goto __exit;
  336. }
  337. if (HAL_TIM_PWM_Init(tim) != HAL_OK)
  338. {
  339. LOG_E("%s pwm init failed", device->name);
  340. result = -RT_ERROR;
  341. goto __exit;
  342. }
  343. clock_config.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  344. if (HAL_TIM_ConfigClockSource(tim, &clock_config) != HAL_OK)
  345. {
  346. LOG_E("%s clock init failed", device->name);
  347. result = -RT_ERROR;
  348. goto __exit;
  349. }
  350. master_config.MasterOutputTrigger = TIM_TRGO_RESET;
  351. master_config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  352. if (HAL_TIMEx_MasterConfigSynchronization(tim, &master_config) != HAL_OK)
  353. {
  354. LOG_E("%s master config failed", device->name);
  355. result = -RT_ERROR;
  356. goto __exit;
  357. }
  358. oc_config.OCMode = TIM_OCMODE_PWM1;
  359. oc_config.Pulse = 0;
  360. oc_config.OCPolarity = TIM_OCPOLARITY_HIGH;
  361. oc_config.OCFastMode = TIM_OCFAST_DISABLE;
  362. oc_config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  363. oc_config.OCIdleState = TIM_OCIDLESTATE_RESET;
  364. /* config pwm channel */
  365. if (device->channel & 0x01)
  366. {
  367. if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_1) != HAL_OK)
  368. {
  369. LOG_E("%s channel1 config failed", device->name);
  370. result = -RT_ERROR;
  371. goto __exit;
  372. }
  373. }
  374. if (device->channel & 0x02)
  375. {
  376. if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_2) != HAL_OK)
  377. {
  378. LOG_E("%s channel2 config failed", device->name);
  379. result = -RT_ERROR;
  380. goto __exit;
  381. }
  382. }
  383. if (device->channel & 0x04)
  384. {
  385. if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_3) != HAL_OK)
  386. {
  387. LOG_E("%s channel3 config failed", device->name);
  388. result = -RT_ERROR;
  389. goto __exit;
  390. }
  391. }
  392. if (device->channel & 0x08)
  393. {
  394. if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_4) != HAL_OK)
  395. {
  396. LOG_E("%s channel4 config failed", device->name);
  397. result = -RT_ERROR;
  398. goto __exit;
  399. }
  400. }
  401. /* pwm pin configuration */
  402. HAL_TIM_MspPostInit(tim);
  403. /* enable update request source */
  404. __HAL_TIM_URS_ENABLE(tim);
  405. __exit:
  406. return result;
  407. }
  408. static void pwm_get_channel(void)
  409. {
  410. #ifdef BSP_USING_PWM1_CH1
  411. stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 0;
  412. #endif
  413. #ifdef BSP_USING_PWM1_CH2
  414. stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 1;
  415. #endif
  416. #ifdef BSP_USING_PWM1_CH3
  417. stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 2;
  418. #endif
  419. #ifdef BSP_USING_PWM1_CH4
  420. stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 3;
  421. #endif
  422. #ifdef BSP_USING_PWM2_CH1
  423. stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 0;
  424. #endif
  425. #ifdef BSP_USING_PWM2_CH2
  426. stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 1;
  427. #endif
  428. #ifdef BSP_USING_PWM2_CH3
  429. stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 2;
  430. #endif
  431. #ifdef BSP_USING_PWM2_CH4
  432. stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 3;
  433. #endif
  434. #ifdef BSP_USING_PWM3_CH1
  435. stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 0;
  436. #endif
  437. #ifdef BSP_USING_PWM3_CH2
  438. stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 1;
  439. #endif
  440. #ifdef BSP_USING_PWM3_CH3
  441. stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 2;
  442. #endif
  443. #ifdef BSP_USING_PWM3_CH4
  444. stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 3;
  445. #endif
  446. #ifdef BSP_USING_PWM4_CH1
  447. stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 0;
  448. #endif
  449. #ifdef BSP_USING_PWM4_CH2
  450. stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 1;
  451. #endif
  452. #ifdef BSP_USING_PWM4_CH3
  453. stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 2;
  454. #endif
  455. #ifdef BSP_USING_PWM4_CH4
  456. stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 3;
  457. #endif
  458. #ifdef BSP_USING_PWM5_CH1
  459. stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 0;
  460. #endif
  461. #ifdef BSP_USING_PWM5_CH2
  462. stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 1;
  463. #endif
  464. #ifdef BSP_USING_PWM5_CH3
  465. stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 2;
  466. #endif
  467. #ifdef BSP_USING_PWM5_CH4
  468. stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 3;
  469. #endif
  470. #ifdef BSP_USING_PWM6_CH1
  471. stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 0;
  472. #endif
  473. #ifdef BSP_USING_PWM6_CH2
  474. stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 1;
  475. #endif
  476. #ifdef BSP_USING_PWM6_CH3
  477. stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 2;
  478. #endif
  479. #ifdef BSP_USING_PWM6_CH4
  480. stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 3;
  481. #endif
  482. #ifdef BSP_USING_PWM7_CH1
  483. stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 0;
  484. #endif
  485. #ifdef BSP_USING_PWM7_CH2
  486. stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 1;
  487. #endif
  488. #ifdef BSP_USING_PWM7_CH3
  489. stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 2;
  490. #endif
  491. #ifdef BSP_USING_PWM7_CH4
  492. stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 3;
  493. #endif
  494. #ifdef BSP_USING_PWM8_CH1
  495. stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 0;
  496. #endif
  497. #ifdef BSP_USING_PWM8_CH2
  498. stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 1;
  499. #endif
  500. #ifdef BSP_USING_PWM8_CH3
  501. stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 2;
  502. #endif
  503. #ifdef BSP_USING_PWM8_CH4
  504. stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 3;
  505. #endif
  506. #ifdef BSP_USING_PWM9_CH1
  507. stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 0;
  508. #endif
  509. #ifdef BSP_USING_PWM9_CH2
  510. stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 1;
  511. #endif
  512. #ifdef BSP_USING_PWM9_CH3
  513. stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 2;
  514. #endif
  515. #ifdef BSP_USING_PWM9_CH4
  516. stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 3;
  517. #endif
  518. #ifdef BSP_USING_PWM10_CH1
  519. stm32_pwm_obj[PWM10_INDEX].channel |= 1 << 0;
  520. #endif
  521. #ifdef BSP_USING_PWM11_CH1
  522. stm32_pwm_obj[PWM11_INDEX].channel |= 1 << 0;
  523. #endif
  524. #ifdef BSP_USING_PWM12_CH1
  525. stm32_pwm_obj[PWM12_INDEX].channel |= 1 << 0;
  526. #endif
  527. #ifdef BSP_USING_PWM12_CH2
  528. stm32_pwm_obj[PWM12_INDEX].channel |= 1 << 1;
  529. #endif
  530. #ifdef BSP_USING_PWM13_CH1
  531. stm32_pwm_obj[PWM13_INDEX].channel |= 1 << 0;
  532. #endif
  533. #ifdef BSP_USING_PWM14_CH1
  534. stm32_pwm_obj[PWM14_INDEX].channel |= 1 << 0;
  535. #endif
  536. #ifdef BSP_USING_PWM15_CH1
  537. stm32_pwm_obj[PWM15_INDEX].channel |= 1 << 0;
  538. #endif
  539. #ifdef BSP_USING_PWM16_CH1
  540. stm32_pwm_obj[PWM16_INDEX].channel |= 1 << 0;
  541. #endif
  542. #ifdef BSP_USING_PWM17_CH1
  543. stm32_pwm_obj[PWM17_INDEX].channel |= 1 << 0;
  544. #endif
  545. }
  546. static int stm32_pwm_init(void)
  547. {
  548. int i = 0;
  549. int result = RT_EOK;
  550. pwm_get_channel();
  551. for (i = 0; i < sizeof(stm32_pwm_obj) / sizeof(stm32_pwm_obj[0]); i++)
  552. {
  553. /* pwm init */
  554. if (stm32_hw_pwm_init(&stm32_pwm_obj[i]) != RT_EOK)
  555. {
  556. LOG_E("%s init failed", stm32_pwm_obj[i].name);
  557. result = -RT_ERROR;
  558. goto __exit;
  559. }
  560. else
  561. {
  562. LOG_D("%s init success", stm32_pwm_obj[i].name);
  563. /* register pwm device */
  564. if (rt_device_pwm_register(&stm32_pwm_obj[i].pwm_device, stm32_pwm_obj[i].name, &drv_ops, &stm32_pwm_obj[i].tim_handle) == RT_EOK)
  565. {
  566. LOG_D("%s register success", stm32_pwm_obj[i].name);
  567. }
  568. else
  569. {
  570. LOG_E("%s register failed", stm32_pwm_obj[i].name);
  571. result = -RT_ERROR;
  572. }
  573. }
  574. }
  575. __exit:
  576. return result;
  577. }
  578. INIT_DEVICE_EXPORT(stm32_pwm_init);
  579. #endif /* BSP_USING_PWM */