drv_uart.c 7.6 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2013-05-18 Bernard The first version for LPC40xx
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include "board.h"
  18. #include "drv_uart.h"
  19. struct lpc_uart
  20. {
  21. LPC_USARTn_Type *USART;
  22. IRQn_Type USART_IRQn;
  23. };
  24. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  25. {
  26. RT_ASSERT(serial != RT_NULL);
  27. return RT_EOK;
  28. }
  29. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  30. {
  31. struct lpc_uart *uart;
  32. RT_ASSERT(serial != RT_NULL);
  33. uart = (struct lpc_uart *)serial->parent.user_data;
  34. switch (cmd)
  35. {
  36. case RT_DEVICE_CTRL_CLR_INT:
  37. /* disable rx irq */
  38. uart->USART->IER &= ~UART_IER_RBRINT_EN;
  39. break;
  40. case RT_DEVICE_CTRL_SET_INT:
  41. /* enable rx irq */
  42. uart->USART->IER |= UART_IER_RBRINT_EN;
  43. break;
  44. }
  45. return RT_EOK;
  46. }
  47. static int lpc_putc(struct rt_serial_device *serial, char c)
  48. {
  49. struct lpc_uart *uart;
  50. uart = (struct lpc_uart *)serial->parent.user_data;
  51. while (!(uart->USART->LSR & 0x20));
  52. uart->USART->THR = c;
  53. return 1;
  54. }
  55. static int lpc_getc(struct rt_serial_device *serial)
  56. {
  57. struct lpc_uart *uart;
  58. uart = (struct lpc_uart *)serial->parent.user_data;
  59. if (uart->USART->LSR & 0x01)
  60. {
  61. return (uart->USART->RBR);
  62. }
  63. return -1;
  64. }
  65. static const struct rt_uart_ops lpc_uart_ops =
  66. {
  67. lpc_configure,
  68. lpc_control,
  69. lpc_putc,
  70. lpc_getc,
  71. };
  72. static void _do_uart_isr(struct rt_serial_device *sdev)
  73. {
  74. struct lpc_uart *uart;
  75. volatile uint32_t intsrc, temp;
  76. uart = sdev->parent.user_data;
  77. /* Determine the interrupt source */
  78. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  79. switch (intsrc)
  80. {
  81. case UART_IIR_INTID_RLS:
  82. /* Receive Line Status interrupt */
  83. /* read the line status */
  84. intsrc = uart->USART->LSR;
  85. /* Receive an error data */
  86. if (intsrc & UART_LSR_PE)
  87. {
  88. temp = uart->USART->RBR;
  89. }
  90. break;
  91. case UART_IIR_INTID_RDA:
  92. /* Receive data */
  93. case UART_IIR_INTID_CTI:
  94. /* Receive data timeout */
  95. /* read the data to buffer */
  96. while (uart->USART->LSR & UART_LSR_RDR)
  97. {
  98. rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
  99. }
  100. break;
  101. default:
  102. break;
  103. }
  104. }
  105. #if defined(RT_USING_UART0)
  106. /* UART0 device driver structure */
  107. struct lpc_uart uart0 =
  108. {
  109. LPC_USART0,
  110. USART0_IRQn,
  111. };
  112. struct rt_serial_device serial0;
  113. void UART0_IRQHandler(void)
  114. {
  115. rt_interrupt_enter();
  116. _do_uart_isr(&serial0);
  117. rt_interrupt_leave();
  118. }
  119. #endif
  120. #if defined(RT_USING_UART2)
  121. struct lpc_uart uart2 =
  122. {
  123. LPC_USART2,
  124. USART2_IRQn,
  125. };
  126. struct rt_serial_device serial2;
  127. void UART2_IRQHandler(void)
  128. {
  129. rt_interrupt_enter();
  130. _do_uart_isr(&serial2);
  131. rt_interrupt_leave();
  132. }
  133. #endif
  134. void rt_hw_uart_init(void)
  135. {
  136. struct lpc_uart *uart;
  137. struct serial_configure config;
  138. #ifdef RT_USING_UART0
  139. uart = &uart0;
  140. config.baud_rate = BAUD_RATE_115200;
  141. config.bit_order = BIT_ORDER_LSB;
  142. config.data_bits = DATA_BITS_8;
  143. config.parity = PARITY_NONE;
  144. config.stop_bits = STOP_BITS_1;
  145. config.invert = NRZ_NORMAL;
  146. config.bufsz = RT_SERIAL_RB_BUFSZ;
  147. serial0.ops = &lpc_uart_ops;
  148. serial0.config = config;
  149. /* Enable GPIO register interface clock */
  150. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  151. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  152. /* Enable USART0 peripheral clock */
  153. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  154. while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
  155. /* Enable USART0 register interface clock */
  156. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  157. while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
  158. /* Init GPIO pins */
  159. LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
  160. (1 << 4) | /* Pull-up disabled */
  161. (1 << 0) ; /* Pin P2_0 used as U0_TXD */
  162. LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
  163. (1 << 4) | /* Pull-up disabled */
  164. (1 << 0) ; /* Pin P2_1 used as U0_RXD */
  165. /* Init USART0 */
  166. LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  167. LPC_USART0->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  168. LPC_USART0->DLM = 0x00;
  169. LPC_USART0->FDR = 0xC1;
  170. LPC_USART0->LCR = 0x03; /* DLAB = 0 */
  171. /* preemption = 1, sub-priority = 1 */
  172. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  173. /* Enable Interrupt for UART channel */
  174. NVIC_EnableIRQ(uart->USART_IRQn);
  175. /* register UART0 device */
  176. rt_hw_serial_register(&serial0, "uart0",
  177. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  178. uart);
  179. #endif
  180. #ifdef RT_USING_UART2
  181. uart = &uart2;
  182. config.baud_rate = BAUD_RATE_115200;
  183. config.bit_order = BIT_ORDER_LSB;
  184. config.data_bits = DATA_BITS_8;
  185. config.parity = PARITY_NONE;
  186. config.stop_bits = STOP_BITS_1;
  187. config.invert = NRZ_NORMAL;
  188. config.bufsz = RT_SERIAL_RB_BUFSZ;
  189. serial2.ops = &lpc_uart_ops;
  190. serial2.config = config;
  191. /* Enable GPIO register interface clock */
  192. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  193. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  194. /* Enable USART2 peripheral clock */
  195. LPC_CCU2->CLK_APB0_USART2_CFG |= 0x01;
  196. while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
  197. /* Enable USART2 register interface clock */
  198. LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
  199. while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
  200. /* Init GPIO pins */
  201. LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
  202. (1 << 4) | /* Pull-up disabled */
  203. (1 << 0) ; /* Pin P1_15 used as U2_TXD */
  204. LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
  205. (1 << 4) | /* Pull-up disabled */
  206. (1 << 0) ; /* Pin P1_16 used as U2_RXD */
  207. /* Init USART2 */
  208. LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  209. LPC_USART2->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  210. LPC_USART2->DLM = 0x00;
  211. LPC_USART2->FDR = 0xC1;
  212. LPC_USART2->LCR = 0x03; /* DLAB = 0 */
  213. /* preemption = 1, sub-priority = 1 */
  214. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  215. /* Enable Interrupt for UART channel */
  216. NVIC_EnableIRQ(uart->USART_IRQn);
  217. /* register UART2 device */
  218. rt_hw_serial_register(&serial2, "uart2",
  219. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  220. uart);
  221. #endif
  222. }