board_dev.c 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307
  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-12-12 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #include <rtdevice.h>
  14. #if defined(BOARD_USING_STORAGE_SPIFLASH)
  15. #if defined(RT_USING_SFUD)
  16. #include "spi_flash.h"
  17. #include "spi_flash_sfud.h"
  18. #endif
  19. #include "drv_qspi.h"
  20. #define W25X_REG_READSTATUS (0x05)
  21. #define W25X_REG_READSTATUS2 (0x35)
  22. #define W25X_REG_WRITEENABLE (0x06)
  23. #define W25X_REG_WRITESTATUS (0x01)
  24. #define W25X_REG_QUADENABLE (0x02)
  25. static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
  26. {
  27. rt_uint8_t u8Val;
  28. rt_err_t result = RT_EOK;
  29. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
  30. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  31. RT_ASSERT(result > 0);
  32. return u8Val;
  33. }
  34. static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
  35. {
  36. rt_uint8_t u8Val;
  37. rt_err_t result = RT_EOK;
  38. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
  39. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  40. RT_ASSERT(result > 0);
  41. return u8Val;
  42. }
  43. static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
  44. {
  45. rt_uint8_t w25x_txCMD1;
  46. rt_uint8_t au8Val[2];
  47. rt_err_t result;
  48. struct rt_qspi_message qspi_message = {0};
  49. /* Enable WE */
  50. w25x_txCMD1 = W25X_REG_WRITEENABLE;
  51. result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
  52. if (result != sizeof(w25x_txCMD1))
  53. goto exit_SpiFlash_WriteStatusReg;
  54. /* Prepare status-1, 2 data */
  55. au8Val[0] = u8Value1;
  56. au8Val[1] = u8Value2;
  57. /* 1-bit mode: Instruction+payload */
  58. qspi_message.instruction.content = W25X_REG_WRITESTATUS;
  59. qspi_message.instruction.qspi_lines = 1;
  60. qspi_message.qspi_data_lines = 1;
  61. qspi_message.parent.cs_take = 1;
  62. qspi_message.parent.cs_release = 1;
  63. qspi_message.parent.send_buf = &au8Val[0];
  64. qspi_message.parent.length = sizeof(au8Val);
  65. qspi_message.parent.next = RT_NULL;
  66. if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
  67. {
  68. result = -RT_ERROR;
  69. }
  70. result = RT_EOK;
  71. exit_SpiFlash_WriteStatusReg:
  72. return result;
  73. }
  74. static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
  75. {
  76. volatile uint8_t u8ReturnValue;
  77. do
  78. {
  79. u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
  80. u8ReturnValue = u8ReturnValue & 1;
  81. }
  82. while (u8ReturnValue != 0); // check the BUSY bit
  83. }
  84. static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
  85. {
  86. rt_err_t result = RT_EOK;
  87. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  88. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  89. u8Status2 |= W25X_REG_QUADENABLE;
  90. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  91. RT_ASSERT(result == RT_EOK);
  92. SpiFlash_WaitReady(qspi_device);
  93. }
  94. static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
  95. {
  96. rt_err_t result = RT_EOK;
  97. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  98. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  99. u8Status2 &= ~W25X_REG_QUADENABLE;
  100. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  101. RT_ASSERT(result == RT_EOK);
  102. SpiFlash_WaitReady(qspi_device);
  103. }
  104. static int rt_hw_spiflash_init(void)
  105. {
  106. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
  107. return -1;
  108. #if defined(RT_USING_SFUD)
  109. if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
  110. {
  111. return -(RT_ERROR);
  112. }
  113. #endif
  114. return 0;
  115. }
  116. INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
  117. #endif
  118. #if defined(BOARD_USING_STORAGE_SPINAND) && defined(NU_PKG_USING_SPINAND)
  119. #include "drv_qspi.h"
  120. #include "spinand.h"
  121. struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM] =
  122. {
  123. [0] =
  124. {
  125. .block_start = 0,
  126. .block_end = 63,
  127. .block_total = 64,
  128. },
  129. [1] =
  130. {
  131. .block_start = 64,
  132. .block_end = 1023,
  133. .block_total = 1000,
  134. },
  135. [2] =
  136. {
  137. .block_start = 0,
  138. .block_end = 1023,
  139. .block_total = 1024,
  140. }
  141. };
  142. static int rt_hw_spinand_init(void)
  143. {
  144. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, RT_NULL, RT_NULL) != RT_EOK)
  145. return -1;
  146. if (rt_hw_mtd_spinand_register("qspi01") != RT_EOK)
  147. return -1;
  148. return 0;
  149. }
  150. INIT_COMPONENT_EXPORT(rt_hw_spinand_init);
  151. #endif
  152. #if defined(BSP_USING_ADC_TOUCH) && defined(NU_PKG_USING_ADC_TOUCH)
  153. #include "adc_touch.h"
  154. #if (BSP_LCD_WIDTH==320) && (BSP_LCD_HEIGHT==240)
  155. S_CALIBRATION_MATRIX g_sCalMat = { 43, -5839, 21672848, 4193, -11, -747882, 65536 };
  156. #endif
  157. #endif
  158. #if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
  159. #include <lcd_ili9341.h>
  160. #if defined(PKG_USING_GUIENGINE)
  161. #include <rtgui/driver.h>
  162. #endif
  163. int rt_hw_ili9341_port(void)
  164. {
  165. if (rt_hw_lcd_ili9341_spi_init("spi0", RT_NULL) != RT_EOK)
  166. return -1;
  167. rt_hw_lcd_ili9341_init();
  168. #if defined(PKG_USING_GUIENGINE)
  169. rt_device_t lcd_ili9341;
  170. lcd_ili9341 = rt_device_find("lcd");
  171. if (lcd_ili9341)
  172. {
  173. rtgui_graphic_set_device(lcd_ili9341);
  174. }
  175. #endif
  176. return 0;
  177. }
  178. INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
  179. #endif /* BOARD_USING_LCD_ILI9341 */
  180. #if defined(BOARD_USING_ESP8266)
  181. #include <at_device_esp8266.h>
  182. #define LOG_TAG "at.sample.esp"
  183. #undef DBG_TAG
  184. #undef DBG_LVL
  185. #include <at_log.h>
  186. static struct at_device_esp8266 esp0 =
  187. {
  188. "esp0", /* esp8266 device name */
  189. "uart1", /* esp8266 serial device name, EX: uart1, uuart1 */
  190. "NT_ZY_BUFFALO", /* Wi-Fi SSID */
  191. "12345678", /* Wi-Fi PASSWORD */
  192. 2048 /* Receive buffer length */
  193. };
  194. static int rt_hw_esp8266_port(void)
  195. {
  196. struct at_device_esp8266 *esp8266 = &esp0;
  197. return at_device_register(&(esp8266->device),
  198. esp8266->device_name,
  199. esp8266->client_name,
  200. AT_DEVICE_CLASS_ESP8266,
  201. (void *) esp8266);
  202. }
  203. INIT_APP_EXPORT(rt_hw_esp8266_port);
  204. static int at_wifi_set(int argc, char **argv)
  205. {
  206. struct at_device_ssid_pwd sATDConf;
  207. struct at_device *at_dev = RT_NULL;
  208. /* If the number of arguments less than 2 */
  209. if (argc != 3)
  210. {
  211. rt_kprintf("\n");
  212. rt_kprintf("at_wifi_set <ssid> <password>\n");
  213. return -1;
  214. }
  215. sATDConf.ssid = argv[1]; //ssid
  216. sATDConf.password = argv[2]; //password
  217. if ((at_dev = at_device_get_first_initialized()) != RT_NULL)
  218. at_device_control(at_dev, AT_DEVICE_CTRL_SET_WIFI_INFO, &sATDConf);
  219. else
  220. {
  221. rt_kprintf("Can't find any initialized AT device.\n");
  222. }
  223. return 0;
  224. }
  225. #ifdef FINSH_USING_MSH
  226. MSH_CMD_EXPORT(at_wifi_set, AT device wifi set ssid / password function);
  227. #endif
  228. #endif /* BOARD_USING_ESP8266 */
  229. #if defined(BOARD_USING_NAU8822) && defined(NU_PKG_USING_NAU8822)
  230. #include <acodec_nau8822.h>
  231. S_NU_NAU8822_CONFIG sCodecConfig =
  232. {
  233. .i2c_bus_name = "i2c0",
  234. .i2s_bus_name = "sound0",
  235. .pin_phonejack_en = 0,
  236. .pin_phonejack_det = 0,
  237. };
  238. int rt_hw_nau8822_port(void)
  239. {
  240. if (nu_hw_nau8822_init(&sCodecConfig) != RT_EOK)
  241. return -1;
  242. return 0;
  243. }
  244. INIT_COMPONENT_EXPORT(rt_hw_nau8822_port);
  245. #endif /* BOARD_USING_NAU8822 */