gh_pmu_irr.h 10 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_pmu_irr.h
  5. **
  6. ** \brief Infrared Receiver.
  7. **
  8. ** Copyright: 2012 - 2016 (C) GoKe Microelectronics
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_PMU_IRR_H
  18. #define _GH_PMU_IRR_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_PMU_IRR_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_PMU_IRR_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_PMU_IRR_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_PMU_IRR_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /*----------------------------------------------------------------------------*/
  41. /* registers */
  42. /*----------------------------------------------------------------------------*/
  43. #define REG_PMU_IRR_PROG FIO_ADDRESS(PMU_IRR,0x90082000) /* write */
  44. #define REG_PMU_IRR_PRESCALER_L FIO_ADDRESS(PMU_IRR,0x90082004) /* write */
  45. #define REG_PMU_IRR_PRESCALER_H FIO_ADDRESS(PMU_IRR,0x90082008) /* write */
  46. #define REG_PMU_IRR_READ FIO_ADDRESS(PMU_IRR,0x9008200C) /* read/clear */
  47. #define REG_PMU_IRR_IRQMASK_L FIO_ADDRESS(PMU_IRR,0x90082014) /* write */
  48. #define REG_PMU_IRR_IRQMASK_H FIO_ADDRESS(PMU_IRR,0x90082018) /* write */
  49. /*----------------------------------------------------------------------------*/
  50. /* bit group structures */
  51. /*----------------------------------------------------------------------------*/
  52. typedef union { /* PMU_IRR_Prog */
  53. U32 all;
  54. struct {
  55. U32 rx : 1;
  56. U32 rising_edge : 1;
  57. U32 falling_edge : 1;
  58. U32 restarts : 1;
  59. U32 : 28;
  60. } bitc;
  61. } GH_PMU_IRR_PROG_S;
  62. typedef union { /* PMU_IRR_PreScaler_l */
  63. U32 all;
  64. struct {
  65. U32 value : 8;
  66. U32 : 24;
  67. } bitc;
  68. } GH_PMU_IRR_PRESCALER_L_S;
  69. typedef union { /* PMU_IRR_PreScaler_h */
  70. U32 all;
  71. struct {
  72. U32 value : 8;
  73. U32 : 24;
  74. } bitc;
  75. } GH_PMU_IRR_PRESCALER_H_S;
  76. typedef union { /* PMU_IRR_Read */
  77. U32 all;
  78. struct {
  79. U32 pulse27 : 6;
  80. U32 edge : 1;
  81. U32 valid : 1;
  82. U32 : 24;
  83. } bitc;
  84. } GH_PMU_IRR_READ_S;
  85. typedef union { /* PMU_IRR_IrqMask_l */
  86. U32 all;
  87. struct {
  88. U32 value : 8;
  89. U32 : 24;
  90. } bitc;
  91. } GH_PMU_IRR_IRQMASK_L_S;
  92. typedef union { /* PMU_IRR_IrqMask_h */
  93. U32 all;
  94. struct {
  95. U32 value : 8;
  96. U32 : 24;
  97. } bitc;
  98. } GH_PMU_IRR_IRQMASK_H_S;
  99. /*----------------------------------------------------------------------------*/
  100. /* mirror variables */
  101. /*----------------------------------------------------------------------------*/
  102. extern GH_PMU_IRR_PROG_S m_pmu_irr_prog;
  103. extern GH_PMU_IRR_PRESCALER_L_S m_pmu_irr_prescaler_l;
  104. extern GH_PMU_IRR_PRESCALER_H_S m_pmu_irr_prescaler_h;
  105. extern GH_PMU_IRR_READ_S m_pmu_irr_read;
  106. extern GH_PMU_IRR_IRQMASK_L_S m_pmu_irr_irqmask_l;
  107. extern GH_PMU_IRR_IRQMASK_H_S m_pmu_irr_irqmask_h;
  108. #ifdef __cplusplus
  109. extern "C" {
  110. #endif
  111. /*----------------------------------------------------------------------------*/
  112. /* register PMU_IRR_Prog (write) */
  113. /*----------------------------------------------------------------------------*/
  114. /*! \brief Writes the register 'PMU_IRR_Prog'. */
  115. void GH_PMU_IRR_set_Prog(U32 data);
  116. /*! \brief Reads the mirror variable of the register 'PMU_IRR_Prog'. */
  117. U32 GH_PMU_IRR_getm_Prog(void);
  118. /*! \brief Writes the bit group 'RX' of register 'PMU_IRR_Prog'. */
  119. void GH_PMU_IRR_set_Prog_RX(U8 data);
  120. /*! \brief Reads the bit group 'RX' from the mirror variable of register 'PMU_IRR_Prog'. */
  121. U8 GH_PMU_IRR_getm_Prog_RX(void);
  122. /*! \brief Writes the bit group 'RISING_EDGE' of register 'PMU_IRR_Prog'. */
  123. void GH_PMU_IRR_set_Prog_RISING_EDGE(U8 data);
  124. /*! \brief Reads the bit group 'RISING_EDGE' from the mirror variable of register 'PMU_IRR_Prog'. */
  125. U8 GH_PMU_IRR_getm_Prog_RISING_EDGE(void);
  126. /*! \brief Writes the bit group 'FALLING_EDGE' of register 'PMU_IRR_Prog'. */
  127. void GH_PMU_IRR_set_Prog_FALLING_EDGE(U8 data);
  128. /*! \brief Reads the bit group 'FALLING_EDGE' from the mirror variable of register 'PMU_IRR_Prog'. */
  129. U8 GH_PMU_IRR_getm_Prog_FALLING_EDGE(void);
  130. /*! \brief Writes the bit group 'RESTARTS' of register 'PMU_IRR_Prog'. */
  131. void GH_PMU_IRR_set_Prog_RESTARTS(U8 data);
  132. /*! \brief Reads the bit group 'RESTARTS' from the mirror variable of register 'PMU_IRR_Prog'. */
  133. U8 GH_PMU_IRR_getm_Prog_RESTARTS(void);
  134. /*----------------------------------------------------------------------------*/
  135. /* register PMU_IRR_PreScaler_l (write) */
  136. /*----------------------------------------------------------------------------*/
  137. /*! \brief Writes the register 'PMU_IRR_PreScaler_l'. */
  138. void GH_PMU_IRR_set_PreScaler_l(U32 data);
  139. /*! \brief Reads the mirror variable of the register 'PMU_IRR_PreScaler_l'. */
  140. U32 GH_PMU_IRR_getm_PreScaler_l(void);
  141. /*! \brief Writes the bit group 'VALUE' of register 'PMU_IRR_PreScaler_l'. */
  142. void GH_PMU_IRR_set_PreScaler_l_VALUE(U8 data);
  143. /*! \brief Reads the bit group 'VALUE' from the mirror variable of register 'PMU_IRR_PreScaler_l'. */
  144. U8 GH_PMU_IRR_getm_PreScaler_l_VALUE(void);
  145. /*----------------------------------------------------------------------------*/
  146. /* register PMU_IRR_PreScaler_h (write) */
  147. /*----------------------------------------------------------------------------*/
  148. /*! \brief Writes the register 'PMU_IRR_PreScaler_h'. */
  149. void GH_PMU_IRR_set_PreScaler_h(U32 data);
  150. /*! \brief Reads the mirror variable of the register 'PMU_IRR_PreScaler_h'. */
  151. U32 GH_PMU_IRR_getm_PreScaler_h(void);
  152. /*! \brief Writes the bit group 'VALUE' of register 'PMU_IRR_PreScaler_h'. */
  153. void GH_PMU_IRR_set_PreScaler_h_VALUE(U8 data);
  154. /*! \brief Reads the bit group 'VALUE' from the mirror variable of register 'PMU_IRR_PreScaler_h'. */
  155. U8 GH_PMU_IRR_getm_PreScaler_h_VALUE(void);
  156. /*----------------------------------------------------------------------------*/
  157. /* register PMU_IRR_Read (read/clear) */
  158. /*----------------------------------------------------------------------------*/
  159. /*! \brief Writes the register 'PMU_IRR_Read'. */
  160. U32 GH_PMU_IRR_get_Read(void);
  161. /*! \brief Reads the mirror variable of the register 'PMU_IRR_Read'. */
  162. U32 GH_PMU_IRR_getm_Read(void);
  163. /*! \brief Reads the bit group 'PULSE27' from the mirror variable of register 'PMU_IRR_Read'. */
  164. U8 GH_PMU_IRR_getm_Read_PULSE27(void);
  165. /*! \brief Reads the bit group 'EDGE' from the mirror variable of register 'PMU_IRR_Read'. */
  166. U8 GH_PMU_IRR_getm_Read_EDGE(void);
  167. /*! \brief Reads the bit group 'VALID' from the mirror variable of register 'PMU_IRR_Read'. */
  168. U8 GH_PMU_IRR_getm_Read_VALID(void);
  169. /*----------------------------------------------------------------------------*/
  170. /* register PMU_IRR_IrqMask_l (write) */
  171. /*----------------------------------------------------------------------------*/
  172. /*! \brief Writes the register 'PMU_IRR_IrqMask_l'. */
  173. void GH_PMU_IRR_set_IrqMask_l(U32 data);
  174. /*! \brief Reads the mirror variable of the register 'PMU_IRR_IrqMask_l'. */
  175. U32 GH_PMU_IRR_getm_IrqMask_l(void);
  176. /*! \brief Writes the bit group 'VALUE' of register 'PMU_IRR_IrqMask_l'. */
  177. void GH_PMU_IRR_set_IrqMask_l_VALUE(U8 data);
  178. /*! \brief Reads the bit group 'VALUE' from the mirror variable of register 'PMU_IRR_IrqMask_l'. */
  179. U8 GH_PMU_IRR_getm_IrqMask_l_VALUE(void);
  180. /*----------------------------------------------------------------------------*/
  181. /* register PMU_IRR_IrqMask_h (write) */
  182. /*----------------------------------------------------------------------------*/
  183. /*! \brief Writes the register 'PMU_IRR_IrqMask_h'. */
  184. void GH_PMU_IRR_set_IrqMask_h(U32 data);
  185. /*! \brief Reads the mirror variable of the register 'PMU_IRR_IrqMask_h'. */
  186. U32 GH_PMU_IRR_getm_IrqMask_h(void);
  187. /*! \brief Writes the bit group 'VALUE' of register 'PMU_IRR_IrqMask_h'. */
  188. void GH_PMU_IRR_set_IrqMask_h_VALUE(U8 data);
  189. /*! \brief Reads the bit group 'VALUE' from the mirror variable of register 'PMU_IRR_IrqMask_h'. */
  190. U8 GH_PMU_IRR_getm_IrqMask_h_VALUE(void);
  191. /*----------------------------------------------------------------------------*/
  192. /* init function */
  193. /*----------------------------------------------------------------------------*/
  194. /*! \brief Initialises the registers and mirror variables. */
  195. void GH_PMU_IRR_init(void);
  196. #ifdef SRC_INLINE
  197. #define SRC_INC 1
  198. #include "gh_pmu_irr.c"
  199. #undef SRC_INC
  200. #endif
  201. #ifdef __cplusplus
  202. }
  203. #endif
  204. #endif /* _GH_PMU_IRR_H */
  205. /*----------------------------------------------------------------------------*/
  206. /* end of file */
  207. /*----------------------------------------------------------------------------*/