fsl_enc.c 16 KB

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  1. /*
  2. * The Clear BSD License
  3. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  4. * Copyright 2016-2017 NXP
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without modification,
  8. * are permitted (subject to the limitations in the disclaimer below) provided
  9. * that the following conditions are met:
  10. *
  11. * o Redistributions of source code must retain the above copyright notice, this list
  12. * of conditions and the following disclaimer.
  13. *
  14. * o Redistributions in binary form must reproduce the above copyright notice, this
  15. * list of conditions and the following disclaimer in the documentation and/or
  16. * other materials provided with the distribution.
  17. *
  18. * o Neither the name of the copyright holder nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  27. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include "fsl_enc.h"
  35. /*******************************************************************************
  36. * Definitions
  37. ******************************************************************************/
  38. /* Component ID definition, used by tools. */
  39. #ifndef FSL_COMPONENT_ID
  40. #define FSL_COMPONENT_ID "platform.drivers.enc"
  41. #endif
  42. #define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
  43. #define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
  44. /*******************************************************************************
  45. * Prototypes
  46. ******************************************************************************/
  47. /*!
  48. * @brief Get instance number for ENC module.
  49. *
  50. * @param base ENC peripheral base address
  51. */
  52. static uint32_t ENC_GetInstance(ENC_Type *base);
  53. /*******************************************************************************
  54. * Variables
  55. ******************************************************************************/
  56. /*! @brief Pointers to ENC bases for each instance. */
  57. static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;
  58. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  59. /*! @brief Pointers to ENC clocks for each instance. */
  60. static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
  61. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  62. /*******************************************************************************
  63. * Code
  64. ******************************************************************************/
  65. static uint32_t ENC_GetInstance(ENC_Type *base)
  66. {
  67. uint32_t instance;
  68. /* Find the instance index from base address mappings. */
  69. for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
  70. {
  71. if (s_encBases[instance] == base)
  72. {
  73. break;
  74. }
  75. }
  76. assert(instance < ARRAY_SIZE(s_encBases));
  77. return instance;
  78. }
  79. void ENC_Init(ENC_Type *base, const enc_config_t *config)
  80. {
  81. assert(NULL != config);
  82. uint32_t tmp16;
  83. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  84. /* Enable the clock. */
  85. CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
  86. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  87. /* ENC_CTRL. */
  88. tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
  89. ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
  90. /* For HOME trigger. */
  91. if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
  92. {
  93. tmp16 |= ENC_CTRL_HIP_MASK;
  94. if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
  95. {
  96. tmp16 |= ENC_CTRL_HNE_MASK;
  97. }
  98. }
  99. /* For encoder work mode. */
  100. if (config->enableReverseDirection)
  101. {
  102. tmp16 |= ENC_CTRL_REV_MASK;
  103. }
  104. if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
  105. {
  106. tmp16 |= ENC_CTRL_PH1_MASK;
  107. }
  108. /* For INDEX trigger. */
  109. if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
  110. {
  111. tmp16 |= ENC_CTRL_XIP_MASK;
  112. if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
  113. {
  114. tmp16 |= ENC_CTRL_XNE_MASK;
  115. }
  116. }
  117. /* Watchdog. */
  118. if (config->enableWatchdog)
  119. {
  120. tmp16 |= ENC_CTRL_WDE_MASK;
  121. base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
  122. }
  123. base->CTRL = tmp16;
  124. /* ENC_FILT. */
  125. base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);
  126. /* ENC_CTRL2. */
  127. tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
  128. ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
  129. if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
  130. {
  131. tmp16 |= ENC_CTRL2_OUTCTL_MASK;
  132. }
  133. if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
  134. {
  135. tmp16 |= ENC_CTRL2_REVMOD_MASK;
  136. }
  137. if (config->enableModuloCountMode)
  138. {
  139. tmp16 |= ENC_CTRL2_MOD_MASK;
  140. /* Set modulus value. */
  141. base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
  142. base->LMOD = (uint16_t)(config->positionModulusValue); /* Lower 16 bits. */
  143. }
  144. if (config->enableTRIGGERClearPositionCounter)
  145. {
  146. tmp16 |= ENC_CTRL2_UPDPOS_MASK;
  147. }
  148. if (config->enableTRIGGERClearHoldPositionCounter)
  149. {
  150. tmp16 |= ENC_CTRL2_UPDHLD_MASK;
  151. }
  152. base->CTRL2 = tmp16;
  153. /* ENC_UCOMP & ENC_LCOMP. */
  154. base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
  155. base->LCOMP = (uint16_t)(config->positionCompareValue); /* Lower 16 bits. */
  156. /* ENC_UINIT & ENC_LINIT. */
  157. base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
  158. base->LINIT = (uint16_t)(config->positionInitialValue); /* Lower 16 bits. */
  159. }
  160. void ENC_Deinit(ENC_Type *base)
  161. {
  162. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  163. /* Disable the clock. */
  164. CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
  165. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  166. }
  167. void ENC_GetDefaultConfig(enc_config_t *config)
  168. {
  169. assert(NULL != config);
  170. config->enableReverseDirection = false;
  171. config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
  172. config->HOMETriggerMode = kENC_HOMETriggerDisabled;
  173. config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
  174. config->enableTRIGGERClearPositionCounter = false;
  175. config->enableTRIGGERClearHoldPositionCounter = false;
  176. config->enableWatchdog = false;
  177. config->watchdogTimeoutValue = 0U;
  178. config->filterCount = 0U;
  179. config->filterSamplePeriod = 0U;
  180. config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
  181. config->positionCompareValue = 0xFFFFFFFFU;
  182. config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
  183. config->enableModuloCountMode = false;
  184. config->positionModulusValue = 0U;
  185. config->positionInitialValue = 0U;
  186. }
  187. void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
  188. {
  189. uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);
  190. tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
  191. base->CTRL = tmp16;
  192. }
  193. void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
  194. {
  195. uint16_t tmp16 = 0U;
  196. if (NULL == config) /* Pass "NULL" to disable the feature. */
  197. {
  198. base->TST = 0U;
  199. return;
  200. }
  201. tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
  202. ENC_TST_TEST_COUNT(config->signalCount);
  203. if (kENC_SelfTestDirectionNegative == config->signalDirection)
  204. {
  205. tmp16 |= ENC_TST_QDN_MASK;
  206. }
  207. base->TST = tmp16;
  208. }
  209. void ENC_EnableWatchdog(ENC_Type *base, bool enable)
  210. {
  211. uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));
  212. if (enable)
  213. {
  214. tmp16 |= ENC_CTRL_WDE_MASK;
  215. }
  216. base->CTRL = tmp16;
  217. }
  218. uint32_t ENC_GetStatusFlags(ENC_Type *base)
  219. {
  220. uint32_t ret32 = 0U;
  221. /* ENC_CTRL. */
  222. if (ENC_CTRL_HIRQ_MASK == (ENC_CTRL_HIRQ_MASK & base->CTRL))
  223. {
  224. ret32 |= kENC_HOMETransitionFlag;
  225. }
  226. if (ENC_CTRL_XIRQ_MASK == (ENC_CTRL_XIRQ_MASK & base->CTRL))
  227. {
  228. ret32 |= kENC_INDEXPulseFlag;
  229. }
  230. if (ENC_CTRL_DIRQ_MASK == (ENC_CTRL_DIRQ_MASK & base->CTRL))
  231. {
  232. ret32 |= kENC_WatchdogTimeoutFlag;
  233. }
  234. if (ENC_CTRL_CMPIRQ_MASK == (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
  235. {
  236. ret32 |= kENC_PositionCompareFlag;
  237. }
  238. /* ENC_CTRL2. */
  239. if (ENC_CTRL2_SABIRQ_MASK == (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
  240. {
  241. ret32 |= kENC_SimultBothPhaseChangeFlag;
  242. }
  243. if (ENC_CTRL2_ROIRQ_MASK == (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
  244. {
  245. ret32 |= kENC_PositionRollOverFlag;
  246. }
  247. if (ENC_CTRL2_RUIRQ_MASK == (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
  248. {
  249. ret32 |= kENC_PositionRollUnderFlag;
  250. }
  251. if (ENC_CTRL2_DIR_MASK == (ENC_CTRL2_DIR_MASK & base->CTRL2))
  252. {
  253. ret32 |= kENC_LastCountDirectionFlag;
  254. }
  255. return ret32;
  256. }
  257. void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
  258. {
  259. uint32_t tmp16 = 0U;
  260. /* ENC_CTRL. */
  261. if (kENC_HOMETransitionFlag == (kENC_HOMETransitionFlag & mask))
  262. {
  263. tmp16 |= ENC_CTRL_HIRQ_MASK;
  264. }
  265. if (kENC_INDEXPulseFlag == (kENC_INDEXPulseFlag & mask))
  266. {
  267. tmp16 |= ENC_CTRL_XIRQ_MASK;
  268. }
  269. if (kENC_WatchdogTimeoutFlag == (kENC_WatchdogTimeoutFlag & mask))
  270. {
  271. tmp16 |= ENC_CTRL_DIRQ_MASK;
  272. }
  273. if (kENC_PositionCompareFlag == (kENC_PositionCompareFlag & mask))
  274. {
  275. tmp16 |= ENC_CTRL_CMPIRQ_MASK;
  276. }
  277. if (0U != tmp16)
  278. {
  279. base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
  280. }
  281. /* ENC_CTRL2. */
  282. tmp16 = 0U;
  283. if (kENC_SimultBothPhaseChangeFlag == (kENC_SimultBothPhaseChangeFlag & mask))
  284. {
  285. tmp16 |= ENC_CTRL2_SABIRQ_MASK;
  286. }
  287. if (kENC_PositionRollOverFlag == (kENC_PositionRollOverFlag & mask))
  288. {
  289. tmp16 |= ENC_CTRL2_ROIRQ_MASK;
  290. }
  291. if (kENC_PositionRollUnderFlag == (kENC_PositionRollUnderFlag & mask))
  292. {
  293. tmp16 |= ENC_CTRL2_RUIRQ_MASK;
  294. }
  295. if (0U != tmp16)
  296. {
  297. base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
  298. }
  299. }
  300. void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
  301. {
  302. uint32_t tmp16 = 0U;
  303. /* ENC_CTRL. */
  304. if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
  305. {
  306. tmp16 |= ENC_CTRL_HIE_MASK;
  307. }
  308. if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
  309. {
  310. tmp16 |= ENC_CTRL_XIE_MASK;
  311. }
  312. if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
  313. {
  314. tmp16 |= ENC_CTRL_DIE_MASK;
  315. }
  316. if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
  317. {
  318. tmp16 |= ENC_CTRL_CMPIE_MASK;
  319. }
  320. if (tmp16 != 0U)
  321. {
  322. base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
  323. }
  324. /* ENC_CTRL2. */
  325. tmp16 = 0U;
  326. if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
  327. {
  328. tmp16 |= ENC_CTRL2_SABIE_MASK;
  329. }
  330. if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
  331. {
  332. tmp16 |= ENC_CTRL2_ROIE_MASK;
  333. }
  334. if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
  335. {
  336. tmp16 |= ENC_CTRL2_RUIE_MASK;
  337. }
  338. if (tmp16 != 0U)
  339. {
  340. base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
  341. }
  342. }
  343. void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
  344. {
  345. uint16_t tmp16 = 0U;
  346. /* ENC_CTRL. */
  347. if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
  348. {
  349. tmp16 |= ENC_CTRL_HIE_MASK;
  350. }
  351. if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
  352. {
  353. tmp16 |= ENC_CTRL_XIE_MASK;
  354. }
  355. if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
  356. {
  357. tmp16 |= ENC_CTRL_DIE_MASK;
  358. }
  359. if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
  360. {
  361. tmp16 |= ENC_CTRL_CMPIE_MASK;
  362. }
  363. if (0U != tmp16)
  364. {
  365. base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
  366. }
  367. /* ENC_CTRL2. */
  368. tmp16 = 0U;
  369. if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
  370. {
  371. tmp16 |= ENC_CTRL2_SABIE_MASK;
  372. }
  373. if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
  374. {
  375. tmp16 |= ENC_CTRL2_ROIE_MASK;
  376. }
  377. if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
  378. {
  379. tmp16 |= ENC_CTRL2_RUIE_MASK;
  380. }
  381. if (tmp16 != 0U)
  382. {
  383. base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
  384. }
  385. }
  386. uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
  387. {
  388. uint32_t ret32 = 0U;
  389. /* ENC_CTRL. */
  390. if (ENC_CTRL_HIE_MASK == (ENC_CTRL_HIE_MASK & base->CTRL))
  391. {
  392. ret32 |= kENC_HOMETransitionInterruptEnable;
  393. }
  394. if (ENC_CTRL_XIE_MASK == (ENC_CTRL_XIE_MASK & base->CTRL))
  395. {
  396. ret32 |= kENC_INDEXPulseInterruptEnable;
  397. }
  398. if (ENC_CTRL_DIE_MASK == (ENC_CTRL_DIE_MASK & base->CTRL))
  399. {
  400. ret32 |= kENC_WatchdogTimeoutInterruptEnable;
  401. }
  402. if (ENC_CTRL_CMPIE_MASK == (ENC_CTRL_CMPIE_MASK & base->CTRL))
  403. {
  404. ret32 |= kENC_PositionCompareInerruptEnable;
  405. }
  406. /* ENC_CTRL2. */
  407. if (ENC_CTRL2_SABIE_MASK == (ENC_CTRL2_SABIE_MASK & base->CTRL2))
  408. {
  409. ret32 |= kENC_SimultBothPhaseChangeInterruptEnable;
  410. }
  411. if (ENC_CTRL2_ROIE_MASK == (ENC_CTRL2_ROIE_MASK & base->CTRL2))
  412. {
  413. ret32 |= kENC_PositionRollOverInterruptEnable;
  414. }
  415. if (ENC_CTRL2_RUIE_MASK == (ENC_CTRL2_RUIE_MASK & base->CTRL2))
  416. {
  417. ret32 |= kENC_PositionRollUnderInterruptEnable;
  418. }
  419. return ret32;
  420. }
  421. void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
  422. {
  423. base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
  424. base->LINIT = (uint16_t)(value); /* Set lower 16 bits. */
  425. }
  426. uint32_t ENC_GetPositionValue(ENC_Type *base)
  427. {
  428. uint32_t ret32;
  429. ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
  430. ret32 <<= 16U;
  431. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  432. return ret32;
  433. }
  434. uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
  435. {
  436. uint32_t ret32;
  437. ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
  438. ret32 <<= 16U;
  439. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  440. return ret32;
  441. }