interrupt.h 3.5 KB

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  1. /*
  2. * File : interrupt.h
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2017-2021, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2018-02-08 RT-Thread the first version
  23. * 2020-03-2 Howard Su Define same regsiters as an array
  24. */
  25. #ifndef __INTERRUPT_H__
  26. #define __INTERRUPT_H__
  27. /* Max number of interruptions */
  28. #define INTERRUPTS_MAX (64)
  29. /* a group num */
  30. #define GROUP_NUM (32)
  31. /* Interrupt Source */
  32. #define NMI_INTERRUPT (0)
  33. #define UART0_INTERRUPT (1)
  34. #define UART1_INTERRUPT (2)
  35. #define UART2_INTERRUPT (3)
  36. #define OWA_INTERRUPT (5)
  37. #define CIR_INTERRUPT (6)
  38. #define TWI0_INTERRUPT (7)
  39. #define TWI1_INTERRUPT (8)
  40. #define TWI2_INTERRUPT (9)
  41. #define SPI0_INTERRUPT (10)
  42. #define SPI1_INTERRUPT (11)
  43. #define TIMER0_INTERRUPT (13)
  44. #define TIMER1_INTERRUPT (14)
  45. #define TIMER2_INTERRUPT (15)
  46. #define WATCHDOG_INTERRUPT (16)
  47. #define RSB_INTERRUPT (17)
  48. #define DMA_INTERRUPT (18)
  49. #define TOUCHPANEL_INTERRUPT (20)
  50. #define AUDIOCODEC_INTERRUPT (21)
  51. #define KEYADC_INTERRUPT (22)
  52. #define SDC0_INTERRUPT (23)
  53. #define SDC1_INTERRUPT (24)
  54. #define USB_OTG_INTERRUPT (26)
  55. #define TVD_INTERRUPT (27)
  56. #define TVE_INTERRUPT (28)
  57. #define TCON_INTERRUPT (29)
  58. #define DE_FE_INTERRUPT (30)
  59. #define DE_BE_INTERRUPT (31)
  60. #define CSI_INTERRUPT (32)
  61. #define DE_INTERLACER_INTERRUPT (33)
  62. #define VE_INTERRUPT (34)
  63. #define DAUDIO_INTERRUPT (35)
  64. #define PIOD_INTERRUPT (38)
  65. #define PIOE_INTERRUPT (39)
  66. #define PIOF_INTERRUPT (40)
  67. /* intc register address */
  68. #define INTC_BASE_ADDR (0x01C20400)
  69. struct tina_intc
  70. {
  71. volatile rt_uint32_t vector_reg; /* 0x00 */
  72. volatile rt_uint32_t base_addr_reg; /* 0x04 */
  73. volatile rt_uint32_t reserved0;
  74. volatile rt_uint32_t nmi_ctrl_reg; /* 0x0C */
  75. volatile rt_uint32_t pend_reg[2]; /* 0x10, 0x14 */
  76. volatile rt_uint32_t reserved1[2];
  77. volatile rt_uint32_t en_reg[2]; /* 0x20, 0x24 */
  78. volatile rt_uint32_t reserved2[2];
  79. volatile rt_uint32_t mask_reg[2]; /* 0x30, 0x34 */
  80. volatile rt_uint32_t reserved3[2];
  81. volatile rt_uint32_t resp_reg[2]; /* 0x40, 0x44 */
  82. volatile rt_uint32_t reserved4[2];
  83. volatile rt_uint32_t ff_reg[2]; /* 0x50, 0x54 */
  84. volatile rt_uint32_t reserved5[2];
  85. volatile rt_uint32_t prio_reg[4]; /* 0x60 - 0x6c */
  86. } ;
  87. typedef struct tina_intc *tina_intc_t;
  88. #define INTC ((tina_intc_t)INTC_BASE_ADDR)
  89. #endif /* __INTERRUPT_H__ */