drv_spi.c 10 KB

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  1. /*
  2. * File : dev_gpio.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2015, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2017-10-20 ZYH the first version
  13. * 2017-11-35 ZYH update to 3.0.0
  14. */
  15. #include <board.h>
  16. #include <drv_spi.h>
  17. #ifdef RT_USING_SPI
  18. #define SPIRXEVENT 0x01
  19. #define SPITXEVENT 0x02
  20. #define SPITIMEOUT 2
  21. #define SPICRCEN 0
  22. struct stm32_hw_spi_cs
  23. {
  24. rt_uint32_t pin;
  25. };
  26. struct stm32_spi
  27. {
  28. SPI_TypeDef *Instance;
  29. struct rt_spi_configuration *cfg;
  30. };
  31. static rt_err_t stm32_spi_init(SPI_TypeDef *spix, struct rt_spi_configuration *cfg)
  32. {
  33. SPI_HandleTypeDef hspi;
  34. hspi.Instance = spix;
  35. if (cfg->mode & RT_SPI_SLAVE)
  36. {
  37. hspi.Init.Mode = SPI_MODE_SLAVE;
  38. }
  39. else
  40. {
  41. hspi.Init.Mode = SPI_MODE_MASTER;
  42. }
  43. if (cfg->mode & RT_SPI_3WIRE)
  44. {
  45. hspi.Init.Direction = SPI_DIRECTION_1LINE;
  46. }
  47. else
  48. {
  49. hspi.Init.Direction = SPI_DIRECTION_2LINES;
  50. }
  51. if (cfg->data_width == 8)
  52. {
  53. hspi.Init.DataSize = SPI_DATASIZE_8BIT;
  54. }
  55. else if (cfg->data_width == 16)
  56. {
  57. hspi.Init.DataSize = SPI_DATASIZE_16BIT;
  58. }
  59. else
  60. {
  61. return RT_EIO;
  62. }
  63. if (cfg->mode & RT_SPI_CPHA)
  64. {
  65. hspi.Init.CLKPhase = SPI_PHASE_2EDGE;
  66. }
  67. else
  68. {
  69. hspi.Init.CLKPhase = SPI_PHASE_1EDGE;
  70. }
  71. if (cfg->mode & RT_SPI_CPOL)
  72. {
  73. hspi.Init.CLKPolarity = SPI_POLARITY_HIGH;
  74. }
  75. else
  76. {
  77. hspi.Init.CLKPolarity = SPI_POLARITY_LOW;
  78. }
  79. if (cfg->mode & RT_SPI_NO_CS)
  80. {
  81. hspi.Init.NSS = SPI_NSS_SOFT;
  82. }
  83. else
  84. {
  85. hspi.Init.NSS = SPI_NSS_SOFT;
  86. // hspi.Init.NSS = SPI_NSS_HARD_OUTPUT;
  87. }
  88. if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 2)
  89. {
  90. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
  91. }
  92. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 4)
  93. {
  94. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
  95. }
  96. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 8)
  97. {
  98. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
  99. }
  100. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 16)
  101. {
  102. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
  103. }
  104. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 32)
  105. {
  106. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
  107. }
  108. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 64)
  109. {
  110. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
  111. }
  112. else if (cfg->max_hz >= HAL_RCC_GetPCLK2Freq() / 128)
  113. {
  114. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
  115. }
  116. else
  117. {
  118. /* min prescaler 256 */
  119. hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
  120. }
  121. if (cfg->mode & RT_SPI_MSB)
  122. {
  123. hspi.Init.FirstBit = SPI_FIRSTBIT_MSB;
  124. }
  125. else
  126. {
  127. hspi.Init.FirstBit = SPI_FIRSTBIT_LSB;
  128. }
  129. hspi.Init.TIMode = SPI_TIMODE_DISABLE;
  130. hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  131. hspi.Init.CRCPolynomial = 7;
  132. hspi.State = HAL_SPI_STATE_RESET;
  133. if (HAL_SPI_Init(&hspi) != HAL_OK)
  134. {
  135. return RT_EIO;
  136. }
  137. __HAL_SPI_ENABLE(&hspi);
  138. return RT_EOK;
  139. }
  140. #define SPISTEP(datalen) (((datalen) == 8) ? 1 : 2)
  141. #define SPISEND_1(reg, ptr, datalen) \
  142. do \
  143. { \
  144. if (datalen == 8) \
  145. { \
  146. (reg) = *(rt_uint8_t *)(ptr); \
  147. } \
  148. else \
  149. { \
  150. (reg) = *(rt_uint16_t *)(ptr); \
  151. } \
  152. } while (0)
  153. #define SPIRECV_1(reg, ptr, datalen) \
  154. do \
  155. { \
  156. if (datalen == 8) \
  157. { \
  158. *(rt_uint8_t *)(ptr) = (reg); \
  159. } \
  160. else \
  161. { \
  162. *(rt_uint16_t *)(ptr) = reg; \
  163. } \
  164. } while (0)
  165. static rt_err_t spitxrx1b(struct stm32_spi *hspi, void *rcvb, const void *sndb)
  166. {
  167. rt_uint32_t padrcv = 0;
  168. rt_uint32_t padsnd = 0xFF;
  169. if (!rcvb && !sndb)
  170. {
  171. return RT_ERROR;
  172. }
  173. if (!rcvb)
  174. {
  175. rcvb = &padrcv;
  176. }
  177. if (!sndb)
  178. {
  179. sndb = &padsnd;
  180. }
  181. while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) == RESET)
  182. ;
  183. SPISEND_1(hspi->Instance->DR, sndb, hspi->cfg->data_width);
  184. while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) == RESET)
  185. ;
  186. SPIRECV_1(hspi->Instance->DR, rcvb, hspi->cfg->data_width);
  187. return RT_EOK;
  188. }
  189. static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  190. {
  191. rt_err_t res;
  192. RT_ASSERT(device != RT_NULL);
  193. RT_ASSERT(device->bus != RT_NULL);
  194. RT_ASSERT(device->bus->parent.user_data != RT_NULL);
  195. struct stm32_spi *hspi = (struct stm32_spi *)device->bus->parent.user_data;
  196. struct stm32_hw_spi_cs *cs = device->parent.user_data;
  197. if (message->cs_take)
  198. {
  199. rt_pin_write(cs->pin, 0);
  200. }
  201. const rt_uint8_t *sndb = message->send_buf;
  202. rt_uint8_t *rcvb = message->recv_buf;
  203. rt_int32_t length = message->length;
  204. while (length)
  205. {
  206. res = spitxrx1b(hspi, rcvb, sndb);
  207. if (rcvb)
  208. {
  209. rcvb += SPISTEP(hspi->cfg->data_width);
  210. }
  211. if (sndb)
  212. {
  213. sndb += SPISTEP(hspi->cfg->data_width);
  214. }
  215. if (res != RT_EOK)
  216. {
  217. break;
  218. }
  219. length--;
  220. }
  221. /* Wait until Busy flag is reset before disabling SPI */
  222. while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) == SET)
  223. ;
  224. if (message->cs_release)
  225. {
  226. rt_pin_write(cs->pin, 1);
  227. }
  228. return message->length - length;
  229. }
  230. rt_err_t spi_configure(struct rt_spi_device *device,
  231. struct rt_spi_configuration *configuration)
  232. {
  233. struct stm32_spi *hspi = (struct stm32_spi *)device->bus->parent.user_data;
  234. hspi->cfg = configuration;
  235. return stm32_spi_init(hspi->Instance, configuration);
  236. }
  237. const struct rt_spi_ops stm_spi_ops =
  238. {
  239. .configure = spi_configure,
  240. .xfer = spixfer,
  241. };
  242. struct rt_spi_bus _spi_bus1, _spi_bus2;
  243. struct stm32_spi _spi1, _spi2;
  244. int stm32_spi_register_bus(SPI_TypeDef *SPIx, const char *name)
  245. {
  246. struct rt_spi_bus *spi_bus;
  247. struct stm32_spi *spi;
  248. if (SPIx == SPI1)
  249. {
  250. spi_bus = &_spi_bus1;
  251. spi = &_spi1;
  252. }
  253. else if (SPIx == SPI2)
  254. {
  255. spi_bus = &_spi_bus2;
  256. spi = &_spi2;
  257. }
  258. else
  259. {
  260. return -1;
  261. }
  262. spi->Instance = SPIx;
  263. spi_bus->parent.user_data = spi;
  264. return rt_spi_bus_register(spi_bus, name, &stm_spi_ops);
  265. }
  266. rt_err_t stm32_spi_bus_attach_device(rt_uint32_t pin, const char *bus_name, const char *device_name)
  267. {
  268. struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  269. RT_ASSERT(spi_device != RT_NULL);
  270. struct stm32_hw_spi_cs *cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
  271. RT_ASSERT(cs_pin != RT_NULL);
  272. cs_pin->pin = pin;
  273. rt_pin_mode(pin, PIN_MODE_OUTPUT);
  274. rt_pin_write(pin, 1);
  275. return rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  276. }
  277. int stm32_hw_spi_init(void)
  278. {
  279. int result = 0;
  280. #ifdef RT_USING_SPI1
  281. result = stm32_spi_register_bus(SPI1, "spi1");
  282. #endif
  283. #ifdef RT_USING_SPI2
  284. result = stm32_spi_register_bus(SPI2, "spi2");
  285. #endif
  286. return result;
  287. }
  288. INIT_BOARD_EXPORT(stm32_hw_spi_init);
  289. void HAL_SPI_MspInit(SPI_HandleTypeDef *spiHandle)
  290. {
  291. GPIO_InitTypeDef GPIO_InitStruct;
  292. if (spiHandle->Instance == SPI1)
  293. {
  294. /* SPI1 clock enable */
  295. __HAL_RCC_SPI1_CLK_ENABLE();
  296. __HAL_RCC_GPIOA_CLK_ENABLE();
  297. /**SPI1 GPIO Configuration
  298. PA5 ------> SPI1_SCK
  299. PA6 ------> SPI1_MISO
  300. PA7 ------> SPI1_MOSI
  301. */
  302. GPIO_InitStruct.Pin = GPIO_PIN_5 | GPIO_PIN_7;
  303. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  304. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  305. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  306. GPIO_InitStruct.Pin = GPIO_PIN_6;
  307. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  308. GPIO_InitStruct.Pull = GPIO_NOPULL;
  309. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  310. }
  311. else if (spiHandle->Instance == SPI2)
  312. {
  313. /* SPI2 clock enable */
  314. __HAL_RCC_SPI2_CLK_ENABLE();
  315. __HAL_RCC_GPIOB_CLK_ENABLE();
  316. /**SPI2 GPIO Configuration
  317. PB13 ------> SPI2_SCK
  318. PB14 ------> SPI2_MISO
  319. PB15 ------> SPI2_MOSI
  320. */
  321. GPIO_InitStruct.Pin = GPIO_PIN_13 | GPIO_PIN_15;
  322. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  323. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  324. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  325. GPIO_InitStruct.Pin = GPIO_PIN_14;
  326. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  327. GPIO_InitStruct.Pull = GPIO_NOPULL;
  328. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  329. }
  330. }
  331. void HAL_SPI_MspDeInit(SPI_HandleTypeDef *spiHandle)
  332. {
  333. if (spiHandle->Instance == SPI1)
  334. {
  335. /* Peripheral clock disable */
  336. __HAL_RCC_SPI1_CLK_DISABLE();
  337. /**SPI1 GPIO Configuration
  338. PA5 ------> SPI1_SCK
  339. PA6 ------> SPI1_MISO
  340. PA7 ------> SPI1_MOSI
  341. */
  342. HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
  343. }
  344. else if (spiHandle->Instance == SPI2)
  345. {
  346. /* Peripheral clock disable */
  347. __HAL_RCC_SPI2_CLK_DISABLE();
  348. /**SPI2 GPIO Configuration
  349. PB13 ------> SPI2_SCK
  350. PB14 ------> SPI2_MISO
  351. PB15 ------> SPI2_MOSI
  352. */
  353. HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15);
  354. }
  355. }
  356. #endif /*RT_USING_SPI*/