hwtimer.c 9.0 KB

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  1. /*
  2. * Copyright (c) 2006-2024 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2015-08-31 heyuanjie87 first version
  9. */
  10. #include <rtdevice.h>
  11. #include <rthw.h>
  12. #define DBG_TAG "hwtimer"
  13. #define DBG_LVL DBG_INFO
  14. #include <rtdbg.h>
  15. #ifdef RT_USING_DM
  16. void (*rt_device_hwtimer_us_delay)(rt_uint32_t us) = RT_NULL;
  17. void rt_hw_us_delay(rt_uint32_t us)
  18. {
  19. if (rt_device_hwtimer_us_delay)
  20. {
  21. rt_device_hwtimer_us_delay(us);
  22. }
  23. else
  24. {
  25. LOG_E("Implemented at least in the libcpu");
  26. RT_ASSERT(0);
  27. }
  28. }
  29. #endif /* RT_USING_DM */
  30. rt_inline rt_uint32_t timeout_calc(rt_hwtimer_t *timer, rt_hwtimerval_t *tv)
  31. {
  32. float overflow;
  33. float timeout;
  34. rt_uint32_t counter;
  35. int i, index = 0;
  36. float tv_sec;
  37. float devi_min = 1;
  38. float devi;
  39. /* changed to second */
  40. overflow = timer->info->maxcnt/(float)timer->freq;
  41. tv_sec = tv->sec + tv->usec/(float)1000000;
  42. if (tv_sec < (1/(float)timer->freq))
  43. {
  44. /* little timeout */
  45. i = 0;
  46. timeout = 1/(float)timer->freq;
  47. }
  48. else
  49. {
  50. for (i = 1; i > 0; i ++)
  51. {
  52. timeout = tv_sec/i;
  53. if (timeout <= overflow)
  54. {
  55. counter = (rt_uint32_t)(timeout * timer->freq);
  56. devi = tv_sec - (counter / (float)timer->freq) * i;
  57. /* Minimum calculation error */
  58. if (devi > devi_min)
  59. {
  60. i = index;
  61. timeout = tv_sec/i;
  62. break;
  63. }
  64. else if (devi == 0)
  65. {
  66. break;
  67. }
  68. else if (devi < devi_min)
  69. {
  70. devi_min = devi;
  71. index = i;
  72. }
  73. }
  74. }
  75. }
  76. timer->cycles = i;
  77. timer->reload = i;
  78. timer->period_sec = timeout;
  79. counter = (rt_uint32_t)(timeout * timer->freq);
  80. return counter;
  81. }
  82. static rt_err_t rt_hwtimer_init(struct rt_device *dev)
  83. {
  84. rt_err_t result = RT_EOK;
  85. rt_hwtimer_t *timer;
  86. timer = (rt_hwtimer_t *)dev;
  87. /* try to change to 1MHz */
  88. if ((1000000 <= timer->info->maxfreq) && (1000000 >= timer->info->minfreq))
  89. {
  90. timer->freq = 1000000;
  91. }
  92. else
  93. {
  94. timer->freq = timer->info->minfreq;
  95. }
  96. timer->mode = HWTIMER_MODE_ONESHOT;
  97. timer->cycles = 0;
  98. timer->overflow = 0;
  99. if (timer->ops->init)
  100. {
  101. timer->ops->init(timer, 1);
  102. }
  103. else
  104. {
  105. result = -RT_ENOSYS;
  106. }
  107. return result;
  108. }
  109. static rt_err_t rt_hwtimer_open(struct rt_device *dev, rt_uint16_t oflag)
  110. {
  111. rt_err_t result = RT_EOK;
  112. rt_hwtimer_t *timer;
  113. timer = (rt_hwtimer_t *)dev;
  114. if (timer->ops->control != RT_NULL)
  115. {
  116. timer->ops->control(timer, HWTIMER_CTRL_FREQ_SET, &timer->freq);
  117. }
  118. else
  119. {
  120. result = -RT_ENOSYS;
  121. }
  122. return result;
  123. }
  124. static rt_err_t rt_hwtimer_close(struct rt_device *dev)
  125. {
  126. rt_err_t result = RT_EOK;
  127. rt_hwtimer_t *timer;
  128. timer = (rt_hwtimer_t*)dev;
  129. if (timer->ops->init != RT_NULL)
  130. {
  131. timer->ops->init(timer, 0);
  132. }
  133. else
  134. {
  135. result = -RT_ENOSYS;
  136. }
  137. dev->flag &= ~RT_DEVICE_FLAG_ACTIVATED;
  138. dev->rx_indicate = RT_NULL;
  139. return result;
  140. }
  141. static rt_ssize_t rt_hwtimer_read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size)
  142. {
  143. rt_hwtimer_t *timer;
  144. rt_hwtimerval_t tv;
  145. rt_uint32_t cnt;
  146. rt_base_t level;
  147. rt_int32_t overflow;
  148. float t;
  149. timer = (rt_hwtimer_t *)dev;
  150. if (timer->ops->count_get == RT_NULL)
  151. return 0;
  152. level = rt_hw_interrupt_disable();
  153. cnt = timer->ops->count_get(timer);
  154. overflow = timer->overflow;
  155. rt_hw_interrupt_enable(level);
  156. if (timer->info->cntmode == HWTIMER_CNTMODE_DW)
  157. {
  158. cnt = (rt_uint32_t)(timer->freq * timer->period_sec) - cnt;
  159. }
  160. if (timer->mode == HWTIMER_MODE_ONESHOT)
  161. {
  162. overflow = 0;
  163. }
  164. t = overflow * timer->period_sec + cnt/(float)timer->freq;
  165. tv.sec = (rt_int32_t)t;
  166. tv.usec = (rt_int32_t)((t - tv.sec) * 1000000);
  167. size = size > sizeof(tv)? sizeof(tv) : size;
  168. rt_memcpy(buffer, &tv, size);
  169. return size;
  170. }
  171. static rt_ssize_t rt_hwtimer_write(struct rt_device *dev, rt_off_t pos, const void *buffer, rt_size_t size)
  172. {
  173. rt_base_t level;
  174. rt_uint32_t t;
  175. rt_hwtimer_mode_t opm = HWTIMER_MODE_PERIOD;
  176. rt_hwtimer_t *timer;
  177. timer = (rt_hwtimer_t *)dev;
  178. if ((timer->ops->start == RT_NULL) || (timer->ops->stop == RT_NULL))
  179. return 0;
  180. if (size != sizeof(rt_hwtimerval_t))
  181. return 0;
  182. timer->ops->stop(timer);
  183. level = rt_hw_interrupt_disable();
  184. timer->overflow = 0;
  185. rt_hw_interrupt_enable(level);
  186. t = timeout_calc(timer, (rt_hwtimerval_t*)buffer);
  187. if ((timer->cycles <= 1) && (timer->mode == HWTIMER_MODE_ONESHOT))
  188. {
  189. opm = HWTIMER_MODE_ONESHOT;
  190. }
  191. if (timer->ops->start(timer, t, opm) != RT_EOK)
  192. size = 0;
  193. return size;
  194. }
  195. static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args)
  196. {
  197. rt_base_t level;
  198. rt_err_t result = RT_EOK;
  199. rt_hwtimer_t *timer;
  200. timer = (rt_hwtimer_t *)dev;
  201. switch (cmd)
  202. {
  203. case HWTIMER_CTRL_STOP:
  204. {
  205. if (timer->ops->stop != RT_NULL)
  206. {
  207. timer->ops->stop(timer);
  208. }
  209. else
  210. {
  211. result = -RT_ENOSYS;
  212. }
  213. }
  214. break;
  215. case HWTIMER_CTRL_FREQ_SET:
  216. {
  217. rt_int32_t *f;
  218. if (args == RT_NULL)
  219. {
  220. result = -RT_EEMPTY;
  221. break;
  222. }
  223. f = (rt_int32_t*)args;
  224. if ((*f > timer->info->maxfreq) || (*f < timer->info->minfreq))
  225. {
  226. LOG_W("frequency setting out of range! It will maintain at %d Hz", timer->freq);
  227. result = -RT_EINVAL;
  228. break;
  229. }
  230. if (timer->ops->control != RT_NULL)
  231. {
  232. result = timer->ops->control(timer, cmd, args);
  233. if (result == RT_EOK)
  234. {
  235. level = rt_hw_interrupt_disable();
  236. timer->freq = *f;
  237. rt_hw_interrupt_enable(level);
  238. }
  239. }
  240. else
  241. {
  242. result = -RT_ENOSYS;
  243. }
  244. }
  245. break;
  246. case HWTIMER_CTRL_INFO_GET:
  247. {
  248. if (args == RT_NULL)
  249. {
  250. result = -RT_EEMPTY;
  251. break;
  252. }
  253. *((struct rt_hwtimer_info*)args) = *timer->info;
  254. }
  255. break;
  256. case HWTIMER_CTRL_MODE_SET:
  257. {
  258. rt_hwtimer_mode_t *m;
  259. if (args == RT_NULL)
  260. {
  261. result = -RT_EEMPTY;
  262. break;
  263. }
  264. m = (rt_hwtimer_mode_t*)args;
  265. if ((*m != HWTIMER_MODE_ONESHOT) && (*m != HWTIMER_MODE_PERIOD))
  266. {
  267. result = -RT_ERROR;
  268. break;
  269. }
  270. level = rt_hw_interrupt_disable();
  271. timer->mode = *m;
  272. rt_hw_interrupt_enable(level);
  273. }
  274. break;
  275. default:
  276. {
  277. if (timer->ops->control != RT_NULL)
  278. {
  279. result = timer->ops->control(timer, cmd, args);
  280. }
  281. else
  282. {
  283. result = -RT_ENOSYS;
  284. }
  285. }
  286. break;
  287. }
  288. return result;
  289. }
  290. void rt_device_hwtimer_isr(rt_hwtimer_t *timer)
  291. {
  292. rt_base_t level;
  293. RT_ASSERT(timer != RT_NULL);
  294. level = rt_hw_interrupt_disable();
  295. timer->overflow ++;
  296. if (timer->cycles != 0)
  297. {
  298. timer->cycles --;
  299. }
  300. if (timer->cycles == 0)
  301. {
  302. timer->cycles = timer->reload;
  303. rt_hw_interrupt_enable(level);
  304. if (timer->mode == HWTIMER_MODE_ONESHOT)
  305. {
  306. if (timer->ops->stop != RT_NULL)
  307. {
  308. timer->ops->stop(timer);
  309. }
  310. }
  311. if (timer->parent.rx_indicate != RT_NULL)
  312. {
  313. timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_hwtimerval));
  314. }
  315. }
  316. else
  317. {
  318. rt_hw_interrupt_enable(level);
  319. }
  320. }
  321. #ifdef RT_USING_DEVICE_OPS
  322. const static struct rt_device_ops hwtimer_ops =
  323. {
  324. rt_hwtimer_init,
  325. rt_hwtimer_open,
  326. rt_hwtimer_close,
  327. rt_hwtimer_read,
  328. rt_hwtimer_write,
  329. rt_hwtimer_control
  330. };
  331. #endif
  332. rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data)
  333. {
  334. struct rt_device *device;
  335. RT_ASSERT(timer != RT_NULL);
  336. RT_ASSERT(timer->ops != RT_NULL);
  337. RT_ASSERT(timer->info != RT_NULL);
  338. device = &(timer->parent);
  339. device->type = RT_Device_Class_Timer;
  340. device->rx_indicate = RT_NULL;
  341. device->tx_complete = RT_NULL;
  342. #ifdef RT_USING_DEVICE_OPS
  343. device->ops = &hwtimer_ops;
  344. #else
  345. device->init = rt_hwtimer_init;
  346. device->open = rt_hwtimer_open;
  347. device->close = rt_hwtimer_close;
  348. device->read = rt_hwtimer_read;
  349. device->write = rt_hwtimer_write;
  350. device->control = rt_hwtimer_control;
  351. #endif
  352. device->user_data = user_data;
  353. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
  354. }