nand.h 2.5 KB

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  1. //
  2. // Copyright (c) Microsoft Corporation. All rights reserved.
  3. //
  4. //
  5. // Use of this source code is subject to the terms of the Microsoft end-user
  6. // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
  7. // If you did not accept the terms of the EULA, you are not authorized to use
  8. // this source code. For a copy of the EULA, please see the LICENSE.RTF on your
  9. // install media.
  10. //
  11. /*++
  12. THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
  13. ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
  14. THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
  15. PARTICULAR PURPOSE.
  16. --*/
  17. #ifndef __NAND_H__
  18. #define __NAND_H__
  19. #include <s3c24x0.h>
  20. #include <uffs/uffs_types.h>
  21. /* define low accessing value */
  22. #define TOTAL_BLOCKS 2048 /* total block of whole chip */
  23. #define PAGE_DATA_SIZE 2048 /* max size of page data */
  24. #define PAGE_SPARE_SIZE 64 /* max size of extended partition */
  25. #define PAGES_PER_BLOCK 64 /* max pages per block' */
  26. #define PAGE_SIZE (PAGE_DATA_SIZE+PAGE_SPARE_SIZE)/* max size per whole page */
  27. #define BLOCK_DATA_SIZE (PAGE_DATA_SIZE*PAGES_PER_BLOCK)/* max size per block' */
  28. //bad flags offset in the oob area.
  29. #define NAND_SMALL_BADBLOCK_POS 5 //small page FLASH
  30. #define NAND_LARGE_BADBLOCK_POS 0 //large page FLASH
  31. /* Option constants for bizarre disfunctionality and real
  32. * features
  33. */
  34. /* Chip can not auto increment pages */
  35. #define NAND_NO_AUTOINCR 0x00000001
  36. /* Buswitdh is 16 bit */
  37. #define NAND_BUSWIDTH_16 0x00000002
  38. /* Device supports partial programming without padding */
  39. #define NAND_NO_PADDING 0x00000004
  40. /* Chip has cache program function */
  41. #define NAND_CACHEPRG 0x00000008
  42. /* Chip has copy back function */
  43. #define NAND_COPYBACK 0x00000010
  44. /* AND Chip which has 4 banks and a confusing page / block
  45. * assignment. See Renesas datasheet for further information */
  46. #define NAND_IS_AND 0x00000020
  47. /* Chip has a array of 4 pages which can be read without
  48. * additional ready /busy waits */
  49. #define NAND_4PAGE_ARRAY 0x00000040
  50. /* Options valid for Samsung large page devices */
  51. #define NAND_SAMSUNG_LP_OPTIONS \
  52. (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
  53. struct nand_flash_dev
  54. {
  55. char *name; //chip name
  56. int id; //chip ID
  57. unsigned long pagesize; //max pages
  58. unsigned long chipsize; //size of whole chip iMB
  59. unsigned long blocksize;//size of block
  60. unsigned long options; //option
  61. };
  62. struct nand_manufacturers
  63. {
  64. int id;
  65. char * name;
  66. };
  67. #endif /*__NAND_H__*/