startup_gcc.S 6.2 KB

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  1. /*
  2. * File : startup.S
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2017-01-01 Urey first version
  23. */
  24. #undef VIC_TSPR
  25. #define VIC_TSPR 0xE000EC10
  26. #ifndef CONFIG_SEPARATE_IRQ_SP
  27. #define CONFIG_SEPARATE_IRQ_SP 1
  28. #endif
  29. #ifndef CONFIG_ARCH_INTERRUPTSTACK
  30. #define CONFIG_ARCH_INTERRUPTSTACK 1024
  31. #endif
  32. .import SysTick_Handler
  33. .import PendSV_Handler
  34. .section .vectors
  35. .align 10
  36. .globl __Vectors
  37. .type __Vectors, @object
  38. __Vectors:
  39. .long Reset_Handler /* 0: Reset Handler */
  40. .rept 15
  41. .long Default_Handler /* 60 0x40 */
  42. .endr /* 64 0x40 */
  43. .long Default_Handler /* 64 0x44 */
  44. .rept 5
  45. .long Default_Handler /* 88 0x58 */
  46. .endr /* 92 0x5C */
  47. .long PendSV_Handler /* 92 0x5C */
  48. .rept 9
  49. .long Default_Handler /* 128 0x80 */
  50. .endr
  51. /* External interrupts */
  52. .long GPIOA_IRQHandler /* 32# 0: GPIOA */ /*128 0x80 */
  53. .long SysTick_Handler /* 1: System Tick */
  54. .long TIMA0_IRQHandler /* 2: TimerA0 */
  55. .long TIMA1_IRQHandler /* 3: TimerA1 */
  56. .long Default_Handler
  57. .long WDT_IRQHandler /* 5: WDT */
  58. .long USART0_IRQHandler /* 6: UART0 */
  59. .long USART1_IRQHandler /* 0x27 39 7: UART1 */
  60. .long USART2_IRQHandler /* 8: UART2 */
  61. .long I2C0_IRQHandler /* 9: I2C0 */
  62. .long I2C1_IRQHandler /* 10: I2C1 */
  63. .long SPI1_IRQHandler /* 11: SPI1 */
  64. .long SPI0_IRQHandler /* 12: SPI0 */
  65. .long RTC_IRQHandler /* 13: RTC */
  66. .long Default_Handler
  67. .long Default_Handler
  68. .long Default_Handler
  69. .long DMAC_IRQHandler /* 17: DMAC */
  70. .long Default_Handler
  71. .long PWM_IRQHandler /* 19: PWM */
  72. .long Default_Handler
  73. .long USART3_IRQHandler /* 21: UART3 */
  74. .long Default_Handler
  75. .long TIMB0_IRQHandler /* 23: TimerB0 */
  76. .long TIMB1_IRQHandler /* 24: TimerB1 */
  77. .long Default_Handler
  78. .long AES_IRQHandler /* 26: AES */
  79. .long GPIOB_IRQHandler /* 27: GPIOB */
  80. .long Default_Handler
  81. .long SHA_IRQHandler /* 29: SHA */
  82. .size __Vectors, . - __Vectors
  83. .text
  84. .align 1
  85. _start:
  86. .text
  87. .align 1
  88. .globl Reset_Handler
  89. .type Reset_Handler, %function
  90. Reset_Handler:
  91. /* under normal circumstances, it should not be opened */
  92. #ifndef CONFIG_SYSTEM_SECURE
  93. lrw r0, 0x80000000
  94. mtcr r0, psr
  95. #endif
  96. /* Initialize the normal stack pointer from the linker definition. */
  97. lrw a1, __StackTop
  98. mov sp, a1
  99. /*
  100. * The ranges of copy from/to are specified by following symbols
  101. * __etext: LMA of start of the section to copy from. Usually end of text
  102. * __data_start__: VMA of start of the section to copy to
  103. * __data_end__: VMA of end of the section to copy to
  104. *
  105. * All addresses must be aligned to 4 bytes boundary.
  106. */
  107. lrw r1, __erodata
  108. lrw r2, __data_start__
  109. lrw r3, __data_end__
  110. subu r3, r2
  111. cmpnei r3, 0
  112. bf .L_loop0_done
  113. .L_loop0:
  114. ldw r0, (r1, 0)
  115. stw r0, (r2, 0)
  116. addi r1, 4
  117. addi r2, 4
  118. subi r3, 4
  119. cmpnei r3, 0
  120. bt .L_loop0
  121. .L_loop0_done:
  122. /*
  123. * The BSS section is specified by following symbols
  124. * __bss_start__: start of the BSS section.
  125. * __bss_end__: end of the BSS section.
  126. *
  127. * Both addresses must be aligned to 4 bytes boundary.
  128. */
  129. lrw r1, __bss_start__
  130. lrw r2, __bss_end__
  131. movi r0, 0
  132. subu r2, r1
  133. cmpnei r2, 0
  134. bf .L_loop1_done
  135. .L_loop1:
  136. stw r0, (r1, 0)
  137. addi r1, 4
  138. subi r2, 4
  139. cmpnei r2, 0
  140. bt .L_loop1
  141. .L_loop1_done:
  142. #ifdef CONFIG_SEPARATE_IRQ_SP
  143. lrw r0, g_top_irqstack
  144. mtcr r0, cr<15, 1>
  145. mfcr r0, cr<31, 0>
  146. bseti r0, 14
  147. mtcr r0, cr<31, 0>
  148. #endif
  149. #ifndef __NO_SYSTEM_INIT
  150. bsr SystemInit
  151. #endif
  152. //#ifndef __NO_BOARD_INIT
  153. // bsr board_init
  154. //#endif
  155. //VIC init...
  156. lrw r0, VIC_TSPR
  157. movi r1, 0xb00
  158. stw r1, (r0)
  159. bsr entry
  160. __exit:
  161. bkpt
  162. .size Reset_Handler, . - Reset_Handler
  163. .align 1
  164. .weak Default_Handler
  165. .type Default_Handler, %function
  166. Default_Handler:
  167. br Default_Handler
  168. .size Default_Handler, . - Default_Handler
  169. .section .bss
  170. .align 2
  171. .globl g_intstackalloc
  172. .global g_intstackbase
  173. .global g_top_irqstack
  174. g_intstackalloc:
  175. g_intstackbase:
  176. .space CONFIG_ARCH_INTERRUPTSTACK
  177. g_top_irqstack:
  178. /* Macro to define default handlers. Default handler
  179. * will be weak symbol and just dead loops. They can be
  180. * overwritten by other handlers */
  181. .macro def_irq_handler handler_name
  182. .weak \handler_name
  183. .set \handler_name, Default_Handler
  184. .endm
  185. def_irq_handler CORET_IRQHandler
  186. def_irq_handler TIMA0_IRQHandler
  187. def_irq_handler TIMA1_IRQHandler
  188. def_irq_handler TIMB0_IRQHandler
  189. def_irq_handler TIMB1_IRQHandler
  190. def_irq_handler USART0_IRQHandler
  191. def_irq_handler USART1_IRQHandler
  192. def_irq_handler USART2_IRQHandler
  193. def_irq_handler USART3_IRQHandler
  194. def_irq_handler GPIOA_IRQHandler
  195. def_irq_handler GPIOB_IRQHandler
  196. def_irq_handler I2C0_IRQHandler
  197. def_irq_handler I2C1_IRQHandler
  198. def_irq_handler SPI0_IRQHandler
  199. def_irq_handler SPI1_IRQHandler
  200. def_irq_handler RTC_IRQHandler
  201. def_irq_handler WDT_IRQHandler
  202. def_irq_handler PWM_IRQHandler
  203. def_irq_handler DMAC_IRQHandler
  204. def_irq_handler AES_IRQHandler
  205. def_irq_handler SHA_IRQHandler
  206. .end