fh_uart.h 6.7 KB

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  1. /*
  2. * This file is part of FH8620 BSP for RT-Thread distribution.
  3. *
  4. * Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
  5. * All rights reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20. *
  21. * Visit http://www.fullhan.com to get contact with Fullhan.
  22. *
  23. * Change Logs:
  24. * Date Author Notes
  25. */
  26. #ifndef FH_UART_H_
  27. #define FH_UART_H_
  28. /****************************************************************************
  29. * #include section
  30. * add #include here if any
  31. ***************************************************************************/
  32. #include "fh_def.h"
  33. /****************************************************************************
  34. * #define section
  35. * add constant #define here if any
  36. ***************************************************************************/
  37. #define UART_RBR RBRTHRDLL
  38. #define UART_THR RBRTHRDLL
  39. #define UART_DLL RBRTHRDLL
  40. #define UART_DLH DLHIER
  41. #define UART_IER DLHIER
  42. #define UART_IIR IIRFCR
  43. #define UART_FCR IIRFCR
  44. /* LSR register bits */
  45. #define UART_LSR_DR (1 << 0)
  46. #define UART_LSR_OE (1 << 1)
  47. #define UART_LSR_PE (1 << 2)
  48. #define UART_LSR_FE (1 << 3)
  49. #define UART_LSR_BI (1 << 4)
  50. #define UART_LSR_THER (1 << 5)
  51. #define UART_LST_TEMT (1 << 6)
  52. #define UART_LSR_RFE (1 << 7)
  53. /* LCR register bits */
  54. #define UART_LCR_DLS5 0x00
  55. #define UART_LCR_DLS6 0x01
  56. #define UART_LCR_DLS7 0x02
  57. #define UART_LCR_DLS8 0x03
  58. #define UART_LCR_STOP1 0
  59. #define UART_LCR_STOP2 (1 << 2)
  60. #define UART_LCR_PEN (1 << 3)
  61. #define UART_LCR_EVEN (1 << 4)
  62. #define UART_LCR_SP (1 << 5)
  63. #define UART_LCR_BC (1 << 6)
  64. #define UART_LCR_DLAB (1 << 7)
  65. /* MCR register bits */
  66. #define UART_MCR_DTR (1 << 0)
  67. #define UART_MCR_RTS (1 << 1)
  68. #define UART_MCR_OUT1 (1 << 2)
  69. #define UART_MCR_OUT2 (1 << 3)
  70. #define UART_MCR_LB (1 << 4)
  71. #define UART_MCR_AFCE (1 << 5)
  72. #define UART_MCR_SIRE (1 << 6)
  73. /* FCR register bits */
  74. #define UART_FCR_FIFOE (1 << 0)
  75. #define UART_FCR_RFIFOR (1 << 1)
  76. #define UART_FCR_XFIFOR (1 << 2)
  77. #define UART_FCR_DMAM (1 << 3)
  78. #define UART_FCR_TET_EMPTY (0x00 << 4)
  79. #define UART_FCR_TET_TWO (0x01 << 4)
  80. #define UART_FCR_TET_1_4 (0x02 << 4)
  81. #define UART_FCR_TET_1_2 (0x03 << 4)
  82. #define UART_FCR_RT_ONE (0x00 << 6)
  83. #define UART_FCR_RT_1_4 (0x01 << 6)
  84. #define UART_FCR_RT_1_2 (0x02 << 6)
  85. #define UART_FCR_RT_L2 (0x03 << 6)
  86. /* IER register bits */
  87. #define UART_IER_ERBFI (1 << 0)
  88. #define UART_IER_ETBEI (1 << 1)
  89. #define UART_IER_ELSI (1 << 2)
  90. #define UART_IER_EDSSI (1 << 3)
  91. #define UART_IER_PTIME (1 << 7)
  92. /* USR register bits */
  93. #define UART_USR_BUSY (1 << 0)
  94. #define UART_USR_TFNF (1 << 1)
  95. #define UART_USR_TFE (1 << 2)
  96. #define UART_USR_RNFE (1 << 3)
  97. #define UART_USR_RFE (1 << 4)
  98. /* IIR register bits */
  99. #define UART_IIR_RIID_MASK 0x0f
  100. #define UART_IIR_MODEM 0x00
  101. #define UART_IIR_NOINT 0x01
  102. #define UART_IIR_THREMPTY 0x02
  103. #define UART_IIR_RDATD 0x04
  104. #define UART_IIR_RLINEST 0x06
  105. #define UART_IIR_BUSY 0x07
  106. #define UART_IIR_CHRTOUT 0x0c
  107. #define UART_IIR_FIFOSE (0x03 << 6)
  108. //uart baudrate cofig
  109. //#define UART_CLOCK_FREQ (27000000) //27MHZ
  110. //
  111. //#define DIV(n) (((UART_CLOCK_FREQ/(n))+8)/16)
  112. /****************************************************************************
  113. * ADT section
  114. * add Abstract Data Type definition here
  115. ***************************************************************************/
  116. typedef struct {
  117. RwReg RBRTHRDLL; /* UART_RBR, UART_THR, UART_DLL */
  118. RwReg DLHIER; /* UART_DLH, UART_IER */
  119. RwReg IIRFCR; /* UART_IIR, UART_FCR */
  120. RwReg UART_LCR; /*(0x000c) */
  121. RwReg UART_MCR; /*(0x0010) */
  122. RwReg UART_LSR; /*(0x0014) */
  123. RwReg UART_MSR; /*(0x0018) */
  124. RwReg UART_SCR; /*(0x001c) */
  125. RwReg reserved[20];
  126. RwReg UART_FAR; /* (0x0070) */
  127. RwReg UART_TFR; /* (0x0074) */
  128. RwReg UART_RFW; /* (0x0078) */
  129. RwReg UART_USR; /* (0x007c) */
  130. RwReg UART_TFL; /* (0x0080) */
  131. RwReg UART_RFL; /* (0x0084) */
  132. RwReg UART_SRR; /* (0x0088) */
  133. RwReg reserved1[3];
  134. RwReg UART_SFE; /* (0x0098) */
  135. RwReg UART_SRT; /* (0x009c) */
  136. RwReg UART_STET; /* (0x00a0) */
  137. RwReg UART_HTX; /* (0x00a4) */
  138. RwReg UART_DMASA; /* (0x00a8) */
  139. RwReg reserved2[18];
  140. RwReg UART_CPR; /* (0x00f4) */
  141. RwReg UART_UCV; /* (0x00f8) */
  142. RwReg UART_CTR; /* (0x00fc) */
  143. }uart;
  144. struct fh_uart {
  145. uart *uart_port;
  146. int irq;
  147. };
  148. enum data_bits {
  149. UART_DATA_BIT5 = 0,
  150. UART_DATA_BIT6 = 1,
  151. UART_DATA_BIT7 = 2,
  152. UART_DATA_BIT8 = 3
  153. };
  154. enum stop_bits {
  155. UART_STOP_BIT1 = 0,
  156. UART_STOP_BIT1_5 = 1,
  157. UART_STOP_BIT2 = 2
  158. };
  159. enum parity {
  160. UART_PARITY_NONE = 0,
  161. UART_PARITY_EVEN = 1,
  162. UART_PARITY_ODD = 2,
  163. UART_PARITY_ST = 3 /* Stick Parity */
  164. };
  165. #define UART_CLOCK_FREQ (30000000) //30MHZ
  166. typedef enum enum_uart_baudrate{
  167. BAUDRATE_9600 = (((UART_CLOCK_FREQ/9600)+8)/16),
  168. BAUDRATE_19200 = (((UART_CLOCK_FREQ/19200)+8)/16),
  169. BAUDRATE_38400 = (((UART_CLOCK_FREQ/38400)+8)/16),
  170. BAUDRATE_57600 = (((UART_CLOCK_FREQ/57600)+8)/16),
  171. BAUDRATE_115200 = (((UART_CLOCK_FREQ/115200)+8)/16),
  172. BAUDRATE_194000 = (((UART_CLOCK_FREQ/194000)+8)/16),
  173. }uart_baudrate_e;
  174. /****************************************************************************
  175. * extern variable declaration section
  176. ***************************************************************************/
  177. extern int uart_init(uart *port);
  178. extern UINT32 uart_get_status(uart *port);
  179. extern void uart_configure(uart *port, enum data_bits data_bit,
  180. enum stop_bits stop_bit, enum parity parity,
  181. UINT32 buard_rate, UINT32 uart_clk);
  182. extern int uart_enable_irq(uart *port, UINT32 mode);
  183. extern int uart_disable_irq(uart *port, UINT32 mode);
  184. extern UINT32 uart_get_iir_status(uart *port);
  185. extern UINT32 uart_get_line_status(uart *port);
  186. extern UINT32 uart_is_rx_ready(uart *port);
  187. extern UINT8 uart_getc(uart *port);
  188. extern void uart_putc(uart *port, UINT8 c);
  189. extern void uart_set_fifo_mode(uart *port, UINT32 fifo_mode);
  190. /****************************************************************************
  191. * section
  192. * add function prototype here if any
  193. ***************************************************************************/
  194. #endif /* #ifndef _TIMER_ */