gd32f30x_wwdgt.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122
  1. /*!
  2. \file gd32f30x_wwdgt.c
  3. \brief WWDGT driver
  4. */
  5. /*
  6. Copyright (C) 2017 GigaDevice
  7. 2017-02-10, V1.0.0, firmware for GD32F30x
  8. */
  9. #include "gd32f30x_wwdgt.h"
  10. /* write value to WWDGT_CTL_CNT bit field */
  11. #define CTL_CNT(regval) (BITS(0,6) & ((uint32_t)(regval) << 0))
  12. /* write value to WWDGT_CFG_WIN bit field */
  13. #define CFG_WIN(regval) (BITS(0,6) & ((uint32_t)(regval) << 0))
  14. /*!
  15. \brief reset the window watchdog timer configuration
  16. \param[in] none
  17. \param[out] none
  18. \retval none
  19. */
  20. void wwdgt_deinit(void)
  21. {
  22. rcu_periph_reset_enable(RCU_WWDGTRST);
  23. rcu_periph_reset_disable(RCU_WWDGTRST);
  24. }
  25. /*!
  26. \brief configure the window watchdog timer counter value
  27. \param[in] counter_value: 0x00 - 0x7F
  28. \param[out] none
  29. \retval none
  30. */
  31. void wwdgt_counter_update(uint16_t counter_value)
  32. {
  33. uint32_t reg = 0U;
  34. reg = (WWDGT_CTL & (~WWDGT_CTL_CNT));
  35. reg |= CTL_CNT(counter_value);
  36. WWDGT_CTL = reg;
  37. }
  38. /*!
  39. \brief start the window watchdog timer counter
  40. \param[in] none
  41. \param[out] none
  42. \retval none
  43. */
  44. void wwdgt_enable(void)
  45. {
  46. WWDGT_CTL |= WWDGT_CTL_WDGTEN;
  47. }
  48. /*!
  49. \brief configure counter value, window value, and prescaler divider value
  50. \param[in] counter: 0x00 - 0x7F
  51. \param[in] window: 0x00 - 0x7F
  52. \param[in] prescaler: wwdgt prescaler value
  53. \arg WWDGT_CFG_PSC_DIV1: the time base of window watchdog counter = (PCLK1/4096)/1
  54. \arg WWDGT_CFG_PSC_DIV2: the time base of window watchdog counter = (PCLK1/4096)/2
  55. \arg WWDGT_CFG_PSC_DIV4: the time base of window watchdog counter = (PCLK1/4096)/4
  56. \arg WWDGT_CFG_PSC_DIV8: the time base of window watchdog counter = (PCLK1/4096)/8
  57. \param[out] none
  58. \retval none
  59. */
  60. void wwdgt_config(uint16_t counter, uint16_t window, uint32_t prescaler)
  61. {
  62. uint32_t reg_cfg = 0U, reg_ctl = 0U;
  63. /* clear WIN and PSC bits, clear CNT bit */
  64. reg_cfg = (WWDGT_CFG &(~(WWDGT_CFG_WIN|WWDGT_CFG_PSC)));
  65. reg_ctl = (WWDGT_CTL &(~WWDGT_CTL_CNT));
  66. /* configure WIN and PSC bits, configure CNT bit */
  67. reg_cfg |= CFG_WIN(window);
  68. reg_cfg |= prescaler;
  69. reg_ctl |= CTL_CNT(counter);
  70. WWDGT_CTL = reg_ctl;
  71. WWDGT_CFG = reg_cfg;
  72. }
  73. /*!
  74. \brief enable early wakeup interrupt of WWDGT
  75. \param[in] none
  76. \param[out] none
  77. \retval none
  78. */
  79. void wwdgt_interrupt_enable(void)
  80. {
  81. WWDGT_CFG |= WWDGT_CFG_EWIE;
  82. }
  83. /*!
  84. \brief check early wakeup interrupt state of WWDGT
  85. \param[in] none
  86. \param[out] none
  87. \retval FlagStatus: SET or RESET
  88. */
  89. FlagStatus wwdgt_flag_get(void)
  90. {
  91. if(WWDGT_STAT & WWDGT_STAT_EWIF){
  92. return SET;
  93. }
  94. return RESET;
  95. }
  96. /*!
  97. \brief clear early wakeup interrupt state of WWDGT
  98. \param[in] none
  99. \param[out] none
  100. \retval none
  101. */
  102. void wwdgt_flag_clear(void)
  103. {
  104. WWDGT_STAT &= (~WWDGT_STAT_EWIF);
  105. }