Home Explore Help
Register Sign In
lqb
/
rt-thread
mirror of https://gitee.com/rtthread/rt-thread.git
1
0
Fork 0
Files Issues 0 Wiki
Tree: a8d27156a3
Branches Tags
rt-thread
/
bsp
/
gd32450z-eval
/
Libraries
/
GD32F4xx_standard_peripheral
/
Include
/
gd32f4xx_syscfg.h

gd32f4xx_syscfg.h 9.2 KB
History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158 
  1. /*!
    2. 

  2.     \file  gd32f4xx_syscfg.h
    3. 

  3.     \brief definitions for the SYSCFG
    4. 

  4. */
    5. 

  5. 

  6. /*
    7. 

  7.     Copyright (C) 2016 GigaDevice
    8. 

  8. 

  9.     2016-08-15, V1.0.0, firmware for GD32F4xx
    10. 

  10. */
    11. 

  11. 

  12. #ifndef GD32F4XX_SYSCFG_H
    13. 

  13. #define GD32F4XX_SYSCFG_H
    14. 

  14. 

  15. #include "gd32f4xx.h"
    16. 

  16. 

  17. /* SYSCFG definitions */
    18. 

  18. #define SYSCFG                              SYSCFG_BASE
    19. 

  19. 

  20. /* registers definitions */
    21. 

  21. #define SYSCFG_CFG0                         REG32(SYSCFG + 0x00U)    /*!< system configuration register 0 */
    22. 

  22. #define SYSCFG_CFG1                         REG32(SYSCFG + 0x04U)    /*!< system configuration register 1 */
    23. 

  23. #define SYSCFG_EXTISS0                      REG32(SYSCFG + 0x08U)    /*!< EXTI sources selection register 0 */
    24. 

  24. #define SYSCFG_EXTISS1                      REG32(SYSCFG + 0x0CU)    /*!< EXTI sources selection register 1 */
    25. 

  25. #define SYSCFG_EXTISS2                      REG32(SYSCFG + 0x10U)    /*!< EXTI sources selection register 2 */
    26. 

  26. #define SYSCFG_EXTISS3                      REG32(SYSCFG + 0x14U)    /*!< EXTI sources selection register 3 */
    27. 

  27. #define SYSCFG_CPSCTL                       REG32(SYSCFG + 0x20U)    /*!< system I/O compensation control register */
    28. 

  28. 

  29. /* SYSCFG_CFG0 bits definitions */
    30. 

  30. #define SYSCFG_CFG0_BOOT_MODE               BITS(0,2)                /*!< SYSCFG memory remap config */
    31. 

  31. #define SYSCFG_CFG0_FMC_SWP                 BIT(8)                   /*!< FMC memory swap config */
    32. 

  32. #define SYSCFG_CFG0_EXMC_SWP                BITS(10,11)              /*!< EXMC memory swap config */
    33. 

  33. 

  34. /* SYSCFG_CFG1 bits definitions */
    35. 

  35. #define SYSCFG_CFG1_ENET_PHY_SEL            BIT(23)                  /*!< Ethernet PHY selection config */
    36. 

  36. 

  37. /* SYSCFG_EXTISS0 bits definitions */
    38. 

  38. #define SYSCFG_EXTISS0_EXTI0_SS             BITS(0,3)                /*!< EXTI 0 configuration */
    39. 

  39. #define SYSCFG_EXTISS0_EXTI1_SS             BITS(4,7)                /*!< EXTI 1 configuration */
    40. 

  40. #define SYSCFG_EXTISS0_EXTI2_SS             BITS(8,11)               /*!< EXTI 2 configuration */
    41. 

  41. #define SYSCFG_EXTISS0_EXTI3_SS             BITS(12,15)              /*!< EXTI 3 configuration */
    42. 

  42. 

  43. /* SYSCFG_EXTISS1 bits definitions */
    44. 

  44. #define SYSCFG_EXTISS1_EXTI4_SS             BITS(0,3)                /*!< EXTI 4 configuration */
    45. 

  45. #define SYSCFG_EXTISS1_EXTI5_SS             BITS(4,7)                /*!< EXTI 5 configuration */
    46. 

  46. #define SYSCFG_EXTISS1_EXTI6_SS             BITS(8,11)               /*!< EXTI 6 configuration */
    47. 

  47. #define SYSCFG_EXTISS1_EXTI7_SS             BITS(12,15)              /*!< EXTI 7 configuration */
    48. 

  48. 

  49. /* SYSCFG_EXTISS2 bits definitions */
    50. 

  50. #define SYSCFG_EXTISS2_EXTI8_SS             BITS(0,3)                /*!< EXTI 8 configuration */
    51. 

  51. #define SYSCFG_EXTISS2_EXTI9_SS             BITS(4,7)                /*!< EXTI 9 configuration */
    52. 

  52. #define SYSCFG_EXTISS2_EXTI10_SS            BITS(8,11)               /*!< EXTI 10 configuration */
    53. 

  53. #define SYSCFG_EXTISS2_EXTI11_SS            BITS(12,15)              /*!< EXTI 11 configuration */
    54. 

  54. 

  55. /* SYSCFG_EXTISS3 bits definitions */
    56. 

  56. #define SYSCFG_EXTISS3_EXTI12_SS            BITS(0,3)                /*!< EXTI 12 configuration */
    57. 

  57. #define SYSCFG_EXTISS3_EXTI13_SS            BITS(4,7)                /*!< EXTI 13 configuration */
    58. 

  58. #define SYSCFG_EXTISS3_EXTI14_SS            BITS(8,11)               /*!< EXTI 14 configuration */
    59. 

  59. #define SYSCFG_EXTISS3_EXTI15_SS            BITS(12,15)              /*!< EXTI 15 configuration */
    60. 

  60. 

  61. /* SYSCFG_CPSCTL bits definitions */
    62. 

  62. #define SYSCFG_CPSCTL_CPS_EN                BIT(0)                   /*!< I/O compensation cell enable */
    63. 

  63. #define SYSCFG_CPSCTL_CPS_RDY               BIT(8)                   /*!< I/O compensation cell is ready or not */
    64. 

  64. 

  65. /* constants definitions */
    66. 

  66. /* boot mode definitions */
    67. 

  67. #define SYSCFG_BOOTMODE_FLASH               ((uint8_t)0x00U)          /*!< main flash memory remap */
    68. 

  68. #define SYSCFG_BOOTMODE_BOOTLOADER          ((uint8_t)0x01U)          /*!< boot loader remap */
    69. 

  69. #define SYSCFG_BOOTMODE_EXMC_SRAM           ((uint8_t)0x02U)          /*!< SRAM/NOR 0 and 1 of EXMC remap */
    70. 

  70. #define SYSCFG_BOOTMODE_SRAM                ((uint8_t)0x03U)          /*!< SRAM0 of on-chip SRAM remap */
    71. 

  71. #define SYSCFG_BOOTMODE_EXMC_SDRAM          ((uint8_t)0x04U)          /*!< SDRAM bank0 of EXMC remap */
    72. 

  72. 

  73. /* FMC swap definitions */
    74. 

  74. #define SYSCFG_FMC_SWP_BANK0                ((uint32_t)0x00000000U)   /*!< main flash Bank 0 is mapped at address 0x08000000 */
    75. 

  75. #define SYSCFG_FMC_SWP_BANK1                ((uint32_t)0x00000100U)   /*!< main flash Bank 1 is mapped at address 0x08000000 */
    76. 

  76. 

  77. /* EXMC swap enable/disable */
    78. 

  78. #define SYSCFG_EXMC_SWP_ENABLE              ((uint32_t)0x00000400U)   /*!< SDRAM bank 0 and bank 1 are swapped with NAND bank 1 and PC card */
    79. 

  79. #define SYSCFG_EXMC_SWP_DISABLE             ((uint32_t)0x00000000U)   /*!< no memory mapping swap */
    80. 

  80. 

  81. /* EXTI source select definition */
    82. 

  82. #define EXTISS0                             ((uint8_t)0x00U)          /*!< EXTI source select GPIOx pin 0~3 */
    83. 

  83. #define EXTISS1                             ((uint8_t)0x01U)          /*!< EXTI source select GPIOx pin 4~7 */
    84. 

  84. #define EXTISS2                             ((uint8_t)0x02U)          /*!< EXTI source select GPIOx pin 8~11 */
    85. 

  85. #define EXTISS3                             ((uint8_t)0x03U)          /*!< EXTI source select GPIOx pin 12~15 */
    86. 

  86. 

  87. /* EXTI source select mask bits definition */
    88. 

  88. #define EXTI_SS_MASK                        BITS(0,3)
    89. 

  89. 

  90. /* EXTI source select jumping step definition */
    91. 

  91. #define EXTI_SS_JSTEP                       ((uint8_t)(0x04U))
    92. 

  92. 

  93. /* EXTI source select moving step definition */
    94. 

  94. #define EXTI_SS_MSTEP(pin)                  (EXTI_SS_JSTEP*((pin)%EXTI_SS_JSTEP))
    95. 

  95. 

  96. /* EXTI source port definitions */
    97. 

  97. #define EXTI_SOURCE_GPIOA                   ((uint8_t)0x00U)          /*!< EXTI GPIOA configuration */
    98. 

  98. #define EXTI_SOURCE_GPIOB                   ((uint8_t)0x01U)          /*!< EXTI GPIOB configuration */
    99. 

  99. #define EXTI_SOURCE_GPIOC                   ((uint8_t)0x02U)          /*!< EXTI GPIOC configuration */
    100. 

  100. #define EXTI_SOURCE_GPIOD                   ((uint8_t)0x03U)          /*!< EXTI GPIOD configuration */
    101. 

  101. #define EXTI_SOURCE_GPIOE                   ((uint8_t)0x04U)          /*!< EXTI GPIOE configuration */
    102. 

  102. #define EXTI_SOURCE_GPIOF                   ((uint8_t)0x05U)          /*!< EXTI GPIOF configuration */
    103. 

  103. #define EXTI_SOURCE_GPIOG                   ((uint8_t)0x06U)          /*!< EXTI GPIOG configuration */
    104. 

  104. #define EXTI_SOURCE_GPIOH                   ((uint8_t)0x07U)          /*!< EXTI GPIOH configuration */
    105. 

  105. #define EXTI_SOURCE_GPIOI                   ((uint8_t)0x08U)          /*!< EXTI GPIOI configuration */
    106. 

  106. 

  107. /* EXTI source pin definitions */
    108. 

  108. #define EXTI_SOURCE_PIN0                    ((uint8_t)0x00U)          /*!< EXTI GPIO pin0 configuration */
    109. 

  109. #define EXTI_SOURCE_PIN1                    ((uint8_t)0x01U)          /*!< EXTI GPIO pin1 configuration */
    110. 

  110. #define EXTI_SOURCE_PIN2                    ((uint8_t)0x02U)          /*!< EXTI GPIO pin2 configuration */
    111. 

  111. #define EXTI_SOURCE_PIN3                    ((uint8_t)0x03U)          /*!< EXTI GPIO pin3 configuration */
    112. 

  112. #define EXTI_SOURCE_PIN4                    ((uint8_t)0x04U)          /*!< EXTI GPIO pin4 configuration */
    113. 

  113. #define EXTI_SOURCE_PIN5                    ((uint8_t)0x05U)          /*!< EXTI GPIO pin5 configuration */
    114. 

  114. #define EXTI_SOURCE_PIN6                    ((uint8_t)0x06U)          /*!< EXTI GPIO pin6 configuration */
    115. 

  115. #define EXTI_SOURCE_PIN7                    ((uint8_t)0x07U)          /*!< EXTI GPIO pin7 configuration */
    116. 

  116. #define EXTI_SOURCE_PIN8                    ((uint8_t)0x08U)          /*!< EXTI GPIO pin8 configuration */
    117. 

  117. #define EXTI_SOURCE_PIN9                    ((uint8_t)0x09U)          /*!< EXTI GPIO pin9 configuration */
    118. 

  118. #define EXTI_SOURCE_PIN10                   ((uint8_t)0x0AU)          /*!< EXTI GPIO pin10 configuration */
    119. 

  119. #define EXTI_SOURCE_PIN11                   ((uint8_t)0x0BU)          /*!< EXTI GPIO pin11 configuration */
    120. 

  120. #define EXTI_SOURCE_PIN12                   ((uint8_t)0x0CU)          /*!< EXTI GPIO pin12 configuration */
    121. 

  121. #define EXTI_SOURCE_PIN13                   ((uint8_t)0x0DU)          /*!< EXTI GPIO pin13 configuration */
    122. 

  122. #define EXTI_SOURCE_PIN14                   ((uint8_t)0x0EU)          /*!< EXTI GPIO pin14 configuration */
    123. 

  123. #define EXTI_SOURCE_PIN15                   ((uint8_t)0x0FU)          /*!< EXTI GPIO pin15 configuration */
    124. 

  124. 

  125. /* ethernet PHY selection */
    126. 

  126. #define SYSCFG_ENET_PHY_MII                 ((uint32_t)0x00000000U)
    127. 

  127. #define SYSCFG_ENET_PHY_RMII                ((uint32_t)0x00800000U)
    128. 

  128. 

  129. /* I/O compensation cell enable/disable */
    130. 

  130. #define SYSCFG_COMPENSATION_ENABLE          ((uint32_t)0x00000001U)
    131. 

  131. #define SYSCFG_COMPENSATION_DISABLE         ((uint32_t)0x00000000U)
    132. 

  132. 

  133. /* function declarations */
    134. 

  134. /* deinit syscfg module */
    135. 

  135. void syscfg_deinit(void);
    136. 

  136. 

  137. /* configure the boot mode */
    138. 

  138. void syscfg_bootmode_config(uint8_t syscfg_bootmode);
    139. 

  139. 

  140. /* FMC memory mapping swap */
    141. 

  141. void syscfg_fmc_swap_config(uint32_t syscfg_fmc_swap);
    142. 

  142. 

  143. /* configure the EXMC swap */
    144. 

  144. void syscfg_exmc_swap_config(uint32_t syscfg_exmc_swap); 
    145. 

  145. 

  146. /* configure the GPIO pin as EXTI Line */
    147. 

  147. void syscfg_exti_line_config(uint8_t exti_port, uint8_t exti_pin);
    148. 

  148. 

  149. /* configure the PHY interface for the ethernet MAC */
    150. 

  150. void syscfg_enet_phy_interface_config(uint32_t syscfg_enet_phy_interface);
    151. 

  151. 

  152. /* configure the I/O compensation cell */
    153. 

  153. void syscfg_compensation_config(uint32_t syscfg_compensation); 
    154. 

  154. 

  155. /* check the I/O compensation cell is ready or not */
    156. 

  156. FlagStatus syscfg_flag_get(void);
    157. 

  157. 

  158. #endif /* GD32F4XX_SYSCFG_H */
    159.