gd32f4xx_sdio.c 24 KB

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  1. /*!
  2. \file gd32f4xx_sdio.c
  3. \brief SDIO driver
  4. */
  5. /*
  6. Copyright (C) 2016 GigaDevice
  7. 2016-08-15, V1.0.0, firmware for GD32F4xx
  8. */
  9. #include "gd32f4xx_sdio.h"
  10. /*!
  11. \brief deinitialize the SDIO
  12. \param[in] none
  13. \param[out] none
  14. \retval none
  15. */
  16. void sdio_deinit(void)
  17. {
  18. rcu_periph_reset_enable(RCU_SDIORST);
  19. rcu_periph_reset_disable(RCU_SDIORST);
  20. }
  21. /*!
  22. \brief configure the SDIO clock
  23. \param[in] clock_edge: SDIO_CLK clock edge
  24. \arg SDIO_SDIOCLKEDGE_RISING: select the rising edge of the SDIOCLK to generate SDIO_CLK
  25. \arg SDIO_SDIOCLKEDGE_FALLING: select the falling edge of the SDIOCLK to generate SDIO_CLK
  26. \param[in] clock_bypass: clock bypass
  27. \arg SDIO_CLOCKBYPASS_ENABLE: clock bypass
  28. \arg SDIO_CLOCKBYPASS_DISABLE: no bypass
  29. \param[in] clock_powersave: SDIO_CLK clock dynamic switch on/off for power saving
  30. \arg SDIO_CLOCKPWRSAVE_ENABLE: SDIO_CLK closed when bus is idle
  31. \arg SDIO_CLOCKPWRSAVE_DISABLE: SDIO_CLK clock is always on
  32. \param[in] clock_division: clock division, less than 512
  33. \param[out] none
  34. \retval none
  35. */
  36. void sdio_clock_config(uint32_t clock_edge, uint32_t clock_bypass, uint32_t clock_powersave, uint16_t clock_division)
  37. {
  38. uint32_t clock_config = 0U;
  39. clock_config = SDIO_CLKCTL;
  40. /* reset the CLKEDGE, CLKBYP, CLKPWRSAV, DIV */
  41. clock_config &= ~(SDIO_CLKCTL_CLKEDGE | SDIO_CLKCTL_CLKBYP | SDIO_CLKCTL_CLKPWRSAV | SDIO_CLKCTL_DIV8 | SDIO_CLKCTL_DIV);
  42. /* if the clock division is greater or equal to 256, set the DIV[8] */
  43. if(clock_division >= 256U){
  44. clock_config |= SDIO_CLKCTL_DIV8;
  45. clock_division -= 256U;
  46. }
  47. /* configure the SDIO_CLKCTL according to the parameters */
  48. clock_config |= (clock_edge | clock_bypass | clock_powersave | clock_division);
  49. SDIO_CLKCTL = clock_config;
  50. }
  51. /*!
  52. \brief enable hardware clock control
  53. \param[in] none
  54. \param[out] none
  55. \retval none
  56. */
  57. void sdio_hardware_clock_enable(void)
  58. {
  59. SDIO_CLKCTL |= SDIO_CLKCTL_HWCLKEN;
  60. }
  61. /*!
  62. \brief disable hardware clock control
  63. \param[in] none
  64. \param[out] none
  65. \retval none
  66. */
  67. void sdio_hardware_clock_disable(void)
  68. {
  69. SDIO_CLKCTL &= ~SDIO_CLKCTL_HWCLKEN;
  70. }
  71. /*!
  72. \brief set different SDIO card bus mode
  73. \param[in] bus_mode: SDIO card bus mode
  74. \arg SDIO_BUSMODE_1BIT: 1-bit SDIO card bus mode
  75. \arg SDIO_BUSMODE_4BIT: 4-bit SDIO card bus mode
  76. \arg SDIO_BUSMODE_8BIT: 8-bit SDIO card bus mode
  77. \param[out] none
  78. \retval none
  79. */
  80. void sdio_bus_mode_set(uint32_t bus_mode)
  81. {
  82. /* reset the SDIO card bus mode bits and set according to bus_mode */
  83. SDIO_CLKCTL &= ~SDIO_CLKCTL_BUSMODE;
  84. SDIO_CLKCTL |= bus_mode;
  85. }
  86. /*!
  87. \brief set the SDIO power state
  88. \param[in] power_state: SDIO power state
  89. \arg SDIO_POWER_ON: SDIO power on
  90. \arg SDIO_POWER_OFF: SDIO power off
  91. \param[out] none
  92. \retval none
  93. */
  94. void sdio_power_state_set(uint32_t power_state)
  95. {
  96. SDIO_PWRCTL = power_state;
  97. }
  98. /* get the SDIO power state */
  99. /*!
  100. \brief get the SDIO power state
  101. \param[in] none
  102. \param[out] none
  103. \retval SDIO power state
  104. \arg SDIO_POWER_ON: SDIO power on
  105. \arg SDIO_POWER_OFF: SDIO power off
  106. */
  107. uint32_t sdio_power_state_get(void)
  108. {
  109. return SDIO_PWRCTL;
  110. }
  111. /*!
  112. \brief enable SDIO_CLK clock output
  113. \param[in] none
  114. \param[out] none
  115. \retval none
  116. */
  117. void sdio_clock_enable(void)
  118. {
  119. SDIO_CLKCTL |= SDIO_CLKCTL_CLKEN;
  120. }
  121. /*!
  122. \brief disable SDIO_CLK clock output
  123. \param[in] none
  124. \param[out] none
  125. \retval none
  126. */
  127. void sdio_clock_disable(void)
  128. {
  129. SDIO_CLKCTL &= ~SDIO_CLKCTL_CLKEN;
  130. }
  131. /*!
  132. \brief configure the command and response
  133. \param[in] cmd_index: command index, refer to the related specifications
  134. \param[in] cmd_argument: command argument, refer to the related specifications
  135. \param[in] response_type: response type
  136. \arg SDIO_RESPONSETYPE_NO: no response
  137. \arg SDIO_RESPONSETYPE_SHORT: short response
  138. \arg SDIO_RESPONSETYPE_LONG: long response
  139. \param[out] none
  140. \retval none
  141. */
  142. void sdio_command_response_config(uint32_t cmd_index, uint32_t cmd_argument, uint32_t response_type)
  143. {
  144. uint32_t cmd_config = 0U;
  145. /* reset the command index, command argument and response type */
  146. SDIO_CMDAGMT &= ~SDIO_CMDAGMT_CMDAGMT;
  147. SDIO_CMDAGMT = cmd_argument;
  148. cmd_config = SDIO_CMDCTL;
  149. cmd_config &= ~(SDIO_CMDCTL_CMDIDX | SDIO_CMDCTL_CMDRESP);
  150. /* configure SDIO_CMDCTL and SDIO_CMDAGMT according to the parameters */
  151. cmd_config |= (cmd_index | response_type);
  152. SDIO_CMDCTL = cmd_config;
  153. }
  154. /*!
  155. \brief set the command state machine wait type
  156. \param[in] wait_type: wait type
  157. \arg SDIO_WAITTYPE_NO: not wait interrupt
  158. \arg SDIO_WAITTYPE_INTERRUPT: wait interrupt
  159. \arg SDIO_WAITTYPE_DATAEND: wait the end of data transfer
  160. \param[out] none
  161. \retval none
  162. */
  163. void sdio_wait_type_set(uint32_t wait_type)
  164. {
  165. /* reset INTWAIT and WAITDEND */
  166. SDIO_CMDCTL &= ~(SDIO_CMDCTL_INTWAIT | SDIO_CMDCTL_WAITDEND);
  167. /* set the wait type according to wait_type */
  168. SDIO_CMDCTL |= wait_type;
  169. }
  170. /*!
  171. \brief enable the CSM(command state machine)
  172. \param[in] none
  173. \param[out] none
  174. \retval none
  175. */
  176. void sdio_csm_enable(void)
  177. {
  178. SDIO_CMDCTL |= SDIO_CMDCTL_CSMEN;
  179. }
  180. /*!
  181. \brief disable the CSM(command state machine)
  182. \param[in] none
  183. \param[out] none
  184. \retval none
  185. */
  186. void sdio_csm_disable(void)
  187. {
  188. SDIO_CMDCTL &= ~SDIO_CMDCTL_CSMEN;
  189. }
  190. /*!
  191. \brief get the last response command index
  192. \param[in] none
  193. \param[out] none
  194. \retval last response command index
  195. */
  196. uint8_t sdio_command_index_get(void)
  197. {
  198. return (uint8_t)SDIO_RSPCMDIDX;
  199. }
  200. /*!
  201. \brief get the response for the last received command
  202. \param[in] sdio_responsex: SDIO response
  203. \arg SDIO_RESPONSE0: card response[31:0]/card response[127:96]
  204. \arg SDIO_RESPONSE1: card response[95:64]
  205. \arg SDIO_RESPONSE2: card response[63:32]
  206. \arg SDIO_RESPONSE3: card response[31:1], plus bit 0
  207. \param[out] none
  208. \retval response for the last received command
  209. */
  210. uint32_t sdio_response_get(uint32_t sdio_responsex)
  211. {
  212. uint32_t resp_content = 0U;
  213. switch(sdio_responsex){
  214. case SDIO_RESPONSE0:
  215. resp_content = SDIO_RESP0;
  216. break;
  217. case SDIO_RESPONSE1:
  218. resp_content = SDIO_RESP1;
  219. break;
  220. case SDIO_RESPONSE2:
  221. resp_content = SDIO_RESP2;
  222. break;
  223. case SDIO_RESPONSE3:
  224. resp_content = SDIO_RESP3;
  225. break;
  226. default:
  227. break;
  228. }
  229. return resp_content;
  230. }
  231. /*!
  232. \brief configure the data timeout, data length and data block size
  233. \param[in] data_timeout: data timeout period in card bus clock periods
  234. \param[in] data_length: number of data bytes to be transferred
  235. \param[in] data_blocksize: size of data block for block transfer
  236. \arg SDIO_DATABLOCKSIZE_1BYTE: block size = 1 byte
  237. \arg SDIO_DATABLOCKSIZE_2BYTES: block size = 2 bytes
  238. \arg SDIO_DATABLOCKSIZE_4BYTES: block size = 4 bytes
  239. \arg SDIO_DATABLOCKSIZE_8BYTES: block size = 8 bytes
  240. \arg SDIO_DATABLOCKSIZE_16BYTES: block size = 16 bytes
  241. \arg SDIO_DATABLOCKSIZE_32BYTES: block size = 32 bytes
  242. \arg SDIO_DATABLOCKSIZE_64BYTES: block size = 64 bytes
  243. \arg SDIO_DATABLOCKSIZE_128BYTES: block size = 128 bytes
  244. \arg SDIO_DATABLOCKSIZE_256BYTES: block size = 256 bytes
  245. \arg SDIO_DATABLOCKSIZE_512BYTES: block size = 512 bytes
  246. \arg SDIO_DATABLOCKSIZE_1024BYTES: block size = 1024 bytes
  247. \arg SDIO_DATABLOCKSIZE_2048BYTES: block size = 2048 bytes
  248. \arg SDIO_DATABLOCKSIZE_4096BYTES: block size = 4096 bytes
  249. \arg SDIO_DATABLOCKSIZE_8192BYTES: block size = 8192 bytes
  250. \arg SDIO_DATABLOCKSIZE_16384BYTES: block size = 16384 bytes
  251. \param[out] none
  252. \retval none
  253. */
  254. void sdio_data_config(uint32_t data_timeout, uint32_t data_length, uint32_t data_blocksize)
  255. {
  256. /* reset data timeout, data length and data block size */
  257. SDIO_DATATO &= ~SDIO_DATATO_DATATO;
  258. SDIO_DATALEN &= ~SDIO_DATALEN_DATALEN;
  259. SDIO_DATACTL &= ~SDIO_DATACTL_BLKSZ;
  260. /* configure the related parameters of data */
  261. SDIO_DATATO = data_timeout;
  262. SDIO_DATALEN = data_length;
  263. SDIO_DATACTL |= data_blocksize;
  264. }
  265. /*!
  266. \brief configure the data transfer mode and direction
  267. \param[in] transfer_mode: mode of data transfer
  268. \arg SDIO_TRANSMODE_BLOCK: block transfer
  269. \arg SDIO_TRANSMODE_STREAM: stream transfer or SDIO multibyte transfer
  270. \param[in] transfer_direction: data transfer direction, read or write
  271. \arg SDIO_TRANSDIRECTION_TOCARD: write data to card
  272. \arg SDIO_TRANSDIRECTION_TOSDIO: read data from card
  273. \param[out] none
  274. \retval none
  275. */
  276. void sdio_data_transfer_config(uint32_t transfer_mode, uint32_t transfer_direction)
  277. {
  278. uint32_t data_trans = 0U;
  279. /* reset the data transfer mode, transfer direction and set according to the parameters */
  280. data_trans = SDIO_DATACTL;
  281. data_trans &= ~(SDIO_DATACTL_TRANSMOD | SDIO_DATACTL_DATADIR);
  282. data_trans |= (transfer_mode | transfer_direction);
  283. SDIO_DATACTL = data_trans;
  284. }
  285. /*!
  286. \brief enable the DSM(data state machine) for data transfer
  287. \param[in] none
  288. \param[out] none
  289. \retval none
  290. */
  291. void sdio_dsm_enable(void)
  292. {
  293. SDIO_DATACTL |= SDIO_DATACTL_DATAEN;
  294. }
  295. /*!
  296. \brief disable the DSM(data state machine)
  297. \param[in] none
  298. \param[out] none
  299. \retval none
  300. */
  301. void sdio_dsm_disable(void)
  302. {
  303. SDIO_DATACTL &= ~SDIO_DATACTL_DATAEN;
  304. }
  305. /*!
  306. \brief write data(one word) to the transmit FIFO
  307. \param[in] data: 32-bit data write to card
  308. \param[out] none
  309. \retval none
  310. */
  311. void sdio_data_write(uint32_t data)
  312. {
  313. SDIO_FIFO = data;
  314. }
  315. /*!
  316. \brief read data(one word) from the receive FIFO
  317. \param[in] none
  318. \param[out] none
  319. \retval received data
  320. */
  321. uint32_t sdio_data_read(void)
  322. {
  323. return SDIO_FIFO;
  324. }
  325. /*!
  326. \brief get the number of remaining data bytes to be transferred to card
  327. \param[in] none
  328. \param[out] none
  329. \retval number of remaining data bytes to be transferred
  330. */
  331. uint32_t sdio_data_counter_get(void)
  332. {
  333. return SDIO_DATACNT;
  334. }
  335. /*!
  336. \brief get the number of words remaining to be written or read from FIFO
  337. \param[in] none
  338. \param[out] none
  339. \retval remaining number of words
  340. */
  341. uint32_t sdio_fifo_counter_get(void)
  342. {
  343. return SDIO_FIFOCNT;
  344. }
  345. /*!
  346. \brief enable the DMA request for SDIO
  347. \param[in] none
  348. \param[out] none
  349. \retval none
  350. */
  351. void sdio_dma_enable(void)
  352. {
  353. SDIO_DATACTL |= SDIO_DATACTL_DMAEN;
  354. }
  355. /*!
  356. \brief disable the DMA request for SDIO
  357. \param[in] none
  358. \param[out] none
  359. \retval none
  360. */
  361. void sdio_dma_disable(void)
  362. {
  363. SDIO_DATACTL &= ~SDIO_DATACTL_DMAEN;
  364. }
  365. /*!
  366. \brief get the flags state of SDIO
  367. \param[in] flag: flags state of SDIO
  368. \arg SDIO_FLAG_CCRCERR: command response received (CRC check failed) flag
  369. \arg SDIO_FLAG_DTCRCERR: data block sent/received (CRC check failed) flag
  370. \arg SDIO_FLAG_CMDTMOUT: command response timeout flag
  371. \arg SDIO_FLAG_DTTMOUT: data timeout flag
  372. \arg SDIO_FLAG_TXURE: transmit FIFO underrun error occurs flag
  373. \arg SDIO_FLAG_RXORE: received FIFO overrun error occurs flag
  374. \arg SDIO_FLAG_CMDRECV: command response received (CRC check passed) flag
  375. \arg SDIO_FLAG_CMDSEND: command sent (no response required) flag
  376. \arg SDIO_FLAG_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
  377. \arg SDIO_FLAG_STBITE: start bit error in the bus flag
  378. \arg SDIO_FLAG_DTBLKEND: data block sent/received (CRC check passed) flag
  379. \arg SDIO_FLAG_CMDRUN: command transmission in progress flag
  380. \arg SDIO_FLAG_TXRUN: data transmission in progress flag
  381. \arg SDIO_FLAG_RXRUN: data reception in progress flag
  382. \arg SDIO_FLAG_TFH: transmit FIFO is half empty flag: at least 8 words can be written into the FIFO
  383. \arg SDIO_FLAG_RFH: receive FIFO is half full flag: at least 8 words can be read in the FIFO
  384. \arg SDIO_FLAG_TFF: transmit FIFO is full flag
  385. \arg SDIO_FLAG_RFF: receive FIFO is full flag
  386. \arg SDIO_FLAG_TFE: transmit FIFO is empty flag
  387. \arg SDIO_FLAG_RFE: receive FIFO is empty flag
  388. \arg SDIO_FLAG_TXDTVAL: data is valid in transmit FIFO flag
  389. \arg SDIO_FLAG_RXDTVAL: data is valid in receive FIFO flag
  390. \arg SDIO_FLAG_SDIOINT: SD I/O interrupt received flag
  391. \arg SDIO_FLAG_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
  392. \param[out] none
  393. \retval FlagStatus: SET or RESET
  394. */
  395. FlagStatus sdio_flag_get(uint32_t flag)
  396. {
  397. FlagStatus temp_flag = RESET;
  398. if(RESET != (SDIO_STAT & flag)){
  399. temp_flag = SET;
  400. }
  401. return temp_flag;
  402. }
  403. /*!
  404. \brief clear the pending flags of SDIO
  405. \param[in] flag: flags state of SDIO
  406. \arg SDIO_FLAG_CCRCERR: command response received (CRC check failed) flag
  407. \arg SDIO_FLAG_DTCRCERR: data block sent/received (CRC check failed) flag
  408. \arg SDIO_FLAG_CMDTMOUT: command response timeout flag
  409. \arg SDIO_FLAG_DTTMOUT: data timeout flag
  410. \arg SDIO_FLAG_TXURE: transmit FIFO underrun error occurs flag
  411. \arg SDIO_FLAG_RXORE: received FIFO overrun error occurs flag
  412. \arg SDIO_FLAG_CMDRECV: command response received (CRC check passed) flag
  413. \arg SDIO_FLAG_CMDSEND: command sent (no response required) flag
  414. \arg SDIO_FLAG_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
  415. \arg SDIO_FLAG_STBITE: start bit error in the bus flag
  416. \arg SDIO_FLAG_DTBLKEND: data block sent/received (CRC check passed) flag
  417. \arg SDIO_FLAG_SDIOINT: SD I/O interrupt received flag
  418. \arg SDIO_FLAG_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
  419. \param[out] none
  420. \retval none
  421. */
  422. void sdio_flag_clear(uint32_t flag)
  423. {
  424. SDIO_INTC = flag;
  425. }
  426. /*!
  427. \brief enable the SDIO interrupt
  428. \param[in] int_flag: interrupt flags state of SDIO
  429. \arg SDIO_INT_CCRCERR: SDIO CCRCERR interrupt
  430. \arg SDIO_INT_DTCRCERR: SDIO DTCRCERR interrupt
  431. \arg SDIO_INT_CMDTMOUT: SDIO CMDTMOUT interrupt
  432. \arg SDIO_INT_DTTMOUT: SDIO DTTMOUT interrupt
  433. \arg SDIO_INT_TXURE: SDIO TXURE interrupt
  434. \arg SDIO_INT_RXORE: SDIO RXORE interrupt
  435. \arg SDIO_INT_CMDRECV: SDIO CMDRECV interrupt
  436. \arg SDIO_INT_CMDSEND: SDIO CMDSEND interrupt
  437. \arg SDIO_INT_DTEND: SDIO DTEND interrupt
  438. \arg SDIO_INT_STBITE: SDIO STBITE interrupt
  439. \arg SDIO_INT_DTBLKEND: SDIO DTBLKEND interrupt
  440. \arg SDIO_INT_CMDRUN: SDIO CMDRUN interrupt
  441. \arg SDIO_INT_TXRUN: SDIO TXRUN interrupt
  442. \arg SDIO_INT_RXRUN: SDIO RXRUN interrupt
  443. \arg SDIO_INT_TFH: SDIO TFH interrupt
  444. \arg SDIO_INT_RFH: SDIO RFH interrupt
  445. \arg SDIO_INT_TFF: SDIO TFF interrupt
  446. \arg SDIO_INT_RFF: SDIO RFF interrupt
  447. \arg SDIO_INT_TFE: SDIO TFE interrupt
  448. \arg SDIO_INT_RFE: SDIO RFE interrupt
  449. \arg SDIO_INT_TXDTVAL: SDIO TXDTVAL interrupt
  450. \arg SDIO_INT_RXDTVAL: SDIO RXDTVAL interrupt
  451. \arg SDIO_INT_SDIOINT: SDIO SDIOINT interrupt
  452. \arg SDIO_INT_ATAEND: SDIO ATAEND interrupt
  453. \param[out] none
  454. \retval none
  455. */
  456. void sdio_interrupt_enable(uint32_t int_flag)
  457. {
  458. SDIO_INTEN |= int_flag;
  459. }
  460. /*!
  461. \brief disable the SDIO interrupt
  462. \param[in] int_flag: interrupt flags state of SDIO
  463. \arg SDIO_INT_CCRCERR: SDIO CCRCERR interrupt
  464. \arg SDIO_INT_DTCRCERR: SDIO DTCRCERR interrupt
  465. \arg SDIO_INT_CMDTMOUT: SDIO CMDTMOUT interrupt
  466. \arg SDIO_INT_DTTMOUT: SDIO DTTMOUT interrupt
  467. \arg SDIO_INT_TXURE: SDIO TXURE interrupt
  468. \arg SDIO_INT_RXORE: SDIO RXORE interrupt
  469. \arg SDIO_INT_CMDRECV: SDIO CMDRECV interrupt
  470. \arg SDIO_INT_CMDSEND: SDIO CMDSEND interrupt
  471. \arg SDIO_INT_DTEND: SDIO DTEND interrupt
  472. \arg SDIO_INT_STBITE: SDIO STBITE interrupt
  473. \arg SDIO_INT_DTBLKEND: SDIO DTBLKEND interrupt
  474. \arg SDIO_INT_CMDRUN: SDIO CMDRUN interrupt
  475. \arg SDIO_INT_TXRUN: SDIO TXRUN interrupt
  476. \arg SDIO_INT_RXRUN: SDIO RXRUN interrupt
  477. \arg SDIO_INT_TFH: SDIO TFH interrupt
  478. \arg SDIO_INT_RFH: SDIO RFH interrupt
  479. \arg SDIO_INT_TFF: SDIO TFF interrupt
  480. \arg SDIO_INT_RFF: SDIO RFF interrupt
  481. \arg SDIO_INT_TFE: SDIO TFE interrupt
  482. \arg SDIO_INT_RFE: SDIO RFE interrupt
  483. \arg SDIO_INT_TXDTVAL: SDIO TXDTVAL interrupt
  484. \arg SDIO_INT_RXDTVAL: SDIO RXDTVAL interrupt
  485. \arg SDIO_INT_SDIOINT: SDIO SDIOINT interrupt
  486. \arg SDIO_INT_ATAEND: SDIO ATAEND interrupt
  487. \param[out] none
  488. \retval none
  489. */
  490. void sdio_interrupt_disable(uint32_t int_flag)
  491. {
  492. SDIO_INTEN &= ~int_flag;
  493. }
  494. /*!
  495. \brief get the interrupt flags state of SDIO
  496. \param[in] int_flag: interrupt flags state of SDIO
  497. \arg SDIO_INT_CCRCERR: SDIO CCRCERR interrupt
  498. \arg SDIO_INT_DTCRCERR: SDIO DTCRCERR interrupt
  499. \arg SDIO_INT_CMDTMOUT: SDIO CMDTMOUT interrupt
  500. \arg SDIO_INT_DTTMOUT: SDIO DTTMOUT interrupt
  501. \arg SDIO_INT_TXURE: SDIO TXURE interrupt
  502. \arg SDIO_INT_RXORE: SDIO RXORE interrupt
  503. \arg SDIO_INT_CMDRECV: SDIO CMDRECV interrupt
  504. \arg SDIO_INT_CMDSEND: SDIO CMDSEND interrupt
  505. \arg SDIO_INT_DTEND: SDIO DTEND interrupt
  506. \arg SDIO_INT_STBITE: SDIO STBITE interrupt
  507. \arg SDIO_INT_DTBLKEND: SDIO DTBLKEND interrupt
  508. \arg SDIO_INT_CMDRUN: SDIO CMDRUN interrupt
  509. \arg SDIO_INT_TXRUN: SDIO TXRUN interrupt
  510. \arg SDIO_INT_RXRUN: SDIO RXRUN interrupt
  511. \arg SDIO_INT_TFH: SDIO TFH interrupt
  512. \arg SDIO_INT_RFH: SDIO RFH interrupt
  513. \arg SDIO_INT_TFF: SDIO TFF interrupt
  514. \arg SDIO_INT_RFF: SDIO RFF interrupt
  515. \arg SDIO_INT_TFE: SDIO TFE interrupt
  516. \arg SDIO_INT_RFE: SDIO RFE interrupt
  517. \arg SDIO_INT_TXDTVAL: SDIO TXDTVAL interrupt
  518. \arg SDIO_INT_RXDTVAL: SDIO RXDTVAL interrupt
  519. \arg SDIO_INT_SDIOINT: SDIO SDIOINT interrupt
  520. \arg SDIO_INT_ATAEND: SDIO ATAEND interrupt
  521. \param[out] none
  522. \retval FlagStatus: SET or RESET
  523. */
  524. FlagStatus sdio_interrupt_flag_get(uint32_t int_flag)
  525. {
  526. FlagStatus temp_flag = RESET;
  527. if(RESET != (SDIO_STAT & int_flag)){
  528. temp_flag = SET;
  529. }
  530. return temp_flag;
  531. }
  532. /*!
  533. \brief clear the interrupt pending flags of SDIO
  534. \param[in] int_flag: interrupt flags state of SDIO
  535. \arg SDIO_INT_CCRCERR: command response received (CRC check failed) flag
  536. \arg SDIO_INT_DTCRCERR: data block sent/received (CRC check failed) flag
  537. \arg SDIO_INT_CMDTMOUT: command response timeout flag
  538. \arg SDIO_INT_DTTMOUT: data timeout flag
  539. \arg SDIO_INT_TXURE: transmit FIFO underrun error occurs flag
  540. \arg SDIO_INT_RXORE: received FIFO overrun error occurs flag
  541. \arg SDIO_INT_CMDRECV: command response received (CRC check passed) flag
  542. \arg SDIO_INT_CMDSEND: command sent (no response required) flag
  543. \arg SDIO_INT_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
  544. \arg SDIO_INT_STBITE: start bit error in the bus flag
  545. \arg SDIO_INT_DTBLKEND: data block sent/received (CRC check passed) flag
  546. \arg SDIO_INT_SDIOINT: SD I/O interrupt received flag
  547. \arg SDIO_INT_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
  548. \param[out] none
  549. \retval none
  550. */
  551. void sdio_interrupt_flag_clear(uint32_t int_flag)
  552. {
  553. SDIO_INTC = int_flag;
  554. }
  555. /*!
  556. \brief enable the read wait mode(SD I/O only)
  557. \param[in] none
  558. \param[out] none
  559. \retval none
  560. */
  561. void sdio_readwait_enable(void)
  562. {
  563. SDIO_DATACTL |= SDIO_DATACTL_RWEN;
  564. }
  565. /*!
  566. \brief disable the read wait mode(SD I/O only)
  567. \param[in] none
  568. \param[out] none
  569. \retval none
  570. */
  571. void sdio_readwait_disable(void)
  572. {
  573. SDIO_DATACTL &= ~SDIO_DATACTL_RWEN;
  574. }
  575. /*!
  576. \brief enable the function that stop the read wait process(SD I/O only)
  577. \param[in] none
  578. \param[out] none
  579. \retval none
  580. */
  581. void sdio_stop_readwait_enable(void)
  582. {
  583. SDIO_DATACTL |= SDIO_DATACTL_RWSTOP;
  584. }
  585. /*!
  586. \brief disable the function that stop the read wait process(SD I/O only)
  587. \param[in] none
  588. \param[out] none
  589. \retval none
  590. */
  591. void sdio_stop_readwait_disable(void)
  592. {
  593. SDIO_DATACTL &= ~SDIO_DATACTL_RWSTOP;
  594. }
  595. /*!
  596. \brief set the read wait type(SD I/O only)
  597. \param[in] readwait_type: SD I/O read wait type
  598. \arg SDIO_READWAITTYPE_CLK: read wait control by stopping SDIO_CLK
  599. \arg SDIO_READWAITTYPE_DAT2: read wait control using SDIO_DAT[2]
  600. \param[out] none
  601. \retval none
  602. */
  603. void sdio_readwait_type_set(uint32_t readwait_type)
  604. {
  605. if(SDIO_READWAITTYPE_CLK == readwait_type){
  606. SDIO_DATACTL |= SDIO_DATACTL_RWTYPE;
  607. }else{
  608. SDIO_DATACTL &= ~SDIO_DATACTL_RWTYPE;
  609. }
  610. }
  611. /*!
  612. \brief enable the SD I/O mode specific operation(SD I/O only)
  613. \param[in] none
  614. \param[out] none
  615. \retval none
  616. */
  617. void sdio_operation_enable(void)
  618. {
  619. SDIO_DATACTL |= SDIO_DATACTL_IOEN;
  620. }
  621. /*!
  622. \brief disable the SD I/O mode specific operation(SD I/O only)
  623. \param[in] none
  624. \param[out] none
  625. \retval none
  626. */
  627. void sdio_operation_disable(void)
  628. {
  629. SDIO_DATACTL &= ~SDIO_DATACTL_IOEN;
  630. }
  631. /*!
  632. \brief enable the SD I/O suspend operation(SD I/O only)
  633. \param[in] none
  634. \param[out] none
  635. \retval none
  636. */
  637. void sdio_suspend_enable(void)
  638. {
  639. SDIO_CMDCTL |= SDIO_CMDCTL_SUSPEND;
  640. }
  641. /*!
  642. \brief disable the SD I/O suspend operation(SD I/O only)
  643. \param[in] none
  644. \param[out] none
  645. \retval none
  646. */
  647. void sdio_suspend_disable(void)
  648. {
  649. SDIO_CMDCTL &= ~SDIO_CMDCTL_SUSPEND;
  650. }
  651. /*!
  652. \brief enable the CE-ATA command(CE-ATA only)
  653. \param[in] none
  654. \param[out] none
  655. \retval none
  656. */
  657. void sdio_ceata_command_enable(void)
  658. {
  659. SDIO_CMDCTL |= SDIO_CMDCTL_ATAEN;
  660. }
  661. /*!
  662. \brief disable the CE-ATA command(CE-ATA only)
  663. \param[in] none
  664. \param[out] none
  665. \retval none
  666. */
  667. void sdio_ceata_command_disable(void)
  668. {
  669. SDIO_CMDCTL &= ~SDIO_CMDCTL_ATAEN;
  670. }
  671. /*!
  672. \brief enable the CE-ATA interrupt(CE-ATA only)
  673. \param[in] none
  674. \param[out] none
  675. \retval none
  676. */
  677. void sdio_ceata_interrupt_enable(void)
  678. {
  679. SDIO_CMDCTL &= ~SDIO_CMDCTL_NINTEN;
  680. }
  681. /*!
  682. \brief disable the CE-ATA interrupt(CE-ATA only)
  683. \param[in] none
  684. \param[out] none
  685. \retval none
  686. */
  687. void sdio_ceata_interrupt_disable(void)
  688. {
  689. SDIO_CMDCTL |= SDIO_CMDCTL_NINTEN;
  690. }
  691. /*!
  692. \brief enable the CE-ATA command completion signal(CE-ATA only)
  693. \param[in] none
  694. \param[out] none
  695. \retval none
  696. */
  697. void sdio_ceata_command_completion_enable(void)
  698. {
  699. SDIO_CMDCTL |= SDIO_CMDCTL_ENCMDC;
  700. }
  701. /*!
  702. \brief disable the CE-ATA command completion signal(CE-ATA only)
  703. \param[in] none
  704. \param[out] none
  705. \retval none
  706. */
  707. void sdio_ceata_command_completion_disable(void)
  708. {
  709. SDIO_CMDCTL &= ~SDIO_CMDCTL_ENCMDC;
  710. }