gh_gdma.h 16 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_gdma.h
  5. **
  6. ** \brief The Graphics DMA unit.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_GDMA_H
  18. #define _GH_GDMA_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_GDMA_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_GDMA_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_GDMA_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_GDMA_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_GDMA_SOURCE1_BASE FIO_ADDRESS(GDMA,0x60015000) /* read/write */
  59. #define REG_GDMA_SOURCE1_PITCH FIO_ADDRESS(GDMA,0x60015004) /* read/write */
  60. #define REG_GDMA_SOURCE2_BASE FIO_ADDRESS(GDMA,0x60015008) /* read/write */
  61. #define REG_GDMA_SOURCE2_PITCH FIO_ADDRESS(GDMA,0x6001500C) /* read/write */
  62. #define REG_GDMA_DESTINATION_BASE FIO_ADDRESS(GDMA,0x60015010) /* read/write */
  63. #define REG_GDMA_DESTINATION_PITCH FIO_ADDRESS(GDMA,0x60015014) /* read/write */
  64. #define REG_GDMA_WIDTH FIO_ADDRESS(GDMA,0x60015018) /* read/write */
  65. #define REG_GDMA_HEIGHT FIO_ADDRESS(GDMA,0x6001501C) /* read/write */
  66. #define REG_GDMA_TRANSPARENT FIO_ADDRESS(GDMA,0x60015020) /* read/write */
  67. #define REG_GDMA_OPCODE FIO_ADDRESS(GDMA,0x60015024) /* read/write */
  68. #define REG_GDMA_NUM_PENDING_OPS FIO_ADDRESS(GDMA,0x60015028) /* read */
  69. /*----------------------------------------------------------------------------*/
  70. /* bit group structures */
  71. /*----------------------------------------------------------------------------*/
  72. /*----------------------------------------------------------------------------*/
  73. /* mirror variables */
  74. /*----------------------------------------------------------------------------*/
  75. #ifdef __cplusplus
  76. extern "C" {
  77. #endif
  78. /*----------------------------------------------------------------------------*/
  79. /* register GDMA_SOURCE1_BASE (read/write) */
  80. /*----------------------------------------------------------------------------*/
  81. #if GH_INLINE_LEVEL == 0
  82. /*! \brief Writes the register 'GDMA_SOURCE1_BASE'. */
  83. void GH_GDMA_set_SOURCE1_BASE(U32 data);
  84. /*! \brief Reads the register 'GDMA_SOURCE1_BASE'. */
  85. U32 GH_GDMA_get_SOURCE1_BASE(void);
  86. #else /* GH_INLINE_LEVEL == 0 */
  87. GH_INLINE void GH_GDMA_set_SOURCE1_BASE(U32 data)
  88. {
  89. *(volatile U32 *)REG_GDMA_SOURCE1_BASE = data;
  90. #if GH_GDMA_ENABLE_DEBUG_PRINT
  91. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE1_BASE] <-- 0x%08x\n",
  92. REG_GDMA_SOURCE1_BASE,data,data);
  93. #endif
  94. }
  95. GH_INLINE U32 GH_GDMA_get_SOURCE1_BASE(void)
  96. {
  97. U32 value = (*(volatile U32 *)REG_GDMA_SOURCE1_BASE);
  98. #if GH_GDMA_ENABLE_DEBUG_PRINT
  99. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE1_BASE] --> 0x%08x\n",
  100. REG_GDMA_SOURCE1_BASE,value);
  101. #endif
  102. return value;
  103. }
  104. #endif /* GH_INLINE_LEVEL == 0 */
  105. /*----------------------------------------------------------------------------*/
  106. /* register GDMA_SOURCE1_PITCH (read/write) */
  107. /*----------------------------------------------------------------------------*/
  108. #if GH_INLINE_LEVEL == 0
  109. /*! \brief Writes the register 'GDMA_SOURCE1_PITCH'. */
  110. void GH_GDMA_set_SOURCE1_PITCH(U32 data);
  111. /*! \brief Reads the register 'GDMA_SOURCE1_PITCH'. */
  112. U32 GH_GDMA_get_SOURCE1_PITCH(void);
  113. #else /* GH_INLINE_LEVEL == 0 */
  114. GH_INLINE void GH_GDMA_set_SOURCE1_PITCH(U32 data)
  115. {
  116. *(volatile U32 *)REG_GDMA_SOURCE1_PITCH = data;
  117. #if GH_GDMA_ENABLE_DEBUG_PRINT
  118. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE1_PITCH] <-- 0x%08x\n",
  119. REG_GDMA_SOURCE1_PITCH,data,data);
  120. #endif
  121. }
  122. GH_INLINE U32 GH_GDMA_get_SOURCE1_PITCH(void)
  123. {
  124. U32 value = (*(volatile U32 *)REG_GDMA_SOURCE1_PITCH);
  125. #if GH_GDMA_ENABLE_DEBUG_PRINT
  126. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE1_PITCH] --> 0x%08x\n",
  127. REG_GDMA_SOURCE1_PITCH,value);
  128. #endif
  129. return value;
  130. }
  131. #endif /* GH_INLINE_LEVEL == 0 */
  132. /*----------------------------------------------------------------------------*/
  133. /* register GDMA_SOURCE2_BASE (read/write) */
  134. /*----------------------------------------------------------------------------*/
  135. #if GH_INLINE_LEVEL == 0
  136. /*! \brief Writes the register 'GDMA_SOURCE2_BASE'. */
  137. void GH_GDMA_set_SOURCE2_BASE(U32 data);
  138. /*! \brief Reads the register 'GDMA_SOURCE2_BASE'. */
  139. U32 GH_GDMA_get_SOURCE2_BASE(void);
  140. #else /* GH_INLINE_LEVEL == 0 */
  141. GH_INLINE void GH_GDMA_set_SOURCE2_BASE(U32 data)
  142. {
  143. *(volatile U32 *)REG_GDMA_SOURCE2_BASE = data;
  144. #if GH_GDMA_ENABLE_DEBUG_PRINT
  145. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE2_BASE] <-- 0x%08x\n",
  146. REG_GDMA_SOURCE2_BASE,data,data);
  147. #endif
  148. }
  149. GH_INLINE U32 GH_GDMA_get_SOURCE2_BASE(void)
  150. {
  151. U32 value = (*(volatile U32 *)REG_GDMA_SOURCE2_BASE);
  152. #if GH_GDMA_ENABLE_DEBUG_PRINT
  153. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE2_BASE] --> 0x%08x\n",
  154. REG_GDMA_SOURCE2_BASE,value);
  155. #endif
  156. return value;
  157. }
  158. #endif /* GH_INLINE_LEVEL == 0 */
  159. /*----------------------------------------------------------------------------*/
  160. /* register GDMA_SOURCE2_PITCH (read/write) */
  161. /*----------------------------------------------------------------------------*/
  162. #if GH_INLINE_LEVEL == 0
  163. /*! \brief Writes the register 'GDMA_SOURCE2_PITCH'. */
  164. void GH_GDMA_set_SOURCE2_PITCH(U32 data);
  165. /*! \brief Reads the register 'GDMA_SOURCE2_PITCH'. */
  166. U32 GH_GDMA_get_SOURCE2_PITCH(void);
  167. #else /* GH_INLINE_LEVEL == 0 */
  168. GH_INLINE void GH_GDMA_set_SOURCE2_PITCH(U32 data)
  169. {
  170. *(volatile U32 *)REG_GDMA_SOURCE2_PITCH = data;
  171. #if GH_GDMA_ENABLE_DEBUG_PRINT
  172. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE2_PITCH] <-- 0x%08x\n",
  173. REG_GDMA_SOURCE2_PITCH,data,data);
  174. #endif
  175. }
  176. GH_INLINE U32 GH_GDMA_get_SOURCE2_PITCH(void)
  177. {
  178. U32 value = (*(volatile U32 *)REG_GDMA_SOURCE2_PITCH);
  179. #if GH_GDMA_ENABLE_DEBUG_PRINT
  180. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE2_PITCH] --> 0x%08x\n",
  181. REG_GDMA_SOURCE2_PITCH,value);
  182. #endif
  183. return value;
  184. }
  185. #endif /* GH_INLINE_LEVEL == 0 */
  186. /*----------------------------------------------------------------------------*/
  187. /* register GDMA_DESTINATION_BASE (read/write) */
  188. /*----------------------------------------------------------------------------*/
  189. #if GH_INLINE_LEVEL == 0
  190. /*! \brief Writes the register 'GDMA_DESTINATION_BASE'. */
  191. void GH_GDMA_set_DESTINATION_BASE(U32 data);
  192. /*! \brief Reads the register 'GDMA_DESTINATION_BASE'. */
  193. U32 GH_GDMA_get_DESTINATION_BASE(void);
  194. #else /* GH_INLINE_LEVEL == 0 */
  195. GH_INLINE void GH_GDMA_set_DESTINATION_BASE(U32 data)
  196. {
  197. *(volatile U32 *)REG_GDMA_DESTINATION_BASE = data;
  198. #if GH_GDMA_ENABLE_DEBUG_PRINT
  199. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_DESTINATION_BASE] <-- 0x%08x\n",
  200. REG_GDMA_DESTINATION_BASE,data,data);
  201. #endif
  202. }
  203. GH_INLINE U32 GH_GDMA_get_DESTINATION_BASE(void)
  204. {
  205. U32 value = (*(volatile U32 *)REG_GDMA_DESTINATION_BASE);
  206. #if GH_GDMA_ENABLE_DEBUG_PRINT
  207. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_DESTINATION_BASE] --> 0x%08x\n",
  208. REG_GDMA_DESTINATION_BASE,value);
  209. #endif
  210. return value;
  211. }
  212. #endif /* GH_INLINE_LEVEL == 0 */
  213. /*----------------------------------------------------------------------------*/
  214. /* register GDMA_DESTINATION_PITCH (read/write) */
  215. /*----------------------------------------------------------------------------*/
  216. #if GH_INLINE_LEVEL == 0
  217. /*! \brief Writes the register 'GDMA_DESTINATION_PITCH'. */
  218. void GH_GDMA_set_DESTINATION_PITCH(U32 data);
  219. /*! \brief Reads the register 'GDMA_DESTINATION_PITCH'. */
  220. U32 GH_GDMA_get_DESTINATION_PITCH(void);
  221. #else /* GH_INLINE_LEVEL == 0 */
  222. GH_INLINE void GH_GDMA_set_DESTINATION_PITCH(U32 data)
  223. {
  224. *(volatile U32 *)REG_GDMA_DESTINATION_PITCH = data;
  225. #if GH_GDMA_ENABLE_DEBUG_PRINT
  226. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_DESTINATION_PITCH] <-- 0x%08x\n",
  227. REG_GDMA_DESTINATION_PITCH,data,data);
  228. #endif
  229. }
  230. GH_INLINE U32 GH_GDMA_get_DESTINATION_PITCH(void)
  231. {
  232. U32 value = (*(volatile U32 *)REG_GDMA_DESTINATION_PITCH);
  233. #if GH_GDMA_ENABLE_DEBUG_PRINT
  234. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_DESTINATION_PITCH] --> 0x%08x\n",
  235. REG_GDMA_DESTINATION_PITCH,value);
  236. #endif
  237. return value;
  238. }
  239. #endif /* GH_INLINE_LEVEL == 0 */
  240. /*----------------------------------------------------------------------------*/
  241. /* register GDMA_WIDTH (read/write) */
  242. /*----------------------------------------------------------------------------*/
  243. #if GH_INLINE_LEVEL == 0
  244. /*! \brief Writes the register 'GDMA_WIDTH'. */
  245. void GH_GDMA_set_WIDTH(U32 data);
  246. /*! \brief Reads the register 'GDMA_WIDTH'. */
  247. U32 GH_GDMA_get_WIDTH(void);
  248. #else /* GH_INLINE_LEVEL == 0 */
  249. GH_INLINE void GH_GDMA_set_WIDTH(U32 data)
  250. {
  251. *(volatile U32 *)REG_GDMA_WIDTH = data;
  252. #if GH_GDMA_ENABLE_DEBUG_PRINT
  253. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_WIDTH] <-- 0x%08x\n",
  254. REG_GDMA_WIDTH,data,data);
  255. #endif
  256. }
  257. GH_INLINE U32 GH_GDMA_get_WIDTH(void)
  258. {
  259. U32 value = (*(volatile U32 *)REG_GDMA_WIDTH);
  260. #if GH_GDMA_ENABLE_DEBUG_PRINT
  261. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_WIDTH] --> 0x%08x\n",
  262. REG_GDMA_WIDTH,value);
  263. #endif
  264. return value;
  265. }
  266. #endif /* GH_INLINE_LEVEL == 0 */
  267. /*----------------------------------------------------------------------------*/
  268. /* register GDMA_HEIGHT (read/write) */
  269. /*----------------------------------------------------------------------------*/
  270. #if GH_INLINE_LEVEL == 0
  271. /*! \brief Writes the register 'GDMA_HEIGHT'. */
  272. void GH_GDMA_set_HEIGHT(U32 data);
  273. /*! \brief Reads the register 'GDMA_HEIGHT'. */
  274. U32 GH_GDMA_get_HEIGHT(void);
  275. #else /* GH_INLINE_LEVEL == 0 */
  276. GH_INLINE void GH_GDMA_set_HEIGHT(U32 data)
  277. {
  278. *(volatile U32 *)REG_GDMA_HEIGHT = data;
  279. #if GH_GDMA_ENABLE_DEBUG_PRINT
  280. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_HEIGHT] <-- 0x%08x\n",
  281. REG_GDMA_HEIGHT,data,data);
  282. #endif
  283. }
  284. GH_INLINE U32 GH_GDMA_get_HEIGHT(void)
  285. {
  286. U32 value = (*(volatile U32 *)REG_GDMA_HEIGHT);
  287. #if GH_GDMA_ENABLE_DEBUG_PRINT
  288. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_HEIGHT] --> 0x%08x\n",
  289. REG_GDMA_HEIGHT,value);
  290. #endif
  291. return value;
  292. }
  293. #endif /* GH_INLINE_LEVEL == 0 */
  294. /*----------------------------------------------------------------------------*/
  295. /* register GDMA_TRANSPARENT (read/write) */
  296. /*----------------------------------------------------------------------------*/
  297. #if GH_INLINE_LEVEL == 0
  298. /*! \brief Writes the register 'GDMA_TRANSPARENT'. */
  299. void GH_GDMA_set_TRANSPARENT(U32 data);
  300. /*! \brief Reads the register 'GDMA_TRANSPARENT'. */
  301. U32 GH_GDMA_get_TRANSPARENT(void);
  302. #else /* GH_INLINE_LEVEL == 0 */
  303. GH_INLINE void GH_GDMA_set_TRANSPARENT(U32 data)
  304. {
  305. *(volatile U32 *)REG_GDMA_TRANSPARENT = data;
  306. #if GH_GDMA_ENABLE_DEBUG_PRINT
  307. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_TRANSPARENT] <-- 0x%08x\n",
  308. REG_GDMA_TRANSPARENT,data,data);
  309. #endif
  310. }
  311. GH_INLINE U32 GH_GDMA_get_TRANSPARENT(void)
  312. {
  313. U32 value = (*(volatile U32 *)REG_GDMA_TRANSPARENT);
  314. #if GH_GDMA_ENABLE_DEBUG_PRINT
  315. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_TRANSPARENT] --> 0x%08x\n",
  316. REG_GDMA_TRANSPARENT,value);
  317. #endif
  318. return value;
  319. }
  320. #endif /* GH_INLINE_LEVEL == 0 */
  321. /*----------------------------------------------------------------------------*/
  322. /* register GDMA_OPCODE (read/write) */
  323. /*----------------------------------------------------------------------------*/
  324. #if GH_INLINE_LEVEL == 0
  325. /*! \brief Writes the register 'GDMA_OPCODE'. */
  326. void GH_GDMA_set_OPCODE(U32 data);
  327. /*! \brief Reads the register 'GDMA_OPCODE'. */
  328. U32 GH_GDMA_get_OPCODE(void);
  329. #else /* GH_INLINE_LEVEL == 0 */
  330. GH_INLINE void GH_GDMA_set_OPCODE(U32 data)
  331. {
  332. *(volatile U32 *)REG_GDMA_OPCODE = data;
  333. #if GH_GDMA_ENABLE_DEBUG_PRINT
  334. GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_OPCODE] <-- 0x%08x\n",
  335. REG_GDMA_OPCODE,data,data);
  336. #endif
  337. }
  338. GH_INLINE U32 GH_GDMA_get_OPCODE(void)
  339. {
  340. U32 value = (*(volatile U32 *)REG_GDMA_OPCODE);
  341. #if GH_GDMA_ENABLE_DEBUG_PRINT
  342. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_OPCODE] --> 0x%08x\n",
  343. REG_GDMA_OPCODE,value);
  344. #endif
  345. return value;
  346. }
  347. #endif /* GH_INLINE_LEVEL == 0 */
  348. /*----------------------------------------------------------------------------*/
  349. /* register GDMA_NUM_PENDING_OPS (read) */
  350. /*----------------------------------------------------------------------------*/
  351. #if GH_INLINE_LEVEL == 0
  352. /*! \brief Reads the register 'GDMA_NUM_PENDING_OPS'. */
  353. U32 GH_GDMA_get_NUM_PENDING_OPS(void);
  354. #else /* GH_INLINE_LEVEL == 0 */
  355. GH_INLINE U32 GH_GDMA_get_NUM_PENDING_OPS(void)
  356. {
  357. U32 value = (*(volatile U32 *)REG_GDMA_NUM_PENDING_OPS);
  358. #if GH_GDMA_ENABLE_DEBUG_PRINT
  359. GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_NUM_PENDING_OPS] --> 0x%08x\n",
  360. REG_GDMA_NUM_PENDING_OPS,value);
  361. #endif
  362. return value;
  363. }
  364. #endif /* GH_INLINE_LEVEL == 0 */
  365. /*----------------------------------------------------------------------------*/
  366. /* init function */
  367. /*----------------------------------------------------------------------------*/
  368. /*! \brief Initialises the registers and mirror variables. */
  369. void GH_GDMA_init(void);
  370. #ifdef __cplusplus
  371. }
  372. #endif
  373. #endif /* _GH_GDMA_H */
  374. /*----------------------------------------------------------------------------*/
  375. /* end of file */
  376. /*----------------------------------------------------------------------------*/